; start of dump from pass_cse (../../src/gcc/cse.c:7532) ;; Function ravif2 (ravif2, funcdef_no=0, decl_uid=364, cgraph_uid=0, symbol_order=0) 5 basic blocks, 5 edges. (note 4 0 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK) (insn 2 4 3 2 (set (reg/v/f:DI 103 [ L ]) (reg:DI 5 di [ L ])) 85 {*movdi_internal} (nil)) (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG) (note 5 3 7 2 ("entry") NOTE_INSN_DELETED_LABEL 2) (insn 7 5 8 2 (set (reg/f:DI 87 [ D.451 ]) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 8 7 9 2 (set (reg/f:DI 104) (mem/f:DI (reg/f:DI 87 [ D.451 ]) [11 _4->func+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 9 8 10 2 (set (reg/v/f:DI 89 [ cl ]) (mem/f:DI (reg/f:DI 104) [3 _5->value_.gc+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 10 9 11 2 (set (reg:SI 1 dx) (const_int 0 [0])) 86 {*movsi_internal} (nil)) (insn 11 10 12 2 (set (reg:SI 4 si) (const_int 0 [0])) 86 {*movsi_internal} (nil)) (insn 12 11 13 2 (set (reg:DI 5 di) (reg/f:DI 87 [ D.451 ])) 85 {*movdi_internal} (nil)) (call_insn 13 12 14 2 (call (mem:QI (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41] ) [0 raviV_op_loadnil S1 A8]) (const_int 0 [0])) 647 {*call} (expr_list:REG_CALL_DECL (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:SI (use (reg:SI 4 si)) (expr_list:SI (use (reg:SI 1 dx)) (nil))))) (insn 14 13 15 2 (set (reg/f:DI 105) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 15 14 16 2 (set (reg/v/f:DI 91 [ base ]) (mem/f:DI (plus:DI (reg/f:DI 105) (const_int 32 [0x20])) [11 _8->u.l.base+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 16 15 17 2 (set (reg/f:DI 106) (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ]) (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 17 16 18 2 (set (reg/f:DI 93 [ D.452 ]) (mem/f:DI (plus:DI (reg/f:DI 106) (const_int 48 [0x30])) [11 _10->k+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 18 17 19 2 (set (reg:DI 94 [ D.454 ]) (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 19 18 20 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64]) (reg:DI 94 [ D.454 ])) 85 {*movdi_internal} (nil)) (insn 20 19 21 2 (set (mem:SI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 24 [0x18])) [5 MEM[(struct ravi_TValue *)base_9 + 16B].tt_+0 S4 A64]) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 21 20 22 2 (set (reg:DI 95 [ D.454 ]) (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 22 21 23 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64]) (reg:DI 95 [ D.454 ])) 85 {*movdi_internal} (nil)) (insn 23 22 24 2 (set (reg:SI 1 dx) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 24 23 25 2 (set (reg:SI 4 si) (const_int 13 [0xd])) 86 {*movsi_internal} (nil)) (insn 25 24 26 2 (set (reg:DI 5 di) (symbol_ref/f:DI ("*.LC0") [flags 0x2] )) 85 {*movdi_internal} (nil)) (insn 26 25 27 2 (set (reg:QI 0 ax) (const_int 0 [0])) 89 {*movqi_internal} (nil)) (call_insn 27 26 28 2 (set (reg:SI 0 ax) (call (mem:QI (symbol_ref:DI ("printf") [flags 0x41] ) [0 printf S1 A8]) (const_int 0 [0]))) 657 {*call_value} (expr_list:REG_CALL_DECL (symbol_ref:DI ("printf") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))) (expr_list (use (reg:QI 0 ax)) (expr_list:DI (use (reg:DI 5 di)) (expr_list:SI (use (reg:SI 4 si)) (expr_list:SI (use (reg:SI 1 dx)) (nil)))))) (insn 28 27 29 2 (set (reg/f:DI 107) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 29 28 30 2 (set (reg/v/f:DI 97 [ base ]) (mem/f:DI (plus:DI (reg/f:DI 107) (const_int 32 [0x20])) [11 _19->u.l.base+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 30 29 31 2 (parallel [ (set (reg:DI 108) (plus:DI (reg/v/f:DI 97 [ base ]) (const_int 32 [0x20]))) (clobber (reg:CC 17 flags)) ]) 215 {*adddi_1} (nil)) (insn 31 30 32 2 (set (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 16 [0x10])) [11 L_3(D)->top+0 S8 A64]) (reg:DI 108)) 85 {*movdi_internal} (nil)) (insn 32 31 33 2 (set (reg/f:DI 109) (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ]) (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 33 32 34 2 (set (reg:CCNO 17 flags) (compare:CCNO (mem:SI (plus:DI (reg/f:DI 109) (const_int 32 [0x20])) [5 _23->sizep+0 S4 A64]) (const_int 0 [0]))) 3 {*cmpsi_ccno_1} (nil)) (jump_insn 34 33 36 2 (set (pc) (if_then_else (le (reg:CCNO 17 flags) (const_int 0 [0])) (label_ref 40) (pc))) 601 {*jcc_1} (int_list:REG_BR_PROB 3666 (nil)) -> 40) (note 36 34 35 3 [bb 3] NOTE_INSN_BASIC_BLOCK) (note 35 36 37 3 ("OP_RETURN_if_sizep_gt_0_12_23") NOTE_INSN_DELETED_LABEL 4) (insn 37 35 38 3 (set (reg:DI 4 si) (reg/v/f:DI 97 [ base ])) 85 {*movdi_internal} (nil)) (insn 38 37 39 3 (set (reg:DI 5 di) (reg/v/f:DI 103 [ L ])) 85 {*movdi_internal} (nil)) (call_insn 39 38 40 3 (call (mem:QI (symbol_ref:DI ("luaF_close") [flags 0x41] ) [0 luaF_close S1 A8]) (const_int 0 [0])) 647 {*call} (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaF_close") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:DI (use (reg:DI 4 si)) (nil)))) (code_label 40 39 41 4 3 ("OP_RETURN_else_sizep_gt_0_12_24") [1 uses]) (note 41 40 42 4 [bb 4] NOTE_INSN_BASIC_BLOCK) (insn 42 41 43 4 (parallel [ (set (reg:DI 110 [ D.452 ]) (plus:DI (reg/v/f:DI 97 [ base ]) (const_int 16 [0x10]))) (clobber (reg:CC 17 flags)) ]) 215 {*adddi_1} (nil)) (insn 43 42 44 4 (set (reg:DI 4 si) (reg:DI 110 [ D.452 ])) 85 {*movdi_internal} (nil)) (insn 44 43 45 4 (set (reg:DI 5 di) (reg/v/f:DI 103 [ L ])) 85 {*movdi_internal} (nil)) (call_insn 45 44 46 4 (set (reg:SI 0 ax) (call (mem:QI (symbol_ref:DI ("luaD_poscall") [flags 0x41] ) [0 luaD_poscall S1 A8]) (const_int 0 [0]))) 657 {*call_value} (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaD_poscall") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:DI (use (reg:DI 4 si)) (nil)))) (insn 46 45 50 4 (set (reg:SI 102 [ ]) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 50 46 51 4 (set (reg/i:SI 0 ax) (reg:SI 102 [ ])) 86 {*movsi_internal} (nil)) (insn 51 50 0 4 (use (reg/i:SI 0 ax)) -1 (nil)) starting the processing of deferred insns ending the processing of deferred insns df_analyze called df_worklist_dataflow_doublequeue:n_basic_blocks 5 n_edges 5 count 5 ( 1) ravif2 Dataflow summary: def_info->table_size = 0, use_info->table_size = 0 ;; invalidated by call 0 [ax] 1 [dx] 2 [cx] 4 [si] 5 [di] 8 [st] 9 [st(1)] 10 [st(2)] 11 [st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 17 [flags] 18 [fpsr] 19 [fpcr] 21 [xmm0] 22 [xmm1] 23 [xmm2] 24 [xmm3] 25 [xmm4] 26 [xmm5] 27 [xmm6] 28 [xmm7] 29 [mm0] 30 [mm1] 31 [mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7] 37 [r8] 38 [r9] 39 [r10] 40 [r11] 45 [xmm8] 46 [xmm9] 47 [xmm10] 48 [xmm11] 49 [xmm12] 50 [xmm13] 51 [xmm14] 52 [xmm15] 53 [] 54 [] 55 [] 56 [] 57 [] 58 [] 59 [] 60 [] 61 [] 62 [] 63 [] 64 [] 65 [] 66 [] 67 [] 68 [] 69 [] 70 [] 71 [] 72 [] 73 [] 74 [] 75 [] 76 [] 77 [] 78 [] 79 [] 80 [] ;; hardware regs used 7 [sp] 16 [argp] 20 [frame] ;; regular block artificial uses 6 [bp] 7 [sp] 16 [argp] 20 [frame] ;; eh block artificial uses 6 [bp] 7 [sp] 16 [argp] 20 [frame] ;; entry block defs 0 [ax] 1 [dx] 2 [cx] 4 [si] 5 [di] 6 [bp] 7 [sp] 16 [argp] 20 [frame] 21 [xmm0] 22 [xmm1] 23 [xmm2] 24 [xmm3] 25 [xmm4] 26 [xmm5] 27 [xmm6] 28 [xmm7] 37 [r8] 38 [r9] ;; exit block uses 0 [ax] 6 [bp] 7 [sp] 20 [frame] ;; regs ever live 0 [ax] 1 [dx] 4 [si] 5 [di] 7 [sp] 17 [flags] ;; ref usage r0={7d,3u} r1={7d,2u} r2={5d} r4={9d,4u} r5={9d,5u} r6={1d,4u} r7={1d,8u} r8={4d} r9={4d} r10={4d} r11={4d} r12={4d} r13={4d} r14={4d} r15={4d} r16={1d,3u} r17={7d,1u} r18={4d} r19={4d} r20={1d,4u} r21={5d} r22={5d} r23={5d} r24={5d} r25={5d} r26={5d} r27={5d} r28={5d} r29={4d} r30={4d} r31={4d} r32={4d} r33={4d} r34={4d} r35={4d} r36={4d} r37={5d} r38={5d} r39={4d} r40={4d} r45={4d} r46={4d} r47={4d} r48={4d} r49={4d} r50={4d} r51={4d} r52={4d} r53={4d} r54={4d} r55={4d} r56={4d} r57={4d} r58={4d} r59={4d} r60={4d} r61={4d} r62={4d} r63={4d} r64={4d} r65={4d} r66={4d} r67={4d} r68={4d} r69={4d} r70={4d} r71={4d} r72={4d} r73={4d} r74={4d} r75={4d} r76={4d} r77={4d} r78={4d} r79={4d} r80={4d} r87={1d,2u} r89={1d,2u} r91={1d,3u} r93={1d,2u} r94={1d,1u} r95={1d,1u} r97={1d,3u} r102={1d,1u} r103={1d,6u} r104={1d,1u} r105={1d,1u} r106={1d,1u} r107={1d,1u} r108={1d,1u} r109={1d,1u} r110={1d,1u} ;; total ref usage 400{338d,62u,0e} in 39{35 regular + 4 call} insns. ( )->[0]->( 2 ) ;; bb 0 artificial_defs: { d-1(0){ }d-1(1){ }d-1(2){ }d-1(4){ }d-1(5){ }d-1(6){ }d-1(7){ }d-1(16){ }d-1(20){ }d-1(21){ }d-1(22){ }d-1(23){ }d-1(24){ }d-1(25){ }d-1(26){ }d-1(27){ }d-1(28){ }d-1(37){ }d-1(38){ }} ;; bb 0 artificial_uses: { } ( 0 )->[2]->( 3 4 ) ;; bb 2 artificial_defs: { } ;; bb 2 artificial_uses: { u-1(6){ }u-1(7){ }u-1(16){ }u-1(20){ }} ( 2 )->[3]->( 4 ) ;; bb 3 artificial_defs: { } ;; bb 3 artificial_uses: { u-1(6){ }u-1(7){ }u-1(16){ }u-1(20){ }} ( 2 3 )->[4]->( 1 ) ;; bb 4 artificial_defs: { } ;; bb 4 artificial_uses: { u-1(6){ }u-1(7){ }u-1(16){ }u-1(20){ }} ( 4 )->[1]->( ) ;; bb 1 artificial_defs: { } ;; bb 1 artificial_uses: { u-1(0){ }u-1(6){ }u-1(7){ }u-1(20){ }} Finding needed instructions: Adding insn 34 to worklist Adding insn 31 to worklist Adding insn 27 to worklist Adding insn 22 to worklist Adding insn 20 to worklist Adding insn 19 to worklist Adding insn 13 to worklist Adding insn 39 to worklist Adding insn 51 to worklist Adding insn 45 to worklist Finished finding needed instructions: processing block 4 lr out = 0 [ax] 6 [bp] 7 [sp] 16 [argp] 20 [frame] Adding insn 50 to worklist Adding insn 46 to worklist Adding insn 44 to worklist Adding insn 43 to worklist Adding insn 42 to worklist processing block 3 lr out = 6 [bp] 7 [sp] 16 [argp] 20 [frame] 97 103 Adding insn 38 to worklist Adding insn 37 to worklist processing block 2 lr out = 6 [bp] 7 [sp] 16 [argp] 20 [frame] 97 103 Adding insn 33 to worklist Adding insn 32 to worklist Adding insn 30 to worklist Adding insn 29 to worklist Adding insn 28 to worklist Adding insn 26 to worklist Adding insn 25 to worklist Adding insn 24 to worklist Adding insn 23 to worklist Adding insn 21 to worklist Adding insn 18 to worklist Adding insn 17 to worklist Adding insn 16 to worklist Adding insn 15 to worklist Adding insn 14 to worklist Adding insn 12 to worklist Adding insn 11 to worklist Adding insn 10 to worklist Adding insn 9 to worklist Adding insn 8 to worklist Adding insn 7 to worklist Adding insn 2 to worklist df_worklist_dataflow_doublequeue:n_basic_blocks 5 n_edges 5 count 5 ( 1) ;; Following path with 33 sets: 2 3 ;; Following path with 8 sets: 4 deferring rescan insn with uid = 50. try_optimize_cfg iteration 1 starting the processing of deferred insns rescanning insn with uid = 50. ending the processing of deferred insns ravif2 Dataflow summary: ;; invalidated by call 0 [ax] 1 [dx] 2 [cx] 4 [si] 5 [di] 8 [st] 9 [st(1)] 10 [st(2)] 11 [st(3)] 12 [st(4)] 13 [st(5)] 14 [st(6)] 15 [st(7)] 17 [flags] 18 [fpsr] 19 [fpcr] 21 [xmm0] 22 [xmm1] 23 [xmm2] 24 [xmm3] 25 [xmm4] 26 [xmm5] 27 [xmm6] 28 [xmm7] 29 [mm0] 30 [mm1] 31 [mm2] 32 [mm3] 33 [mm4] 34 [mm5] 35 [mm6] 36 [mm7] 37 [r8] 38 [r9] 39 [r10] 40 [r11] 45 [xmm8] 46 [xmm9] 47 [xmm10] 48 [xmm11] 49 [xmm12] 50 [xmm13] 51 [xmm14] 52 [xmm15] 53 [] 54 [] 55 [] 56 [] 57 [] 58 [] 59 [] 60 [] 61 [] 62 [] 63 [] 64 [] 65 [] 66 [] 67 [] 68 [] 69 [] 70 [] 71 [] 72 [] 73 [] 74 [] 75 [] 76 [] 77 [] 78 [] 79 [] 80 [] ;; hardware regs used 7 [sp] 16 [argp] 20 [frame] ;; regular block artificial uses 6 [bp] 7 [sp] 16 [argp] 20 [frame] ;; eh block artificial uses 6 [bp] 7 [sp] 16 [argp] 20 [frame] ;; entry block defs 0 [ax] 1 [dx] 2 [cx] 4 [si] 5 [di] 6 [bp] 7 [sp] 16 [argp] 20 [frame] 21 [xmm0] 22 [xmm1] 23 [xmm2] 24 [xmm3] 25 [xmm4] 26 [xmm5] 27 [xmm6] 28 [xmm7] 37 [r8] 38 [r9] ;; exit block uses 0 [ax] 6 [bp] 7 [sp] 20 [frame] ;; regs ever live 0 [ax] 1 [dx] 4 [si] 5 [di] 7 [sp] 17 [flags] ;; ref usage r0={7d,3u} r1={7d,2u} r2={5d} r4={9d,4u} r5={9d,5u} r6={1d,4u} r7={1d,8u} r8={4d} r9={4d} r10={4d} r11={4d} r12={4d} r13={4d} r14={4d} r15={4d} r16={1d,3u} r17={7d,1u} r18={4d} r19={4d} r20={1d,4u} r21={5d} r22={5d} r23={5d} r24={5d} r25={5d} r26={5d} r27={5d} r28={5d} r29={4d} r30={4d} r31={4d} r32={4d} r33={4d} r34={4d} r35={4d} r36={4d} r37={5d} r38={5d} r39={4d} r40={4d} r45={4d} r46={4d} r47={4d} r48={4d} r49={4d} r50={4d} r51={4d} r52={4d} r53={4d} r54={4d} r55={4d} r56={4d} r57={4d} r58={4d} r59={4d} r60={4d} r61={4d} r62={4d} r63={4d} r64={4d} r65={4d} r66={4d} r67={4d} r68={4d} r69={4d} r70={4d} r71={4d} r72={4d} r73={4d} r74={4d} r75={4d} r76={4d} r77={4d} r78={4d} r79={4d} r80={4d} r87={1d,2u} r89={1d,2u} r91={1d,3u} r93={1d,2u} r94={1d,1u} r95={1d,1u} r97={1d,3u} r102={1d} r103={1d,6u} r104={1d,1u} r105={1d,1u} r106={1d,1u} r107={1d,1u} r108={1d,1u} r109={1d,1u} r110={1d,1u} ;; total ref usage 399{338d,61u,0e} in 39{35 regular + 4 call} insns. (note 4 0 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK) (insn 2 4 3 2 (set (reg/v/f:DI 103 [ L ]) (reg:DI 5 di [ L ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg:DI 5 di [ L ]) (nil))) (note 3 2 5 2 NOTE_INSN_FUNCTION_BEG) (note 5 3 7 2 ("entry") NOTE_INSN_DELETED_LABEL 2) (insn 7 5 8 2 (set (reg/f:DI 87 [ D.451 ]) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 8 7 9 2 (set (reg/f:DI 104 [ _4->func ]) (mem/f:DI (reg/f:DI 87 [ D.451 ]) [11 _4->func+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 9 8 10 2 (set (reg/v/f:DI 89 [ cl ]) (mem/f:DI (reg/f:DI 104 [ _4->func ]) [3 _5->value_.gc+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 104 [ _4->func ]) (nil))) (insn 10 9 11 2 (set (reg:SI 1 dx) (const_int 0 [0])) 86 {*movsi_internal} (nil)) (insn 11 10 12 2 (set (reg:SI 4 si) (const_int 0 [0])) 86 {*movsi_internal} (nil)) (insn 12 11 13 2 (set (reg:DI 5 di) (reg/f:DI 87 [ D.451 ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 87 [ D.451 ]) (nil))) (call_insn 13 12 14 2 (call (mem:QI (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41] ) [0 raviV_op_loadnil S1 A8]) (const_int 0 [0])) 647 {*call} (expr_list:REG_DEAD (reg:DI 5 di) (expr_list:REG_DEAD (reg:SI 4 si) (expr_list:REG_DEAD (reg:SI 1 dx) (expr_list:REG_CALL_DECL (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil)))))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:SI (use (reg:SI 4 si)) (expr_list:SI (use (reg:SI 1 dx)) (nil))))) (insn 14 13 15 2 (set (reg/f:DI 105 [ L_3(D)->ci ]) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 15 14 16 2 (set (reg/v/f:DI 91 [ base ]) (mem/f:DI (plus:DI (reg/f:DI 105 [ L_3(D)->ci ]) (const_int 32 [0x20])) [11 _8->u.l.base+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 105 [ L_3(D)->ci ]) (nil))) (insn 16 15 17 2 (set (reg/f:DI 106 [ cl_6->p ]) (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ]) (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 17 16 18 2 (set (reg/f:DI 93 [ D.452 ]) (mem/f:DI (plus:DI (reg/f:DI 106 [ cl_6->p ]) (const_int 48 [0x30])) [11 _10->k+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 106 [ cl_6->p ]) (nil))) (insn 18 17 19 2 (set (reg:DI 94 [ D.454 ]) (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 19 18 20 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64]) (reg:DI 94 [ D.454 ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg:DI 94 [ D.454 ]) (nil))) (insn 20 19 21 2 (set (mem:SI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 24 [0x18])) [5 MEM[(struct ravi_TValue *)base_9 + 16B].tt_+0 S4 A64]) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 21 20 22 2 (set (reg:DI 95 [ D.454 ]) (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 93 [ D.452 ]) (nil))) (insn 22 21 23 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ]) (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64]) (reg:DI 95 [ D.454 ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg:DI 95 [ D.454 ]) (expr_list:REG_DEAD (reg/v/f:DI 91 [ base ]) (nil)))) (insn 23 22 24 2 (set (reg:SI 1 dx) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 24 23 25 2 (set (reg:SI 4 si) (const_int 13 [0xd])) 86 {*movsi_internal} (nil)) (insn 25 24 26 2 (set (reg:DI 5 di) (symbol_ref/f:DI ("*.LC0") [flags 0x2] )) 85 {*movdi_internal} (nil)) (insn 26 25 27 2 (set (reg:QI 0 ax) (const_int 0 [0])) 89 {*movqi_internal} (nil)) (call_insn 27 26 28 2 (set (reg:SI 0 ax) (call (mem:QI (symbol_ref:DI ("printf") [flags 0x41] ) [0 printf S1 A8]) (const_int 0 [0]))) 657 {*call_value} (expr_list:REG_DEAD (reg:DI 5 di) (expr_list:REG_DEAD (reg:SI 4 si) (expr_list:REG_DEAD (reg:SI 1 dx) (expr_list:REG_UNUSED (reg:SI 0 ax) (expr_list:REG_CALL_DECL (symbol_ref:DI ("printf") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))))))) (expr_list (use (reg:QI 0 ax)) (expr_list:DI (use (reg:DI 5 di)) (expr_list:SI (use (reg:SI 4 si)) (expr_list:SI (use (reg:SI 1 dx)) (nil)))))) (insn 28 27 29 2 (set (reg/f:DI 107 [ L_3(D)->ci ]) (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) 85 {*movdi_internal} (nil)) (insn 29 28 30 2 (set (reg/v/f:DI 97 [ base ]) (mem/f:DI (plus:DI (reg/f:DI 107 [ L_3(D)->ci ]) (const_int 32 [0x20])) [11 _19->u.l.base+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 107 [ L_3(D)->ci ]) (nil))) (insn 30 29 31 2 (parallel [ (set (reg/f:DI 108) (plus:DI (reg/v/f:DI 97 [ base ]) (const_int 32 [0x20]))) (clobber (reg:CC 17 flags)) ]) 215 {*adddi_1} (expr_list:REG_UNUSED (reg:CC 17 flags) (nil))) (insn 31 30 32 2 (set (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ]) (const_int 16 [0x10])) [11 L_3(D)->top+0 S8 A64]) (reg/f:DI 108)) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 108) (nil))) (insn 32 31 33 2 (set (reg/f:DI 109 [ cl_6->p ]) (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ]) (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/v/f:DI 89 [ cl ]) (nil))) (insn 33 32 34 2 (set (reg:CCNO 17 flags) (compare:CCNO (mem:SI (plus:DI (reg/f:DI 109 [ cl_6->p ]) (const_int 32 [0x20])) [5 _23->sizep+0 S4 A64]) (const_int 0 [0]))) 3 {*cmpsi_ccno_1} (expr_list:REG_DEAD (reg/f:DI 109 [ cl_6->p ]) (nil))) (jump_insn 34 33 36 2 (set (pc) (if_then_else (le (reg:CCNO 17 flags) (const_int 0 [0])) (label_ref 40) (pc))) 601 {*jcc_1} (expr_list:REG_DEAD (reg:CCNO 17 flags) (int_list:REG_BR_PROB 3666 (nil))) -> 40) (note 36 34 35 3 [bb 3] NOTE_INSN_BASIC_BLOCK) (note 35 36 37 3 ("OP_RETURN_if_sizep_gt_0_12_23") NOTE_INSN_DELETED_LABEL 4) (insn 37 35 38 3 (set (reg:DI 4 si) (reg/v/f:DI 97 [ base ])) 85 {*movdi_internal} (nil)) (insn 38 37 39 3 (set (reg:DI 5 di) (reg/v/f:DI 103 [ L ])) 85 {*movdi_internal} (nil)) (call_insn 39 38 40 3 (call (mem:QI (symbol_ref:DI ("luaF_close") [flags 0x41] ) [0 luaF_close S1 A8]) (const_int 0 [0])) 647 {*call} (expr_list:REG_DEAD (reg:DI 5 di) (expr_list:REG_DEAD (reg:DI 4 si) (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaF_close") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil))))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:DI (use (reg:DI 4 si)) (nil)))) (code_label 40 39 41 4 3 ("OP_RETURN_else_sizep_gt_0_12_24") [1 uses]) (note 41 40 42 4 [bb 4] NOTE_INSN_BASIC_BLOCK) (insn 42 41 43 4 (parallel [ (set (reg/f:DI 110 [ D.452 ]) (plus:DI (reg/v/f:DI 97 [ base ]) (const_int 16 [0x10]))) (clobber (reg:CC 17 flags)) ]) 215 {*adddi_1} (expr_list:REG_DEAD (reg/v/f:DI 97 [ base ]) (expr_list:REG_UNUSED (reg:CC 17 flags) (nil)))) (insn 43 42 44 4 (set (reg:DI 4 si) (reg/f:DI 110 [ D.452 ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/f:DI 110 [ D.452 ]) (nil))) (insn 44 43 45 4 (set (reg:DI 5 di) (reg/v/f:DI 103 [ L ])) 85 {*movdi_internal} (expr_list:REG_DEAD (reg/v/f:DI 103 [ L ]) (nil))) (call_insn 45 44 46 4 (set (reg:SI 0 ax) (call (mem:QI (symbol_ref:DI ("luaD_poscall") [flags 0x41] ) [0 luaD_poscall S1 A8]) (const_int 0 [0]))) 657 {*call_value} (expr_list:REG_DEAD (reg:DI 5 di) (expr_list:REG_DEAD (reg:DI 4 si) (expr_list:REG_UNUSED (reg:SI 0 ax) (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaD_poscall") [flags 0x41] ) (expr_list:REG_EH_REGION (const_int 0 [0]) (nil)))))) (expr_list:DI (use (reg:DI 5 di)) (expr_list:DI (use (reg:DI 4 si)) (nil)))) (insn 46 45 50 4 (set (reg:SI 102 [ ]) (const_int 1 [0x1])) 86 {*movsi_internal} (nil)) (insn 50 46 51 4 (set (reg/i:SI 0 ax) (const_int 1 [0x1])) 86 {*movsi_internal} (expr_list:REG_DEAD (reg:SI 102 [ ]) (nil))) (insn 51 50 0 4 (use (reg/i:SI 0 ax)) -1 (nil)) ; end of dump from pass_cse (../../src/gcc/cse.c:7532)