; start of dump from pass_expand (../../src/gcc/cfgexpand.c:5864)

;; Function ravif2 (ravif2, funcdef_no=0, decl_uid=364, cgraph_uid=0, symbol_order=0)

ravif2 (struct ravi_lua_State * L)
{
  struct ravi_TValue * base;
  struct ravi_LClosure * cl;
  struct ravi_CallInfo * _4;
  struct ravi_TValue * _5;
  struct ravi_CallInfo * _8;
  struct ravi_Proto * _10;
  struct ravi_TValue * _11;
  signed long _12;
  signed long _15;
  struct ravi_CallInfo * _19;
  struct ravi_TValue * _21;
  struct ravi_Proto * _23;
  signed int _24;
  struct ravi_TValue * _26;

;;   basic block 2, loop depth 0
;;    pred:       ENTRY
entry:
  _4 = L_3(D)->ci;
  _5 = _4->func;
  cl_6 = _5->value_.gc;
  raviV_op_loadnil (_4, 0, 0);
  _8 = L_3(D)->ci;
  base_9 = _8->u.l.base;
  _10 = cl_6->p;
  _11 = _10->k;
  _12 = _11->value_.i;
  MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _12;
  MEM[(struct ravi_TValue *)base_9 + 16B].tt_ = 1;
  _15 = _11->value_.i;
  MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _15;
  printf ("OP_RETURN(pc=%d) return %d args", 13, 1);
  _19 = L_3(D)->ci;
  base_20 = _19->u.l.base;
  _21 = base_20 + 32;
  L_3(D)->top = _21;
  _23 = cl_6->p;
  _24 = _23->sizep;
  if (_24 > 0)
    goto <bb 3> (OP_RETURN_if_sizep_gt_0_12_23);
  else
    goto <bb 4> (OP_RETURN_else_sizep_gt_0_12_24);
;;    succ:       3
;;                4

;;   basic block 3, loop depth 0
;;    pred:       2
OP_RETURN_if_sizep_gt_0_12_23:
  luaF_close (L_3(D), base_20);
;;    succ:       4

;;   basic block 4, loop depth 0
;;    pred:       2
;;                3
OP_RETURN_else_sizep_gt_0_12_24:
  _26 = base_20 + 16;
  luaD_poscall (L_3(D), _26);
  return 1;
;;    succ:       EXIT

}



Partition map 

Partition 3 (L_3(D) - 3 )
Partition 4 (_4 - 4 )
Partition 5 (_5 - 5 )
Partition 6 (cl_6 - 6 )
Partition 8 (_8 - 8 )
Partition 9 (base_9 - 9 )
Partition 10 (_10 - 10 )
Partition 11 (_11 - 11 )
Partition 12 (_12 - 12 )
Partition 15 (_15 - 15 )
Partition 19 (_19 - 19 )
Partition 20 (base_20 - 20 )
Partition 21 (_21 - 21 )
Partition 23 (_23 - 23 )
Partition 24 (_24 - 24 )
Partition 26 (_26 - 26 )


Partition map 

Partition 0 (L_3(D) - 3 )


Conflict graph:

After sorting:
Coalesce List:

Partition map 

Partition 0 (L_3(D) - 3 )

After Coalescing:

Partition map 

Partition 0 (L_3(D) - 3 )
Partition 1 (_4 - 4 )
Partition 2 (_5 - 5 )
Partition 3 (cl_6 - 6 )
Partition 4 (_8 - 8 )
Partition 5 (base_9 - 9 )
Partition 6 (_10 - 10 )
Partition 7 (_11 - 11 )
Partition 8 (_12 - 12 )
Partition 9 (_15 - 15 )
Partition 10 (_19 - 19 )
Partition 11 (base_20 - 20 )
Partition 12 (_21 - 21 )
Partition 13 (_23 - 23 )
Partition 14 (_24 - 24 )
Partition 15 (_26 - 26 )


Replacing Expressions
_5 replace with --> _5 = _4->func;

_8 replace with --> _8 = L_3(D)->ci;

_10 replace with --> _10 = cl_6->p;

_19 replace with --> _19 = L_3(D)->ci;

_21 replace with --> _21 = base_20 + 32;

_23 replace with --> _23 = cl_6->p;

_24 replace with --> _24 = _23->sizep;

_26 replace with --> _26 = base_20 + 16;


ravif2 (struct ravi_lua_State * L)
{
  struct ravi_TValue * base;
  struct ravi_LClosure * cl;
  struct ravi_CallInfo * _4;
  struct ravi_TValue * _5;
  struct ravi_CallInfo * _8;
  struct ravi_Proto * _10;
  struct ravi_TValue * _11;
  signed long _12;
  signed long _15;
  struct ravi_CallInfo * _19;
  struct ravi_TValue * _21;
  struct ravi_Proto * _23;
  signed int _24;
  struct ravi_TValue * _26;

;;   basic block 2, loop depth 0
;;    pred:       ENTRY
entry:
  _4 = L_3(D)->ci;
  _5 = _4->func;
  cl_6 = _5->value_.gc;
  raviV_op_loadnil (_4, 0, 0);
  _8 = L_3(D)->ci;
  base_9 = _8->u.l.base;
  _10 = cl_6->p;
  _11 = _10->k;
  _12 = _11->value_.i;
  MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _12;
  MEM[(struct ravi_TValue *)base_9 + 16B].tt_ = 1;
  _15 = _11->value_.i;
  MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _15;
  printf ("OP_RETURN(pc=%d) return %d args", 13, 1);
  _19 = L_3(D)->ci;
  base_20 = _19->u.l.base;
  _21 = base_20 + 32;
  L_3(D)->top = _21;
  _23 = cl_6->p;
  _24 = _23->sizep;
  if (_24 > 0)
    goto <bb 3> (OP_RETURN_if_sizep_gt_0_12_23);
  else
    goto <bb 4> (OP_RETURN_else_sizep_gt_0_12_24);
;;    succ:       3
;;                4

;;   basic block 3, loop depth 0
;;    pred:       2
OP_RETURN_if_sizep_gt_0_12_23:
  luaF_close (L_3(D), base_20);
;;    succ:       4

;;   basic block 4, loop depth 0
;;    pred:       2
;;                3
OP_RETURN_else_sizep_gt_0_12_24:
  _26 = base_20 + 16;
  luaD_poscall (L_3(D), _26);
  return 1;
;;    succ:       EXIT

}



;; Generating RTL for gimple basic block 2

;; entry:

(code_label 5 3 6 2 ("entry") [0 uses])

(note 6 5 0 NOTE_INSN_BASIC_BLOCK)

;; _4 = L_3(D)->ci;

(insn 7 6 0 (set (reg/f:DI 87 [ D.451 ])
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))

;; cl_6 = _5->value_.gc;

(insn 8 7 9 (set (reg/f:DI 104)
        (mem/f:DI (reg/f:DI 87 [ D.451 ]) [11 _4->func+0 S8 A64])) -1
     (nil))

(insn 9 8 0 (set (reg/v/f:DI 89 [ cl ])
        (mem/f:DI (reg/f:DI 104) [3 _5->value_.gc+0 S8 A64])) -1
     (nil))

;; raviV_op_loadnil (_4, 0, 0);

(insn 10 9 11 (set (reg:SI 1 dx)
        (const_int 0 [0])) -1
     (nil))

(insn 11 10 12 (set (reg:SI 4 si)
        (const_int 0 [0])) -1
     (nil))

(insn 12 11 13 (set (reg:DI 5 di)
        (reg/f:DI 87 [ D.451 ])) -1
     (nil))

(call_insn 13 12 0 (call (mem:QI (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41]  <function_decl 0x7f3164aec700 raviV_op_loadnil>) [0 raviV_op_loadnil S1 A8])
        (const_int 0 [0])) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41]  <function_decl 0x7f3164aec700 raviV_op_loadnil>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:SI (use (reg:SI 4 si))
            (expr_list:SI (use (reg:SI 1 dx))
                (nil)))))

;; base_9 = _8->u.l.base;

(insn 14 13 15 (set (reg/f:DI 105)
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))

(insn 15 14 0 (set (reg/v/f:DI 91 [ base ])
        (mem/f:DI (plus:DI (reg/f:DI 105)
                (const_int 32 [0x20])) [11 _8->u.l.base+0 S8 A64])) -1
     (nil))

;; _11 = _10->k;

(insn 16 15 17 (set (reg/f:DI 106)
        (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ])
                (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) -1
     (nil))

(insn 17 16 0 (set (reg/f:DI 93 [ D.452 ])
        (mem/f:DI (plus:DI (reg/f:DI 106)
                (const_int 48 [0x30])) [11 _10->k+0 S8 A64])) -1
     (nil))

;; _12 = _11->value_.i;

(insn 18 17 0 (set (reg:DI 94 [ D.454 ])
        (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) -1
     (nil))

;; MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _12;

(insn 19 18 0 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64])
        (reg:DI 94 [ D.454 ])) -1
     (nil))

;; MEM[(struct ravi_TValue *)base_9 + 16B].tt_ = 1;

(insn 20 19 0 (set (mem:SI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 24 [0x18])) [5 MEM[(struct ravi_TValue *)base_9 + 16B].tt_+0 S4 A64])
        (const_int 1 [0x1])) -1
     (nil))

;; _15 = _11->value_.i;

(insn 21 20 0 (set (reg:DI 95 [ D.454 ])
        (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) -1
     (nil))

;; MEM[(struct ravi_TValue *)base_9 + 16B].value_.i = _15;

(insn 22 21 0 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64])
        (reg:DI 95 [ D.454 ])) -1
     (nil))

;; printf ("OP_RETURN(pc=%d) return %d args", 13, 1);

(insn 23 22 24 (set (reg:SI 1 dx)
        (const_int 1 [0x1])) -1
     (nil))

(insn 24 23 25 (set (reg:SI 4 si)
        (const_int 13 [0xd])) -1
     (nil))

(insn 25 24 26 (set (reg:DI 5 di)
        (symbol_ref/f:DI ("*.LC0") [flags 0x2]  <var_decl 0x7f3164b07990 *.LC0>)) -1
     (nil))

(insn 26 25 27 (set (reg:QI 0 ax)
        (const_int 0 [0])) -1
     (nil))

(call_insn 27 26 0 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:DI ("printf") [flags 0x41]  <function_decl 0x7f3164af11c0 printf>) [0 printf S1 A8])
            (const_int 0 [0]))) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("printf") [flags 0x41]  <function_decl 0x7f3164af11c0 printf>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list (use (reg:QI 0 ax))
        (expr_list:DI (use (reg:DI 5 di))
            (expr_list:SI (use (reg:SI 4 si))
                (expr_list:SI (use (reg:SI 1 dx))
                    (nil))))))

;; base_20 = _19->u.l.base;

(insn 28 27 29 (set (reg/f:DI 107)
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))

(insn 29 28 0 (set (reg/v/f:DI 97 [ base ])
        (mem/f:DI (plus:DI (reg/f:DI 107)
                (const_int 32 [0x20])) [11 _19->u.l.base+0 S8 A64])) -1
     (nil))

;; L_3(D)->top = _21;

(insn 30 29 31 (parallel [
            (set (reg:DI 108)
                (plus:DI (reg/v/f:DI 97 [ base ])
                    (const_int 32 [0x20])))
            (clobber (reg:CC 17 flags))
        ]) -1
     (nil))

(insn 31 30 0 (set (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 16 [0x10])) [11 L_3(D)->top+0 S8 A64])
        (reg:DI 108)) -1
     (nil))

;; if (_24 > 0)

(insn 32 31 33 (set (reg/f:DI 109)
        (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ])
                (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) -1
     (nil))

(insn 33 32 34 (set (reg:CCNO 17 flags)
        (compare:CCNO (mem:SI (plus:DI (reg/f:DI 109)
                    (const_int 32 [0x20])) [5 _23->sizep+0 S4 A64])
            (const_int 0 [0]))) -1
     (nil))

(jump_insn 34 33 0 (set (pc)
        (if_then_else (le (reg:CCNO 17 flags)
                (const_int 0 [0]))
            (label_ref 0)
            (pc))) -1
     (int_list:REG_BR_PROB 3666 (nil)))

;; Generating RTL for gimple basic block 3

;; OP_RETURN_if_sizep_gt_0_12_23:

(code_label 35 34 36 4 ("OP_RETURN_if_sizep_gt_0_12_23") [0 uses])

(note 36 35 0 NOTE_INSN_BASIC_BLOCK)

;; luaF_close (L_3(D), base_20);

(insn 37 36 38 (set (reg:DI 4 si)
        (reg/v/f:DI 97 [ base ])) -1
     (nil))

(insn 38 37 39 (set (reg:DI 5 di)
        (reg/v/f:DI 103 [ L ])) -1
     (nil))

(call_insn 39 38 0 (call (mem:QI (symbol_ref:DI ("luaF_close") [flags 0x41]  <function_decl 0x7f3164adcc40 luaF_close>) [0 luaF_close S1 A8])
        (const_int 0 [0])) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaF_close") [flags 0x41]  <function_decl 0x7f3164adcc40 luaF_close>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:DI (use (reg:DI 4 si))
            (nil))))

;; Generating RTL for gimple basic block 4

;; OP_RETURN_else_sizep_gt_0_12_24:

(code_label 40 39 41 3 ("OP_RETURN_else_sizep_gt_0_12_24") [0 uses])

(note 41 40 0 NOTE_INSN_BASIC_BLOCK)

;; luaD_poscall (L_3(D), _26);

(insn 42 41 43 (parallel [
            (set (reg:DI 110 [ D.452 ])
                (plus:DI (reg/v/f:DI 97 [ base ])
                    (const_int 16 [0x10])))
            (clobber (reg:CC 17 flags))
        ]) -1
     (nil))

(insn 43 42 44 (set (reg:DI 4 si)
        (reg:DI 110 [ D.452 ])) -1
     (nil))

(insn 44 43 45 (set (reg:DI 5 di)
        (reg/v/f:DI 103 [ L ])) -1
     (nil))

(call_insn 45 44 0 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:DI ("luaD_poscall") [flags 0x41]  <function_decl 0x7f3164adc7e0 luaD_poscall>) [0 luaD_poscall S1 A8])
            (const_int 0 [0]))) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaD_poscall") [flags 0x41]  <function_decl 0x7f3164adc7e0 luaD_poscall>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:DI (use (reg:DI 4 si))
            (nil))))

;; return 1;

(insn 46 45 47 (set (reg:SI 102 [ <retval> ])
        (const_int 1 [0x1])) -1
     (nil))

(jump_insn 47 46 48 (set (pc)
        (label_ref 0)) -1
     (nil))

(barrier 48 47 0)


try_optimize_cfg iteration 1

Merging block 3 into block 2...
Merged blocks 2 and 3.
Merged 2 and 3 without moving.
Deleted label in block 4.
Removing jump 47.
Merging block 6 into block 5...
Merged blocks 5 and 6.
Merged 5 and 6 without moving.


try_optimize_cfg iteration 2

fix_loop_structure: fixing up loops for function


;;
;; Full RTL generated for this function:
;;
(note 1 0 4 NOTE_INSN_DELETED)
(note 4 1 2 2 [bb 2] NOTE_INSN_BASIC_BLOCK)
(insn 2 4 3 2 (set (reg/v/f:DI 103 [ L ])
        (reg:DI 5 di [ L ])) -1
     (nil))
(note 3 2 5 2 NOTE_INSN_FUNCTION_BEG)
(note 5 3 7 2 ("entry") NOTE_INSN_DELETED_LABEL 2)
(insn 7 5 8 2 (set (reg/f:DI 87 [ D.451 ])
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))
(insn 8 7 9 2 (set (reg/f:DI 104)
        (mem/f:DI (reg/f:DI 87 [ D.451 ]) [11 _4->func+0 S8 A64])) -1
     (nil))
(insn 9 8 10 2 (set (reg/v/f:DI 89 [ cl ])
        (mem/f:DI (reg/f:DI 104) [3 _5->value_.gc+0 S8 A64])) -1
     (nil))
(insn 10 9 11 2 (set (reg:SI 1 dx)
        (const_int 0 [0])) -1
     (nil))
(insn 11 10 12 2 (set (reg:SI 4 si)
        (const_int 0 [0])) -1
     (nil))
(insn 12 11 13 2 (set (reg:DI 5 di)
        (reg/f:DI 87 [ D.451 ])) -1
     (nil))
(call_insn 13 12 14 2 (call (mem:QI (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41]  <function_decl 0x7f3164aec700 raviV_op_loadnil>) [0 raviV_op_loadnil S1 A8])
        (const_int 0 [0])) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("raviV_op_loadnil") [flags 0x41]  <function_decl 0x7f3164aec700 raviV_op_loadnil>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:SI (use (reg:SI 4 si))
            (expr_list:SI (use (reg:SI 1 dx))
                (nil)))))
(insn 14 13 15 2 (set (reg/f:DI 105)
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))
(insn 15 14 16 2 (set (reg/v/f:DI 91 [ base ])
        (mem/f:DI (plus:DI (reg/f:DI 105)
                (const_int 32 [0x20])) [11 _8->u.l.base+0 S8 A64])) -1
     (nil))
(insn 16 15 17 2 (set (reg/f:DI 106)
        (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ])
                (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) -1
     (nil))
(insn 17 16 18 2 (set (reg/f:DI 93 [ D.452 ])
        (mem/f:DI (plus:DI (reg/f:DI 106)
                (const_int 48 [0x30])) [11 _10->k+0 S8 A64])) -1
     (nil))
(insn 18 17 19 2 (set (reg:DI 94 [ D.454 ])
        (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) -1
     (nil))
(insn 19 18 20 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64])
        (reg:DI 94 [ D.454 ])) -1
     (nil))
(insn 20 19 21 2 (set (mem:SI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 24 [0x18])) [5 MEM[(struct ravi_TValue *)base_9 + 16B].tt_+0 S4 A64])
        (const_int 1 [0x1])) -1
     (nil))
(insn 21 20 22 2 (set (reg:DI 95 [ D.454 ])
        (mem:DI (reg/f:DI 93 [ D.452 ]) [7 _11->value_.i+0 S8 A64])) -1
     (nil))
(insn 22 21 23 2 (set (mem:DI (plus:DI (reg/v/f:DI 91 [ base ])
                (const_int 16 [0x10])) [7 MEM[(struct ravi_TValue *)base_9 + 16B].value_.i+0 S8 A64])
        (reg:DI 95 [ D.454 ])) -1
     (nil))
(insn 23 22 24 2 (set (reg:SI 1 dx)
        (const_int 1 [0x1])) -1
     (nil))
(insn 24 23 25 2 (set (reg:SI 4 si)
        (const_int 13 [0xd])) -1
     (nil))
(insn 25 24 26 2 (set (reg:DI 5 di)
        (symbol_ref/f:DI ("*.LC0") [flags 0x2]  <var_decl 0x7f3164b07990 *.LC0>)) -1
     (nil))
(insn 26 25 27 2 (set (reg:QI 0 ax)
        (const_int 0 [0])) -1
     (nil))
(call_insn 27 26 28 2 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:DI ("printf") [flags 0x41]  <function_decl 0x7f3164af11c0 printf>) [0 printf S1 A8])
            (const_int 0 [0]))) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("printf") [flags 0x41]  <function_decl 0x7f3164af11c0 printf>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list (use (reg:QI 0 ax))
        (expr_list:DI (use (reg:DI 5 di))
            (expr_list:SI (use (reg:SI 4 si))
                (expr_list:SI (use (reg:SI 1 dx))
                    (nil))))))
(insn 28 27 29 2 (set (reg/f:DI 107)
        (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 32 [0x20])) [13 L_3(D)->ci+0 S8 A64])) -1
     (nil))
(insn 29 28 30 2 (set (reg/v/f:DI 97 [ base ])
        (mem/f:DI (plus:DI (reg/f:DI 107)
                (const_int 32 [0x20])) [11 _19->u.l.base+0 S8 A64])) -1
     (nil))
(insn 30 29 31 2 (parallel [
            (set (reg:DI 108)
                (plus:DI (reg/v/f:DI 97 [ base ])
                    (const_int 32 [0x20])))
            (clobber (reg:CC 17 flags))
        ]) -1
     (nil))
(insn 31 30 32 2 (set (mem/f:DI (plus:DI (reg/v/f:DI 103 [ L ])
                (const_int 16 [0x10])) [11 L_3(D)->top+0 S8 A64])
        (reg:DI 108)) -1
     (nil))
(insn 32 31 33 2 (set (reg/f:DI 109)
        (mem/f:DI (plus:DI (reg/v/f:DI 89 [ cl ])
                (const_int 24 [0x18])) [27 cl_6->p+0 S8 A64])) -1
     (nil))
(insn 33 32 34 2 (set (reg:CCNO 17 flags)
        (compare:CCNO (mem:SI (plus:DI (reg/f:DI 109)
                    (const_int 32 [0x20])) [5 _23->sizep+0 S4 A64])
            (const_int 0 [0]))) -1
     (nil))
(jump_insn 34 33 36 2 (set (pc)
        (if_then_else (le (reg:CCNO 17 flags)
                (const_int 0 [0]))
            (label_ref 40)
            (pc))) -1
     (int_list:REG_BR_PROB 3666 (nil))
 -> 40)
(note 36 34 35 4 [bb 4] NOTE_INSN_BASIC_BLOCK)
(note 35 36 37 4 ("OP_RETURN_if_sizep_gt_0_12_23") NOTE_INSN_DELETED_LABEL 4)
(insn 37 35 38 4 (set (reg:DI 4 si)
        (reg/v/f:DI 97 [ base ])) -1
     (nil))
(insn 38 37 39 4 (set (reg:DI 5 di)
        (reg/v/f:DI 103 [ L ])) -1
     (nil))
(call_insn 39 38 40 4 (call (mem:QI (symbol_ref:DI ("luaF_close") [flags 0x41]  <function_decl 0x7f3164adcc40 luaF_close>) [0 luaF_close S1 A8])
        (const_int 0 [0])) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaF_close") [flags 0x41]  <function_decl 0x7f3164adcc40 luaF_close>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:DI (use (reg:DI 4 si))
            (nil))))
(code_label 40 39 41 5 3 ("OP_RETURN_else_sizep_gt_0_12_24") [1 uses])
(note 41 40 42 5 [bb 5] NOTE_INSN_BASIC_BLOCK)
(insn 42 41 43 5 (parallel [
            (set (reg:DI 110 [ D.452 ])
                (plus:DI (reg/v/f:DI 97 [ base ])
                    (const_int 16 [0x10])))
            (clobber (reg:CC 17 flags))
        ]) -1
     (nil))
(insn 43 42 44 5 (set (reg:DI 4 si)
        (reg:DI 110 [ D.452 ])) -1
     (nil))
(insn 44 43 45 5 (set (reg:DI 5 di)
        (reg/v/f:DI 103 [ L ])) -1
     (nil))
(call_insn 45 44 46 5 (set (reg:SI 0 ax)
        (call (mem:QI (symbol_ref:DI ("luaD_poscall") [flags 0x41]  <function_decl 0x7f3164adc7e0 luaD_poscall>) [0 luaD_poscall S1 A8])
            (const_int 0 [0]))) -1
     (expr_list:REG_CALL_DECL (symbol_ref:DI ("luaD_poscall") [flags 0x41]  <function_decl 0x7f3164adc7e0 luaD_poscall>)
        (expr_list:REG_EH_REGION (const_int 0 [0])
            (nil)))
    (expr_list:DI (use (reg:DI 5 di))
        (expr_list:DI (use (reg:DI 4 si))
            (nil))))
(insn 46 45 50 5 (set (reg:SI 102 [ <retval> ])
        (const_int 1 [0x1])) -1
     (nil))
(insn 50 46 51 5 (set (reg/i:SI 0 ax)
        (reg:SI 102 [ <retval> ])) -1
     (nil))
(insn 51 50 0 5 (use (reg/i:SI 0 ax)) -1
     (nil))
; end of dump from pass_expand (../../src/gcc/cfgexpand.c:5864)