From 39992145e8d9b924597e0ec39de0bfd049d05dd5 Mon Sep 17 00:00:00 2001
From: David Malcolm <dmalcolm@redhat.com>
Date: Fri, 4 Nov 2016 12:46:19 -0400
Subject: [PATCH 25/28] FIXME: function_reader fixups

---
 gcc/config/aarch64/aarch64.c                       |  54 +++++
 gcc/config/i386/i386.c                             | 207 +++++++++++++++++
 gcc/read-rtl-function.c                            | 253 +--------------------
 gcc/testsuite/selftests/aarch64/times-two.rtl      |  18 +-
 .../selftests/copy-hard-reg-into-frame.rtl         |  15 --
 .../selftests/x86_64/copy-hard-reg-into-frame.rtl  |  15 ++
 6 files changed, 286 insertions(+), 276 deletions(-)
 delete mode 100644 gcc/testsuite/selftests/copy-hard-reg-into-frame.rtl
 create mode 100644 gcc/testsuite/selftests/x86_64/copy-hard-reg-into-frame.rtl

diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c
index b7d4640..27e789d 100644
--- a/gcc/config/aarch64/aarch64.c
+++ b/gcc/config/aarch64/aarch64.c
@@ -64,6 +64,8 @@
 #include "sched-int.h"
 #include "target-globals.h"
 #include "common/common-target.h"
+#include "selftest.h"
+#include "selftest-rtl.h"
 
 /* This file should be included last.  */
 #include "target-def.h"
@@ -14168,6 +14170,53 @@ aarch64_optab_supported_p (int op, machine_mode mode1, machine_mode,
     }
 }
 
+/* Target-specific selftests.  */
+
+#if CHECKING_P
+
+namespace selftest {
+
+/* Verify that the loader copes a dump from print_rtx_function.
+   This test is target-specific since the dump contains target-specific
+   hard reg names.  */
+
+static void
+aarch64_test_loading_full_dump ()
+{
+  /* Only run this test for target==aarch64.  */
+#ifndef GCC_AARCH64_H
+  return;
+#endif
+
+  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("aarch64/times-two.rtl"));
+
+  ASSERT_STREQ ("times_two", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
+
+  rtx_insn *insn_1 = get_insn_by_uid (1);
+  ASSERT_EQ (NOTE, GET_CODE (insn_1));
+
+  rtx_insn *insn_15 = get_insn_by_uid (15);
+  ASSERT_EQ (INSN, GET_CODE (insn_15));
+  ASSERT_EQ (USE, GET_CODE (PATTERN (insn_15)));
+
+  /* Verify crtl->return_rtx.  */
+  ASSERT_EQ (REG, GET_CODE (crtl->return_rtx));
+  ASSERT_EQ (0, REGNO (crtl->return_rtx));
+  ASSERT_EQ (SImode, GET_MODE (crtl->return_rtx));
+}
+
+/* Run all target-specific selftests.  */
+
+static void
+aarch64_run_selftests (void)
+{
+  aarch64_test_loading_full_dump ();
+}
+
+} // namespace selftest
+
+#endif /* #if CHECKING_P */
+
 #undef TARGET_ADDRESS_COST
 #define TARGET_ADDRESS_COST aarch64_address_cost
 
@@ -14502,6 +14551,11 @@ aarch64_optab_supported_p (int op, machine_mode mode1, machine_mode,
 #undef TARGET_OMIT_STRUCT_RETURN_REG
 #define TARGET_OMIT_STRUCT_RETURN_REG true
 
+#if CHECKING_P
+#undef TARGET_RUN_TARGET_SELFTESTS
+#define TARGET_RUN_TARGET_SELFTESTS selftest::aarch64_run_selftests
+#endif /* #if CHECKING_P */
+
 struct gcc_target targetm = TARGET_INITIALIZER;
 
 #include "gt-aarch64.h"
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index bffba80..f0ae017 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -50627,12 +50627,219 @@ ix86_test_dumping_hard_regs ()
   ASSERT_RTL_DUMP_EQ ("(reg:SI dx)", gen_raw_REG (SImode, 1));
 }
 
+/* Verify loading an RTL dump; specifically a dump of copying
+   a param on x86_64 from a hard reg into the frame.
+   This test is target-specific since the dump contains target-specific
+   hard reg names.  */
+
+static void
+ix86_test_loading_dump_fragment_1 ()
+{
+  rtl_dump_test t (SELFTEST_LOCATION,
+		   locate_file ("x86_64/copy-hard-reg-into-frame.rtl"));
+
+  rtx_insn *insn = get_insn_by_uid (1);
+
+  /* The block structure and indentation here is purely for
+     readability; it mirrors the structure of the rtx.  */
+  tree mem_expr;
+  {
+    rtx pat = PATTERN (insn);
+    ASSERT_EQ (SET, GET_CODE (pat));
+    {
+      rtx dest = SET_DEST (pat);
+      ASSERT_EQ (MEM, GET_CODE (dest));
+      /* Verify the "/c" was parsed.  */
+      ASSERT_TRUE (RTX_FLAG (dest, call));
+      ASSERT_EQ (SImode, GET_MODE (dest));
+      {
+	rtx addr = XEXP (dest, 0);
+	ASSERT_EQ (PLUS, GET_CODE (addr));
+	ASSERT_EQ (DImode, GET_MODE (addr));
+	{
+	  rtx lhs = XEXP (addr, 0);
+	  ASSERT_EQ (REG, GET_CODE (lhs));
+	  /* Verify the "/f" was parsed.  */
+	  ASSERT_TRUE (RTX_FLAG (lhs, frame_related));
+	  ASSERT_EQ (DImode, GET_MODE (lhs));
+	}
+	{
+	  rtx rhs = XEXP (addr, 1);
+	  ASSERT_EQ (CONST_INT, GET_CODE (rhs));
+	  ASSERT_EQ (-4, INTVAL (rhs));
+	}
+      }
+      /* Verify the "[1 i+0 S4 A32]" was parsed.  */
+      ASSERT_EQ (1, MEM_ALIAS_SET (dest));
+      /* "i" should have been handled by synthesizing a global int
+	 variable named "i".  */
+      mem_expr = MEM_EXPR (dest);
+      ASSERT_NE (mem_expr, NULL);
+      ASSERT_EQ (VAR_DECL, TREE_CODE (mem_expr));
+      ASSERT_EQ (integer_type_node, TREE_TYPE (mem_expr));
+      ASSERT_EQ (IDENTIFIER_NODE, TREE_CODE (DECL_NAME (mem_expr)));
+      ASSERT_STREQ ("i", IDENTIFIER_POINTER (DECL_NAME (mem_expr)));
+      /* "+0".  */
+      ASSERT_TRUE (MEM_OFFSET_KNOWN_P (dest));
+      ASSERT_EQ (0, MEM_OFFSET (dest));
+      /* "S4".  */
+      ASSERT_EQ (4, MEM_SIZE (dest));
+      /* "A32.  */
+      ASSERT_EQ (32, MEM_ALIGN (dest));
+    }
+    {
+      rtx src = SET_SRC (pat);
+      ASSERT_EQ (REG, GET_CODE (src));
+      ASSERT_EQ (SImode, GET_MODE (src));
+      ASSERT_EQ (5, REGNO (src));
+      tree reg_expr = REG_EXPR (src);
+      /* "i" here should point to the same var as for the MEM_EXPR.  */
+      ASSERT_EQ (reg_expr, mem_expr);
+    }
+  }
+}
+
+/* Verify that the RTL loader copes with a call_insn dump.
+   This test is target-specific since the dump contains a target-specific
+   hard reg name.  */
+
+static void
+ix86_test_loading_call_insn ()
+{
+  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/call-insn.rtl"));
+
+  rtx_insn *insn = get_insns ();
+  ASSERT_EQ (CALL_INSN, GET_CODE (insn));
+
+  /* "/j".  */
+  ASSERT_TRUE (RTX_FLAG (insn, jump));
+
+  rtx pat = PATTERN (insn);
+  ASSERT_EQ (CALL, GET_CODE (SET_SRC (pat)));
+
+  /* Verify REG_NOTES.  */
+  {
+    /* "(expr_list:REG_CALL_DECL".   */
+    ASSERT_EQ (EXPR_LIST, GET_CODE (REG_NOTES (insn)));
+    rtx_expr_list *note0 = as_a <rtx_expr_list *> (REG_NOTES (insn));
+    ASSERT_EQ (REG_CALL_DECL, REG_NOTE_KIND (note0));
+
+    /* "(expr_list:REG_EH_REGION (const_int 0 [0])".  */
+    rtx_expr_list *note1 = note0->next ();
+    ASSERT_EQ (REG_EH_REGION, REG_NOTE_KIND (note1));
+
+    ASSERT_EQ (NULL, note1->next ());
+  }
+
+  /* Verify CALL_INSN_FUNCTION_USAGE.  */
+  {
+    /* "(expr_list:DF (use (reg:DF 21 xmm0))".  */
+    rtx_expr_list *usage
+      = as_a <rtx_expr_list *> (CALL_INSN_FUNCTION_USAGE (insn));
+    ASSERT_EQ (EXPR_LIST, GET_CODE (usage));
+    ASSERT_EQ (DFmode, GET_MODE (usage));
+    ASSERT_EQ (USE, GET_CODE (usage->element ()));
+    ASSERT_EQ (NULL, usage->next ());
+  }
+}
+
+/* Verify that the RTL loader copes a dump from print_rtx_function.
+   This test is target-specific since the dump contains target-specific
+   hard reg names.  */
+
+static void
+ix86_test_loading_full_dump ()
+{
+  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/times-two.rtl"));
+
+  ASSERT_STREQ ("times_two", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
+
+  rtx_insn *insn_1 = get_insn_by_uid (1);
+  ASSERT_EQ (NOTE, GET_CODE (insn_1));
+
+  rtx_insn *insn_7 = get_insn_by_uid (7);
+  ASSERT_EQ (INSN, GET_CODE (insn_7));
+  ASSERT_EQ (PARALLEL, GET_CODE (PATTERN (insn_7)));
+
+  rtx_insn *insn_15 = get_insn_by_uid (15);
+  ASSERT_EQ (INSN, GET_CODE (insn_15));
+  ASSERT_EQ (USE, GET_CODE (PATTERN (insn_15)));
+
+  /* Verify crtl->return_rtx.  */
+  ASSERT_EQ (REG, GET_CODE (crtl->return_rtx));
+  ASSERT_EQ (0, REGNO (crtl->return_rtx));
+  ASSERT_EQ (SImode, GET_MODE (crtl->return_rtx));
+}
+
+/* Verify that the RTL loader copes with UNSPEC and UNSPEC_VOLATILE insns.
+   In particular, verify that it correctly loads the 2nd operand.
+   This test is target-specific since these are machine-specific
+   operands (and enums).  */
+
+static void
+ix86_test_loading_unspec ()
+{
+  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/unspec.rtl"));
+
+  ASSERT_STREQ ("test_unspec", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
+
+  ASSERT_TRUE (cfun);
+
+  /* Test of an UNSPEC.  */
+   rtx_insn *insn = get_insns ();
+  ASSERT_EQ (INSN, GET_CODE (insn));
+  rtx set = single_set (insn);
+  ASSERT_NE (NULL, set);
+  rtx dst = SET_DEST (set);
+  ASSERT_EQ (MEM, GET_CODE (dst));
+  rtx src = SET_SRC (set);
+  ASSERT_EQ (UNSPEC, GET_CODE (src));
+  ASSERT_EQ (BLKmode, GET_MODE (src));
+  ASSERT_EQ (UNSPEC_MEMORY_BLOCKAGE, XINT (src, 1));
+
+  rtx v0 = XVECEXP (src, 0, 0);
+
+  /* Verify that the two uses of the first SCRATCH have pointer
+     equality.  */
+  rtx scratch_a = XEXP (dst, 0);
+  ASSERT_EQ (SCRATCH, GET_CODE (scratch_a));
+
+  rtx scratch_b = XEXP (v0, 0);
+  ASSERT_EQ (SCRATCH, GET_CODE (scratch_b));
+
+  ASSERT_EQ (scratch_a, scratch_b);
+
+  /* Verify that the two mems are thus treated as equal.  */
+  ASSERT_TRUE (rtx_equal_p (dst, v0));
+
+  /* Verify the the insn is recognized.  */
+  ASSERT_NE(-1, recog_memoized (insn));
+
+  /* Test of an UNSPEC_VOLATILE, which has its own enum values.  */
+  insn = NEXT_INSN (insn);
+  ASSERT_EQ (INSN, GET_CODE (insn));
+
+  set = single_set (insn);
+  ASSERT_NE (NULL, set);
+
+  src = SET_SRC (set);
+  ASSERT_EQ (UNSPEC_VOLATILE, GET_CODE (src));
+  ASSERT_EQ (UNSPECV_RDTSCP, XINT (src, 1));
+}
+
 /* Run all target-specific selftests.  */
 
 static void
 ix86_run_selftests (void)
 {
   ix86_test_dumping_hard_regs ();
+
+  /* Various tests of loading RTL dumps, here because they contain
+     ix86-isms (e.g. names of hard regs).  */
+  ix86_test_loading_dump_fragment_1 ();
+  ix86_test_loading_call_insn ();
+  ix86_test_loading_full_dump ();
+  ix86_test_loading_unspec ();
 }
 
 } // namespace selftest
diff --git a/gcc/read-rtl-function.c b/gcc/read-rtl-function.c
index 33f86a2..9576d26 100644
--- a/gcc/read-rtl-function.c
+++ b/gcc/read-rtl-function.c
@@ -1818,85 +1818,10 @@ test_loading_dump_fragment_1 ()
   ASSERT_EQ (insn_2, BB_END (bb2));
 }
 
-/* Verify loading another RTL dump; this time a dump of copying
-   a param on x86_64 from a hard reg into the frame.  */
-
-static void
-test_loading_dump_fragment_2 ()
-{
-  /* Only run this test for i386, since it hardcodes a hard reg name.  */
-#ifndef I386_OPTS_H
-  return;
-#endif
-
-  rtl_dump_test t (SELFTEST_LOCATION,
-		   locate_file ("copy-hard-reg-into-frame.rtl"));
-
-  rtx_insn *insn = get_insn_by_uid (1);
-
-  /* The block structure and indentation here is purely for
-     readability; it mirrors the structure of the rtx.  */
-  tree mem_expr;
-  {
-    rtx pat = PATTERN (insn);
-    ASSERT_EQ (SET, GET_CODE (pat));
-    {
-      rtx dest = SET_DEST (pat);
-      ASSERT_EQ (MEM, GET_CODE (dest));
-      /* Verify the "/c" was parsed.  */
-      ASSERT_TRUE (RTX_FLAG (dest, call));
-      ASSERT_EQ (SImode, GET_MODE (dest));
-      {
-	rtx addr = XEXP (dest, 0);
-	ASSERT_EQ (PLUS, GET_CODE (addr));
-	ASSERT_EQ (DImode, GET_MODE (addr));
-	{
-	  rtx lhs = XEXP (addr, 0);
-	  ASSERT_EQ (REG, GET_CODE (lhs));
-	  /* Verify the "/f" was parsed.  */
-	  ASSERT_TRUE (RTX_FLAG (lhs, frame_related));
-	  ASSERT_EQ (DImode, GET_MODE (lhs));
-	}
-	{
-	  rtx rhs = XEXP (addr, 1);
-	  ASSERT_EQ (CONST_INT, GET_CODE (rhs));
-	  ASSERT_EQ (-4, INTVAL (rhs));
-	}
-      }
-      /* Verify the "[1 i+0 S4 A32]" was parsed.  */
-      ASSERT_EQ (1, MEM_ALIAS_SET (dest));
-      /* "i" should have been handled by synthesizing a global int
-	 variable named "i".  */
-      mem_expr = MEM_EXPR (dest);
-      ASSERT_NE (mem_expr, NULL);
-      ASSERT_EQ (VAR_DECL, TREE_CODE (mem_expr));
-      ASSERT_EQ (integer_type_node, TREE_TYPE (mem_expr));
-      ASSERT_EQ (IDENTIFIER_NODE, TREE_CODE (DECL_NAME (mem_expr)));
-      ASSERT_STREQ ("i", IDENTIFIER_POINTER (DECL_NAME (mem_expr)));
-      /* "+0".  */
-      ASSERT_TRUE (MEM_OFFSET_KNOWN_P (dest));
-      ASSERT_EQ (0, MEM_OFFSET (dest));
-      /* "S4".  */
-      ASSERT_EQ (4, MEM_SIZE (dest));
-      /* "A32.  */
-      ASSERT_EQ (32, MEM_ALIGN (dest));
-    }
-    {
-      rtx src = SET_SRC (pat);
-      ASSERT_EQ (REG, GET_CODE (src));
-      ASSERT_EQ (SImode, GET_MODE (src));
-      ASSERT_EQ (5, REGNO (src));
-      tree reg_expr = REG_EXPR (src);
-      /* "i" here should point to the same var as for the MEM_EXPR.  */
-      ASSERT_EQ (reg_expr, mem_expr);
-    }
-  }
-}
-
 /* Verify loading another RTL dump.  */
 
 static void
-test_loading_dump_fragment_3 ()
+test_loading_dump_fragment_2 ()
 {
   rtl_dump_test t (SELFTEST_LOCATION, locate_file ("simple-cse.rtl"));
 
@@ -2136,111 +2061,6 @@ test_loading_symbol_ref ()
   /* TODO: we don't yet load SYMBOL_REF_DECL.  */
 }
 
-/* Verify that the loader copes with a call_insn dump.  */
-
-static void
-test_loading_call_insn_x86_64 ()
-{
-  /* Only run this test for i386.  */
-#ifndef I386_OPTS_H
-  return;
-#endif
-
-  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/call-insn.rtl"));
-
-  rtx_insn *insn = get_insns ();
-  ASSERT_EQ (CALL_INSN, GET_CODE (insn));
-
-  /* "/j".  */
-  ASSERT_TRUE (RTX_FLAG (insn, jump));
-
-  rtx pat = PATTERN (insn);
-  ASSERT_EQ (CALL, GET_CODE (SET_SRC (pat)));
-
-  /* Verify REG_NOTES.  */
-  {
-    /* "(expr_list:REG_CALL_DECL".   */
-    ASSERT_EQ (EXPR_LIST, GET_CODE (REG_NOTES (insn)));
-    rtx_expr_list *note0 = as_a <rtx_expr_list *> (REG_NOTES (insn));
-    ASSERT_EQ (REG_CALL_DECL, REG_NOTE_KIND (note0));
-
-    /* "(expr_list:REG_EH_REGION (const_int 0 [0])".  */
-    rtx_expr_list *note1 = note0->next ();
-    ASSERT_EQ (REG_EH_REGION, REG_NOTE_KIND (note1));
-
-    ASSERT_EQ (NULL, note1->next ());
-  }
-
-  /* Verify CALL_INSN_FUNCTION_USAGE.  */
-  {
-    /* "(expr_list:DF (use (reg:DF 21 xmm0))".  */
-    rtx_expr_list *usage
-      = as_a <rtx_expr_list *> (CALL_INSN_FUNCTION_USAGE (insn));
-    ASSERT_EQ (EXPR_LIST, GET_CODE (usage));
-    ASSERT_EQ (DFmode, GET_MODE (usage));
-    ASSERT_EQ (USE, GET_CODE (usage->element ()));
-    ASSERT_EQ (NULL, usage->next ());
-  }
-}
-
-/* Verify that the loader copes a dump from print_rtx_function.  */
-
-static void
-test_loading_full_dump_aarch64 ()
-{
-  /* Only run this test for target==aarch64.  */
-#ifndef GCC_AARCH64_H
-  return;
-#endif
-
-  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("aarch64/times-two.rtl"));
-
-  ASSERT_STREQ ("times_two", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
-
-  rtx_insn *insn_1 = get_insn_by_uid (1);
-  ASSERT_EQ (NOTE, GET_CODE (insn_1));
-
-  rtx_insn *insn_9 = get_insn_by_uid (9);
-  ASSERT_EQ (INSN, GET_CODE (insn_9));
-  ASSERT_EQ (USE, GET_CODE (PATTERN (insn_9)));
-
-  /* Verify crtl->return_rtx.  */
-  ASSERT_EQ (REG, GET_CODE (crtl->return_rtx));
-  ASSERT_EQ (0, REGNO (crtl->return_rtx));
-  ASSERT_EQ (SImode, GET_MODE (crtl->return_rtx));
-}
-
-/* Verify that the loader copes a dump from print_rtx_function.  */
-
-static void
-test_loading_full_dump_x86_64 ()
-{
-  /* Only run this test for i386.  */
-#ifndef I386_OPTS_H
-  return;
-#endif
-
-  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/times-two.rtl"));
-
-  ASSERT_STREQ ("times_two", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
-
-  rtx_insn *insn_1 = get_insn_by_uid (1);
-  ASSERT_EQ (NOTE, GET_CODE (insn_1));
-
-  rtx_insn *insn_7 = get_insn_by_uid (7);
-  ASSERT_EQ (INSN, GET_CODE (insn_7));
-  ASSERT_EQ (PARALLEL, GET_CODE (PATTERN (insn_7)));
-
-  rtx_insn *insn_15 = get_insn_by_uid (15);
-  ASSERT_EQ (INSN, GET_CODE (insn_15));
-  ASSERT_EQ (USE, GET_CODE (PATTERN (insn_15)));
-
-  /* Verify crtl->return_rtx.  */
-  ASSERT_EQ (REG, GET_CODE (crtl->return_rtx));
-  ASSERT_EQ (0, REGNO (crtl->return_rtx));
-  ASSERT_EQ (SImode, GET_MODE (crtl->return_rtx));
-}
-
 /* Verify that the loader can rebuild a CFG.  */
 
 static void
@@ -2338,72 +2158,6 @@ test_loading_bb_index ()
   ASSERT_EQ (42, bb42->index);
 }
 
-/* Verify that the loader copes with UNSPEC and UNSPEC_VOLATILE insns.
-   In particular, verify that it correctly loads the 2nd operand.
-   These are machine-specific operands (and enums), so the relevant
-   parts of the test case are wrapped accordingly.  */
-
-static void
-test_loading_unspec ()
-{
-#ifndef I386_OPTS_H
-  return;
-#endif
-
-  rtl_dump_test t (SELFTEST_LOCATION, locate_file ("x86_64/unspec.rtl"));
-
-  ASSERT_STREQ ("test_unspec", IDENTIFIER_POINTER (DECL_NAME (cfun->decl)));
-
-  ASSERT_TRUE (cfun);
-
-  /* Test of an UNSPEC.  */
-   rtx_insn *insn = get_insns ();
-  ASSERT_EQ (INSN, GET_CODE (insn));
-  rtx set = single_set (insn);
-  ASSERT_NE (NULL, set);
-  rtx dst = SET_DEST (set);
-  ASSERT_EQ (MEM, GET_CODE (dst));
-  rtx src = SET_SRC (set);
-  ASSERT_EQ (UNSPEC, GET_CODE (src));
-  ASSERT_EQ (BLKmode, GET_MODE (src));
-#ifdef I386_OPTS_H
-  ASSERT_EQ (UNSPEC_MEMORY_BLOCKAGE, XINT (src, 1));
-#endif
-
-  rtx v0 = XVECEXP (src, 0, 0);
-
-  /* Verify that the two uses of the first SCRATCH have pointer
-     equality.  */
-  rtx scratch_a = XEXP (dst, 0);
-  ASSERT_EQ (SCRATCH, GET_CODE (scratch_a));
-
-  rtx scratch_b = XEXP (v0, 0);
-  ASSERT_EQ (SCRATCH, GET_CODE (scratch_b));
-
-  ASSERT_EQ (scratch_a, scratch_b);
-
-  /* Verify that the two mems are thus treated as equal.  */
-  ASSERT_TRUE (rtx_equal_p (dst, v0));
-
-#ifdef I386_OPTS_H
-  /* Verify the the insn is recognized.  */
-  ASSERT_NE(-1, recog_memoized (insn));
-#endif
-
-  /* Test of an UNSPEC_VOLATILE, which has its own enum values.  */
-  insn = NEXT_INSN (insn);
-  ASSERT_EQ (INSN, GET_CODE (insn));
-
-  set = single_set (insn);
-  ASSERT_NE (NULL, set);
-
-  src = SET_SRC (set);
-  ASSERT_EQ (UNSPEC_VOLATILE, GET_CODE (src));
-#ifdef I386_OPTS_H
-  ASSERT_EQ (UNSPECV_RDTSCP, XINT (src, 1));
-#endif
-}
-
 /* Run all of the selftests within this file.  */
 
 void
@@ -2413,7 +2167,6 @@ read_rtl_function_c_tests ()
   test_parsing_regnos ();
   test_loading_dump_fragment_1 ();
   test_loading_dump_fragment_2 ();
-  test_loading_dump_fragment_3 ();
   test_loading_labels ();
   test_loading_insn_with_mode ();
   test_loading_jump_to_label_ref ();
@@ -2423,12 +2176,8 @@ read_rtl_function_c_tests ()
   test_loading_note_insn_deleted ();
   test_loading_const_int ();
   test_loading_symbol_ref ();
-  test_loading_call_insn_x86_64 ();
-  test_loading_full_dump_aarch64 ();
-  test_loading_full_dump_x86_64 ();
   test_loading_cfg ();
   test_loading_bb_index ();
-  test_loading_unspec ();
 }
 
 } // namespace selftest
diff --git a/gcc/testsuite/selftests/aarch64/times-two.rtl b/gcc/testsuite/selftests/aarch64/times-two.rtl
index 118de2c..dbce67e 100644
--- a/gcc/testsuite/selftests/aarch64/times-two.rtl
+++ b/gcc/testsuite/selftests/aarch64/times-two.rtl
@@ -1,29 +1,29 @@
 (function "times_two"
   (insn-chain
-    (cnote NOTE_INSN_DELETED)
+    (cnote 1 NOTE_INSN_DELETED)
     (block 2
       (edge-from entry (flags "FALLTHRU"))
-      (cnote [bb 2] NOTE_INSN_BASIC_BLOCK)
-      (cinsn (set (mem/c:SI (plus:DI (reg/f:DI virtual-stack-vars)
+      (cnote 4 [bb 2] NOTE_INSN_BASIC_BLOCK)
+      (cinsn 2 (set (mem/c:SI (plus:DI (reg/f:DI virtual-stack-vars)
                             (const_int -4)) [1 i+0 S4 A32])
                     (reg:SI x0 [ i ])) "../../src/times-two.c":2
                  (nil))
-      (cnote NOTE_INSN_FUNCTION_BEG)
-      (cinsn (set (reg:SI %2)
+      (cnote 3 NOTE_INSN_FUNCTION_BEG)
+      (cinsn 6 (set (reg:SI %2)
                     (mem/c:SI (plus:DI (reg/f:DI virtual-stack-vars)
                             (const_int -4)) [1 i+0 S4 A32])) "../../src/times-two.c":3
                  (nil))
-      (cinsn (set (reg:SI %0 [ _2 ])
+      (cinsn 7 (set (reg:SI %0 [ _2 ])
                     (ashift:SI (reg:SI %2)
                         (const_int 1))) "../../src/times-two.c":3
                  (nil))
-      (cinsn (set (reg:SI %1 [ <retval> ])
+      (cinsn 10 (set (reg:SI %1 [ <retval> ])
                     (reg:SI %0 [ _2 ])) "../../src/times-two.c":3
                  (nil))
-      (cinsn (set (reg/i:SI x0)
+      (cinsn 14 (set (reg/i:SI x0)
                     (reg:SI %1 [ <retval> ])) "../../src/times-two.c":4
                  (nil))
-      (cinsn (use (reg/i:SI x0)) "../../src/times-two.c":4
+      (cinsn 15 (use (reg/i:SI x0)) "../../src/times-two.c":4
                  (nil))
       (edge-to exit (flags "FALLTHRU"))
     ) ;; block 2
diff --git a/gcc/testsuite/selftests/copy-hard-reg-into-frame.rtl b/gcc/testsuite/selftests/copy-hard-reg-into-frame.rtl
deleted file mode 100644
index 4598a1c..0000000
--- a/gcc/testsuite/selftests/copy-hard-reg-into-frame.rtl
+++ /dev/null
@@ -1,15 +0,0 @@
-(function "copy_hard_reg_into_frame"
-  (insn-chain
-    (block 2
-      (edge-from entry (flags "FALLTHRU"))
-      (cinsn 1 (set (mem/c:SI
-                      (plus:DI
-                        (reg/f:DI frame)
-                        (const_int -4))
-                      [1 i+0 S4 A32])
-               (reg:SI di [ i ])) "test.c":2
-               (nil))
-      (edge-to exit (flags "FALLTHRU"))
-    ) ;; block 2
-  ) ;; insn-chain
-) ;; function
diff --git a/gcc/testsuite/selftests/x86_64/copy-hard-reg-into-frame.rtl b/gcc/testsuite/selftests/x86_64/copy-hard-reg-into-frame.rtl
new file mode 100644
index 0000000..4598a1c
--- /dev/null
+++ b/gcc/testsuite/selftests/x86_64/copy-hard-reg-into-frame.rtl
@@ -0,0 +1,15 @@
+(function "copy_hard_reg_into_frame"
+  (insn-chain
+    (block 2
+      (edge-from entry (flags "FALLTHRU"))
+      (cinsn 1 (set (mem/c:SI
+                      (plus:DI
+                        (reg/f:DI frame)
+                        (const_int -4))
+                      [1 i+0 S4 A32])
+               (reg:SI di [ i ])) "test.c":2
+               (nil))
+      (edge-to exit (flags "FALLTHRU"))
+    ) ;; block 2
+  ) ;; insn-chain
+) ;; function
-- 
1.8.5.3

