GCC 15 Release Series
Changes, New Features, and Fixes

This page is a "brief" summary of some of the huge number of improvements in GCC 15. You may also want to check out our Porting to GCC 15 page

Note: GCC 15 has not been released yet, so this document is a work-in-progress.

Caveats

• Support for Nios II targets, which was marked obsolete in GCC 14, has now been removed entirely.
• In the AArch64 port, support for ILP32 (-mabi=ilp32) has been deprecated and will be removed in a future release.

General Improvements

• The default vectorizer cost model at -O2 has been enhanced to handle unknown tripcount. But it still disables vectorization of loops when any runtime check for data dependence or alignment is required, it also disables vectorization of epilogue loops but otherwise is equal to the cheap cost model.
• -ftime-report now only reports monotonic run time instead of system and user time. This reduces the overhead of the option significantly, making it possible to use in standard build systems.

New Languages and Language specific improvements

• OpenMP
  • Support for unified-shared memory has been added for some AMD and Nvidia GPU devices, enabled when using the unified_shared_memory clause to the requires directive. For details, see the offload-target specifics section in the GNU Offloading and Multi Processing Runtime Library Manual. GCC added ompx_gnu_pinned_mem_alloc as predefined allocator. On Nvidia GPUs, writing to the terminal from OpenMP target regions (but not from OpenACC compute regions) is now also supported in Fortran; in C/C++ and on AMD GPUs this was already supported before with both OpenMP and OpenACC. Constructors and destructors on the device side for declare target static aggregates are now handled.
  • OpenMP 5.1: The unroll and tile loop-transformation constructs are now supported.
  • OpenMP 6.0: The get_device_from_uid and omp_get_uid_from_device API routines have been added.

C family

• A musttail statement attribute was added to enforce tail calls.

C

• C23 by default: GCC 15 changes the default language version for C compilation from -std=gnu17 to -std=gnu23. If your code relies on older versions of the C standard, you will need to either add -std= to your build flags, or port your code; see the porting notes.
• Some more C23 features have been implemented:
  • #embed preprocessing directive support (as an extension enabled in C++ as well).
  • Support for unsequenced and reproducible attributes.
  • __STDC_VERSION__ predefined macro value changed for -std=c23 or -std=gnu23 to 202311L.
• Some new features from the upcoming C2Y revision of the ISO C standard are supported with -std=c2y and -std=gnu2y. Some of these features are also supported as extensions when compiling for older language versions.
  • Generic selection expression with a type operand.
  • Support ++ and -- on complex values.
  • Accessing byte arrays.
  • alignof of an incomplete array type.
  • Obsolete implicitly octal literals and add delimited escape sequences (just partially implemented, support for new syntax added but nothing deprecated yet).
  • Named loops.
  • More Modern Bit Utilities (addition of __builtin_stdc_rotate_left and __builtin_stdc_rotate_right builtins for use in future C library <stdbit.h> headers).
  • Case range expressions.
  • if declarations.
  • Introduce complex literals.
  • Abs Without Undefined Behavior (addition of builtins for use in future C library <stdlib.h> headers).

C++

• Inline assembler statements now support constexpr generated strings, analoguous to static_assert.
• Qualified name lookup failure into the current instantiation, e.g. this->non_existent, is now proactively diagnosed when parsing a template.

Runtime Library (libstdc++)

• Debug assertions are now enabled by default for unoptimized builds. Use -D_GLIBCXX_NO_ASSERTIONS to override this.
• Improved experimental support for C++26, including:
  • views::concat.
  • Member visit.
  • Type-checking std::format args.
• Improved experimental support for C++23, including:
  • Clarify handling of encodings in localized formatting of chrono types.

Fortran

• Fortran 2023: The selected_logical_kind intrinsic function and, in the ISO_FORTRAN_ENV module, the named constants logical{8,16,32,64} and real16 were added.
• Experimental support for unsigned integers, enabled by -funsigned; see gfortran documentation for details. These have been proposed (J3/24-116) for inclusion in the next Fortran standard.
• Missing commas separating descriptors in input/output format strings are no longer permitted by default and are rejected at run-time unless -std=legacy is used when compiling the main program unit. See Fortran 2023 constraint C1302.

New Targets and Target Specific Improvements

AMD Radeon (GCN)

• Support for Fiji (gfx803) devices has been removed (this was already deprecated in GCC 14).

AVR

• Support has been added for the signal and interrupt function attributes that allow to specify the interrupt vector number as an argument. It allows to use static functions as interrupt handlers, and also functions defined in a C++ namespace.
• Support has been added for the noblock function attribute. It can be specified together with the signal attribute to indicate that the interrupt service routine should start with a SEI instruction to globally re-enable interrupts. The difference to the interrupt attribute is that the noblock attribute just acts like a flag and does not impose a specific function name.
• Support has been added for the __builtin_avr_mask1 built-in function. It can be used to compute some bit masks when code like 1 << offset is not fast enough.

IA-32/x86-64

• New ISA extension support for Intel AMX-AVX512 was added. AMX-AVX512 intrinsics are available via the -mamx-avx512 compiler switch.
• New ISA extension support for Intel AMX-FP8 was added. AMX-FP8 intrinsics are available via the -mamx-fp8 compiler switch.
• New ISA extension support for Intel AMX-MOVRS was added. AMX-MOVRS intrinsics are available via the -mamx-movrs compiler switch.
• New ISA extension support for Intel AMX-TF32 was added. AMX-TF32 intrinsics are available via the -mamx-tf32 compiler switch.
• New ISA extension support for Intel AMX-TRANSPOSE was added. AMX-TRANSPOSE intrinsics are available via the -mamx-transpose compiler switch.
• New ISA extension support for Intel AVX10.2 was added. AVX10.2 intrinsics are available via the -mavx10.2 or -mavx10.2-256 compiler switch with 256-bit vector size support. 512-bit vector size support for AVX10.2 intrinsics are available via the -mavx10.2-512 compiler switch.
• New ISA extension support for Intel MOVRS was added. MOVRS intrinsics are available via the -mmovrs compiler switch. 128- and 256- bit MOVRS intrinsics are available via the -mmovrs -mavx10.2 compiler switch. 512-bit MOVRS intrinsics are available via the -mmovrs -mavx10.2-512 compiler switch.
• EVEX version support for Intel SM4 was added. New 512-bit SM4 intrinsics are available via the -msm4 -mavx10.2-512 compiler switch.
• GCC now supports the Intel CPU named Diamond Rapids through -march=diamondrapids. Based on Granite Rapids, the switch further enables the AMX-AVX512, AMX-FP8, AMX-MOVRS, AMX-TF32, AMX-TRANSPOSE, APX_F, AVX10.2 with 512-bit support, AVX-IFMA. AVX-NE-CONVERT, AVX-VNNI-INT16, AVX-VNNI-INT8, CMPccXADD, MOVRS, SHA512, SM3, SM4 and USER_MSR ISA extensions.
• Support for Xeon Phi CPUs (a.k.a. Knight Landing and Knight Mill) were removed in GCC 15. GCC will no longer accept -march=knl, -march=knm, -mavx5124fmaps, -mavx5124vnniw, -mavx512er, -mavx512pf, -mprefetchwt1, -mtune=knl, and -mtune=knm compiler switches.

NVPTX

• GCC's nvptx target now supports constructors and destructors. For this, a recent version of nvptx-tools is required.

SH

• Bare metal sh-elf targets are now using the newer soft-fp library for improved performance of floating-point emulation on CPUs without hardware floating-point support.

Operating Systems

PowerPC Darwin

• Fortran's IEEE modules are now suppored on Darwin PowerPC.

Other significant improvements