GCC Middle and Back End API Reference
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Data Structures | |
struct | ps_insn |
struct | ps_reg_move_info |
struct | partial_schedule |
struct | node_sched_params |
struct | node_order_params |
Typedefs | |
typedef struct partial_schedule * | partial_schedule_ptr |
typedef struct ps_insn * | ps_insn_ptr |
typedef struct ps_reg_move_info | ps_reg_move_info |
typedef struct node_sched_params * | node_sched_params_ptr |
typedef struct node_sched_params | node_sched_params |
typedef struct node_order_params * | nopa |
Enumerations | |
enum | sms_direction { BOTTOMUP, TOPDOWN } |
Variables | |
static struct common_sched_info_def | sms_common_sched_info |
static struct sched_deps_info_def | sms_sched_deps_info |
static struct haifa_sched_info | sms_sched_info |
static vec< node_sched_params > | node_sched_param_vec |
typedef struct node_sched_params node_sched_params |
typedef struct node_sched_params * node_sched_params_ptr |
The scheduling parameters held for each node.
typedef struct node_order_params* nopa |
typedef struct partial_schedule* partial_schedule_ptr |
@verbatim Swing Modulo Scheduling implementation.
Copyright (C) 2004-2013 Free Software Foundation, Inc. Contributed by Ayal Zaks and Mustafa Hagog <zaks,musta> fa@i l.ibm .com
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
This file contains the implementation of the Swing Modulo Scheduler, described in the following references: [1] J. Llosa, A. Gonzalez, E. Ayguade, M. Valero., and J. Eckhardt. Lifetime--sensitive modulo scheduling in a production environment. IEEE Trans. on Comps., 50(3), March 2001 [2] J. Llosa, A. Gonzalez, E. Ayguade, and M. Valero. Swing Modulo Scheduling: A Lifetime Sensitive Approach. PACT '96 , pages 80-87, October 1996 (Boston - Massachusetts - USA). The basic structure is: 1. Build a data-dependence graph (DDG) for each loop. 2. Use the DDG to order the insns of a loop (not in topological order necessarily, but rather) trying to place each insn after all its predecessors _or_ after all its successors. 3. Compute MII: a lower bound on the number of cycles to schedule the loop. 4. Use the ordering to perform list-scheduling of the loop: 1. Set II = MII. We will try to schedule the loop within II cycles. 2. Try to schedule the insns one by one according to the ordering. For each insn compute an interval of cycles by considering already- scheduled preds and succs (and associated latencies); try to place the insn in the cycles of this window checking for potential resource conflicts (using the DFA interface). Note: this is different from the cycle-scheduling of schedule_insns; here the insns are not scheduled monotonically top-down (nor bottom- up). 3. If failed in scheduling all insns - bump II++ and try again, unless II reaches an upper bound MaxII, in which case report failure. 5. If we succeeded in scheduling the loop within II cycles, we now generate prolog and epilog, decrease the counter of the loop, and perform modulo variable expansion for live ranges that span more than II cycles (i.e. use register copies to prevent a def from overwriting itself before reaching the use). SMS works with countable loops (1) whose control part can be easily decoupled from the rest of the loop and (2) whose loop count can be easily adjusted. This is because we peel a constant number of iterations into a prologue and epilogue for which we want to avoid emitting the control part, and a kernel which is to iterate that constant number of iterations less than the original loop. So the control part should be a set of insns clearly identified and having its own iv, not otherwise used in the loop (at-least for now), which initializes a register before the loop to the number of iterations. Currently SMS relies on the do-loop pattern to recognize such loops, where (1) the control part comprises of all insns defining and/or using a certain 'count' register and (2) the loop count can be adjusted by modifying this register prior to the loop. TODO: Rely on cfgloop analysis instead.
This page defines partial-schedule structures and functions for modulo scheduling.
typedef struct ps_insn* ps_insn_ptr |
typedef struct ps_reg_move_info ps_reg_move_info |
enum sms_direction |
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Inserts a DDG_NODE to the given partial schedule at the given cycle. Returns 0 if this is not possible and a PS_INSN otherwise. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come before/after (respectively) the node pointed to by PS_I when scheduled in the same cycle.
References create_ps_insn(), free(), partial_schedule::ii, issue_rate, ps_insn_find_column(), and partial_schedule::rows_length.
Referenced by ps_add_node_check_conflicts().
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Advance time one cycle. Assumes DFA is being used.
References curr_state, and targetm.
Referenced by ps_has_conflicts().
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Emit the moves associatied with PS. Apply the substitutions associated with them.
References df_insn_rescan(), partial_schedule::g, ddg_node::insn, ps_reg_move_info::new_reg, ddg::nodes, ps_reg_move_info::old_reg, partial_schedule::reg_moves, replace_rtx(), and ps_reg_move_info::uses.
Referenced by sms_schedule().
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Calculate MUST_PRECEDE/MUST_FOLLOW bitmaps of U_NODE; which is the node currently been scheduled. At the end of the calculation MUST_PRECEDE/MUST_FOLLOW contains all predecessors/successors of U_NODE which are (1) already scheduled in the first/last row of U_NODE's scheduling window, (2) whose dependence inequality with U becomes an equality when U is scheduled in this same row, and (3) whose dependence latency is zero. The first and last rows are calculated using the following parameters: START/END rows - The cycles that begins/ends the traversal on the window; searching for an empty cycle to schedule U_NODE. STEP - The direction in which we traverse the window. II - The initiation interval.
References bitmap_bit_p(), bitmap_clear(), bitmap_set_bit(), ddg_node::cuid, ddg_edge::dest, ddg_edge::distance, dump_file, ddg_node::in, ddg_edge::next_in, ddg_edge::next_out, ddg_node::out, and ddg_edge::src.
Referenced by optimize_sc(), and sms_schedule_by_order().
Referenced by sms_order_nodes().
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MII is needed if we consider backarcs (that do not close recursive cycles).
References ddg_node::aux, ddg_edge::dest, ddg_edge::distance, dump_file, ddg_node::in, ddg_node::info, ddg_edge::latency, ddg_edge::next_in, ddg_edge::next_out, ddg::nodes, ddg::num_nodes, ddg_node::out, and ddg_edge::src.
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Referenced by optimize_sc(), and sms_schedule().
int calculate_stage_count | ( | ) |
Calculate the stage count of the partial schedule PS. The calculation takes into account the rotation amount passed in ROTATION_AMOUNT.
References partial_schedule::ii.
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If there are more than one entry for the loop, make it one by splitting the first entry edge and redirecting the others to the new BB.
References edge_def::flags, loop::header, loop::latch, basic_block_def::preds, split_edge(), edge_def::src, and basic_block_def::succs.
Referenced by sms_schedule().
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Check if NODE_ORDER contains a permutation of 0 .. NUM_NODES-1.
References bitmap_bit_p(), bitmap_clear(), bitmap_set_bit(), dump_file, sbitmap_alloc(), and sbitmap_free().
Referenced by sms_order_nodes().
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Given U_NODE which is the node that failed to be scheduled; LOW and UP which are the boundaries of it's scheduling window; compute using SCHED_NODES and II a row in the partial schedule that can be split which will separate a critical predecessor from a critical successor thereby expanding the window, and return it.
References bitmap_bit_p(), ddg_node::cuid, ddg_edge::dest, ddg_edge::distance, dump_file, ddg_node::in, ddg_edge::latency, ddg_edge::next_in, ddg_edge::next_out, ddg_node::out, and ddg_edge::src.
Referenced by sms_schedule_by_order().
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Check if COUNT_REG is set to a constant in the PRE_HEADER block, so that the number of iterations is a compile-time constant. If so, return the rtx that sets COUNT_REG to a constant, and set COUNT to this constant. Otherwise return 0.
References get_ebb_head_tail(), ps_reg_move_info::insn, and rtx_equal_p().
Referenced by sms_schedule().
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Referenced by sms_schedule_by_order().
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This page contains functions for manipulating partial-schedules during modulo scheduling.
Create a partial schedule and allocate a memory to hold II rows.
References g, partial_schedule::g, partial_schedule::history, partial_schedule::ii, partial_schedule::max_cycle, partial_schedule::min_cycle, partial_schedule::reg_moves, partial_schedule::rows, and partial_schedule::rows_length.
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Creates an object of PS_INSN and initializes it to the given parameters.
References ps_insn::cycle, ps_insn::id, ps_insn::next_in_row, and ps_insn::prev_in_row.
Referenced by add_node_to_ps().
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Given HEAD and TAIL which are the first and last insns in a loop; return the register which controls the loop. Return zero if it has more than one occurrence in the loop besides the control part or the do-loop pattern is not of the form we expect.
References doloop_condition_get(), dump_file, ps_reg_move_info::insn, prev_nondebug_insn(), print_rtl_single(), and reg_mentioned_p().
Referenced by sms_schedule().
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Dump file:line from INSN's location info to dump_file.
References dump_file, insn_file(), and insn_line().
Referenced by loop_canon_p(), and sms_schedule().
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References copy_rtx(), duplicate_insn_chain(), emit_insn(), g, ps_insn::id, partial_schedule::ii, ps_insn::next_in_row, ps_first_note(), ps_num_consecutive_stages(), ps_rtl_insn(), reg_mentioned_p(), and partial_schedule::rows.
Referenced by generate_prolog_epilog().
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Make sure that node_sched_param_vec has an entry for every move in PS.
References partial_schedule::g, ddg::num_nodes, and partial_schedule::reg_moves.
Referenced by schedule_reg_moves().
Referenced by order_nodes_in_scc().
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References ddg::nodes.
Referenced by order_nodes_in_scc().
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References ddg::nodes.
Referenced by order_nodes_in_scc().
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References ddg::nodes.
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Referenced by sms_schedule(), and sms_schedule_by_order().
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Free all the memory allocated to the partial schedule.
References free(), free_ps_insns(), partial_schedule::reg_moves, partial_schedule::rows, partial_schedule::rows_length, sbitmap_free(), and ps_reg_move_info::uses.
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Free the PS_INSNs in rows array of the given partial schedule. ??? Consider caching the PS_INSN's.
References free(), partial_schedule::ii, ps_insn::next_in_row, and partial_schedule::rows.
Referenced by free_partial_schedule(), and reset_partial_schedule().
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Generate the instructions (including reg_moves) for prolog & epilog.
References edge_def::dest, duplicate_insns_of_cycles(), emit_move_insn(), end_sequence(), expand_simple_binop(), basic_block_def::flags, get_insns(), loop_preheader_edge(), OPTAB_DIRECT, single_exit(), split_edge_and_insert(), and start_sequence().
Referenced by sms_schedule().
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Given the partial schedule PS, this function calculates and returns the cycles in which we can schedule the node with the given index I. NOTE: Here we do the backtracking in SMS, in some special cases. We have noticed that there are several cases in which we fail to SMS the loop because the sched window of a node is empty due to tight data-deps. In such cases we want to unschedule some of the predecessors/successors until we get non-empty scheduling window. It returns -1 if the scheduling window is empty and zero otherwise.
References bitmap_and(), bitmap_bit_p(), bitmap_clear(), ddg_node::cuid, ddg_edge::data_type, ddg_edge::dest, ddg_edge::distance, dump_file, partial_schedule::g, ddg_node::in, ddg_node::insn, ddg_edge::latency, MEM_DEP, ddg_edge::next_in, ddg_edge::next_out, ddg::num_nodes, ddg_node::out, print_ddg_edge(), REG_DEP, sbitmap_alloc(), sbitmap_free(), ddg_edge::src, TRUE_DEP, and ddg_edge::type.
Referenced by optimize_sc(), and sms_schedule_by_order().
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Return true if the loop is in its canonical form and false if not. i.e. SIMPLE_SMS_LOOP_P and have one preheader block, and single exit.
References dump_file, dump_insn_location(), loop::header, loop::inner, ps_reg_move_info::insn, loop_outer(), loop_single_full_bb_p(), and single_exit().
Referenced by sms_schedule().
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Return true if all the BBs of the loop are empty except the loop header.
References free(), get_ebb_head_tail(), get_loop_body(), loop::header, and loop::num_nodes.
Referenced by loop_canon_p(), and sms_schedule().
rtl_opt_pass* make_pass_sms | ( | ) |
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Mark LOOP as software pipelined so the later scheduling passes don't touch it.
References free(), get_loop_body(), and loop::num_nodes.
Referenced by sms_schedule().
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Return True if the branch can be moved to row ii-1 while normalizing the partial schedule PS to start from cycle zero and thus optimize the SC. Otherwise return False.
References bitmap_ones(), calculate_must_precede_follow(), calculate_stage_count(), ddg::closing_branch, ddg_node::cuid, dump_file, free(), get_sched_window(), ps_insn::id, partial_schedule::ii, ddg_node::insn, ps_insn::next_in_row, ddg::num_nodes, print_partial_schedule(), remove_node_from_ps(), reset_sched_times(), rotate_partial_schedule(), partial_schedule::rows, sbitmap_alloc(), set_must_precede_follow(), try_scheduling_node_in_cycle(), and update_node_sched_params().
Referenced by sms_schedule().
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Places the nodes of SCC into the NODE_ORDER array starting at position POS, according to the SMS ordering algorithm. NODES_ORDERED (in&out parameter) holds the bitset of all nodes in the NODE_ORDER array, starting from position zero.
References bitmap_and(), bitmap_and_compl(), bitmap_clear(), bitmap_clear_bit(), bitmap_copy(), bitmap_equal_p(), bitmap_ior(), bitmap_set_bit(), BOTTOMUP, find_max_asap(), find_max_dv_min_mob(), find_max_hv_min_mob(), find_predecessors(), find_successors(), ddg::nodes, ddg::num_nodes, sbitmap_alloc(), sbitmap_free(), and TOPDOWN.
Referenced by order_nodes_of_sccs().
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Referenced by sms_order_nodes().
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Referenced by sms_schedule().
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Permute the insns according to their order in PS, from row 0 to row ii-1, and position them right before LAST. This schedules the insns of the loop kernel.
References add_insn_before(), partial_schedule::g, ps_insn::id, partial_schedule::ii, ps_reg_move_info::insn, ps_insn::next_in_row, ddg::num_nodes, ps_first_note(), ps_rtl_insn(), reorder_insns_nobb(), and partial_schedule::rows.
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References partial_schedule::g, ddg::nodes, ps_rtl_insn(), node_sched_params::stage, and node_sched_params::time.
Referenced by sms_schedule().
void print_partial_schedule | ( | partial_schedule_ptr | , |
FILE * | |||
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Referenced by optimize_sc(), and sms_schedule().
void print_partial_schedule | ( | ) |
Prints the partial schedule as an ii rows array, for each rows print the ids of the insns in it.
References ps_insn::id, partial_schedule::ii, ps_insn::next_in_row, ps_rtl_insn(), and partial_schedule::rows.
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Checks if the given node causes resource conflicts when added to PS at cycle C. If not the node is added to PS and returned; otherwise zero is returned. Bit N is set in MUST_PRECEDE/MUST_FOLLOW if the node with cuid N must be come before/after (respectively) the node pointed to by PS_I when scheduled in the same cycle.
References add_node_to_ps(), partial_schedule::history, partial_schedule::max_cycle, partial_schedule::min_cycle, ps_has_conflicts(), ps_insn_advance_column(), and remove_node_from_ps().
Referenced by schedule_reg_move(), and try_scheduling_node_in_cycle().
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Partial schedule instruction ID, which belongs to PS, occurred in the original (unscheduled) loop. Return the first instruction in the loop that was associated with ps_rtl_insn (PS, ID). If the instruction had some notes before it, this is the first of those notes.
References ddg_node::first_note, g, partial_schedule::g, and ddg::nodes.
Referenced by duplicate_insns_of_cycles(), and permute_partial_schedule().
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Checks if PS has resource conflicts according to DFA, starting from FROM cycle to TO cycle; returns true if there are conflicts and false if there are no conflicts. Assumes DFA is being used.
References advance_one_cycle(), can_issue_more, curr_state, ps_insn::id, partial_schedule::ii, issue_rate, ps_insn::next_in_row, ps_rtl_insn(), partial_schedule::rows, sched_dump, sched_verbose, and targetm.
Referenced by ps_add_node_check_conflicts().
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This function inserts a new empty row into PS at the position according to SPLITROW, keeping all already scheduled instructions intact and updating their SCHED_TIME and cycle accordingly.
References ps_insn::cycle, dump_file, free(), ps_insn::id, partial_schedule::ii, partial_schedule::max_cycle, partial_schedule::min_cycle, ps_insn::next_in_row, reset_sched_times(), rotate_partial_schedule(), partial_schedule::rows, partial_schedule::rows_length, and verify_partial_schedule().
Referenced by sms_schedule_by_order().
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Advances the PS_INSN one column in its current row; returns false in failure and true in success. Bit N is set in MUST_FOLLOW if the node with cuid N must be come after the node pointed to by PS_I when scheduled in the same cycle.
References bitmap_bit_p(), ps_insn::cycle, ps_insn::id, partial_schedule::ii, ps_insn::next_in_row, ps_insn::prev_in_row, and partial_schedule::rows.
Referenced by ps_add_node_check_conflicts().
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Unlike what literature describes for modulo scheduling (which focuses on VLIW machines) the order of the instructions inside a cycle is important. Given the bitmaps MUST_FOLLOW and MUST_PRECEDE we know where the current instruction should go relative to the already scheduled instructions in the given cycle. Go over these instructions and find the first possible column to put it in.
References bitmap_bit_p(), ps_insn::cycle, ps_insn::id, partial_schedule::ii, ps_insn::next_in_row, ps_insn::prev_in_row, ps_rtl_insn(), and partial_schedule::rows.
Referenced by add_node_to_ps().
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Return the number of consecutive stages that are occupied by partial schedule instruction ID in PS.
References g, ps_reg_move_info::num_consecutive_stages, and ps_reg_move().
Referenced by duplicate_insns_of_cycles().
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Partial schedule instruction ID in PS is a register move. Return information about it.
References partial_schedule::g, ddg::num_nodes, and partial_schedule::reg_moves.
Referenced by ps_num_consecutive_stages(), ps_rtl_insn(), schedule_reg_move(), and schedule_reg_moves().
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Return the rtl instruction that is being scheduled by partial schedule instruction ID, which belongs to schedule PS.
References g, partial_schedule::g, ddg_node::insn, ps_reg_move_info::insn, ddg::nodes, and ps_reg_move().
Referenced by duplicate_insns_of_cycles(), permute_partial_schedule(), print_node_sched_params(), print_partial_schedule(), ps_has_conflicts(), ps_insn_find_column(), reset_sched_times(), and schedule_reg_move().
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Referenced by optimize_sc(), and ps_add_node_check_conflicts().
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Removes the given PS_INSN from the partial schedule.
References ps_insn::cycle, free(), partial_schedule::ii, ps_insn::next_in_row, ps_insn::prev_in_row, partial_schedule::rows, and partial_schedule::rows_length.
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A very simple resource-based lower bound on the initiation interval. ??? Improve the accuracy of this bound by considering the utilization of various units.
References issue_rate, ddg::num_debug, ddg::num_nodes, and targetm.
Referenced by sms_schedule().
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Referenced by sms_schedule_by_order().
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Clear the rows array with its PS_INSNs, and create a new one with NEW_II rows.
References free_ps_insns(), partial_schedule::ii, partial_schedule::max_cycle, memset(), partial_schedule::min_cycle, partial_schedule::rows, and partial_schedule::rows_length.
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Bump the SCHED_TIMEs of all nodes by AMOUNT. Set the values of SCHED_ROW and SCHED_STAGE. Instruction scheduled on cycle AMOUNT will move to cycle zero.
References ps_insn::cycle, dump_file, ps_insn::id, partial_schedule::ii, ps_reg_move_info::insn, partial_schedule::max_cycle, partial_schedule::min_cycle, ps_insn::next_in_row, ps_rtl_insn(), partial_schedule::rows, and update_node_sched_params().
Referenced by optimize_sc(), ps_insert_empty_row(), and sms_schedule().
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Run instruction scheduler.
Perform SMS module scheduling.
References basic_block_def::aux, CDI_DOMINATORS, cfg_layout_finalize(), cfg_layout_initialize(), free_dominance_info(), max_reg_num(), max_regno, basic_block_def::next_bb, and sms_schedule().
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Referenced by optimize_sc(), ps_insert_empty_row(), and sms_schedule().
void rotate_partial_schedule | ( | ) |
Rotate the rows of PS such that insns scheduled at time START_CYCLE will appear in row 0. Updates max/min_cycles.
References partial_schedule::ii, partial_schedule::max_cycle, partial_schedule::min_cycle, partial_schedule::rows, and partial_schedule::rows_length.
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Try to schedule the move with ps_insn identifier I_REG_MOVE in PS. Its single predecessor has already been scheduled, as has its ddg node successors. (The move may have also another move as its successor, in which case that successor will be scheduled later.) The move is part of a chain that satisfies register dependencies between a producing ddg node and various consuming ddg nodes. If some of these dependencies have a distance of 1 (meaning that the use is upward-exposed) then DISTANCE1_USES is nonnull and contains the set of uses with distance-1 dependencies. DISTANCE1_USES is null otherwise. MUST_FOLLOW is a scratch bitmap that is big enough to hold all current ps_insn ids. Return true on success.
References bitmap_bit_p(), bitmap_clear(), bitmap_set_bit(), ps_reg_move_info::def, dump_file, partial_schedule::g, partial_schedule::ii, ps_reg_move_info::insn, ddg::num_nodes, print_rtl_single(), ps_add_node_check_conflicts(), ps_reg_move(), ps_rtl_insn(), this_insn, update_node_sched_params(), and ps_reg_move_info::uses.
Referenced by schedule_reg_moves().
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References autoinc_var_is_used_p(), bitmap_clear(), bitmap_set_bit(), copy_rtx(), ddg_node::cuid, ps_reg_move_info::def, ddg_edge::dest, ddg_edge::distance, extend_node_sched_params(), g, partial_schedule::g, gen_move_insn(), gen_reg_rtx(), partial_schedule::ii, ddg_node::insn, ps_reg_move_info::insn, ps_reg_move_info::new_reg, ddg_edge::next_out, ddg::nodes, ps_reg_move_info::num_consecutive_stages, ddg::num_nodes, ps_reg_move_info::old_reg, ddg_node::out, ps_reg_move(), partial_schedule::reg_moves, sbitmap_alloc(), sbitmap_free(), schedule_reg_move(), ddg_edge::src, TRUE_DEP, ddg_edge::type, and ps_reg_move_info::uses.
Referenced by sms_schedule().
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Set SCHED_COLUMN for each instruction in PS.
References partial_schedule::ii, and set_columns_for_row().
Referenced by sms_schedule().
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Set SCHED_COLUMN for each instruction in row ROW of PS.
References cur_insn, ps_insn::id, ps_insn::next_in_row, and partial_schedule::rows.
Referenced by set_columns_for_ps().
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Set bitmaps TMP_FOLLOW and TMP_PRECEDE to MUST_FOLLOW and MUST_PRECEDE respectively only if cycle C falls on the border of the scheduling window boundaries marked by START and END cycles. STEP is the direction of the window.
Referenced by optimize_sc(), and sms_schedule_by_order().
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Referenced by sms_schedule().
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Allocate sched_params for each node and initialize it.
References ddg::num_nodes.
void set_row_column_for_ps | ( | partial_schedule_ptr | ) |
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Setup infos.
References common_sched_info, current_sched_info, haifa_common_sched_info, memcpy(), sched_deps_info, common_sched_info_def::sched_pass_id, SCHED_SMS_PASS, sms_common_sched_info, sms_sched_deps_info, and sms_sched_info.
Referenced by sms_schedule().
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This page defines constants and structures for the modulo scheduling driver.
Referenced by sms_schedule().
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Order the nodes of G for scheduling and pass the result in NODE_ORDER. Also set aux.count of each node to ASAP. Put maximal ASAP to PMAX_ASAP. Return the recMII for the given DDG.
References ddg_node::aux, calculate_order_params(), check_nodes_order(), ddg_node::count, create_ddg_all_sccs(), dump_file, free(), free_ddg_all_sccs(), ddg::nodes, ddg::num_nodes, ddg_all_sccs::num_sccs, order_nodes_of_sccs(), print_sccs(), ddg_scc::recurrence_length, and ddg_all_sccs::sccs.
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The following three functions are copied from the current scheduler code in order to use sched_analyze() for computing the dependencies. They are used when initializing the sched_info structure.
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Main entry point, perform SMS scheduling on the loops of the function that consist of single basic blocks.
References apply_reg_moves(), ddg::bb, calculate_stage_count(), canon_loop(), cfun, ddg::closing_branch, const_iteration_count(), count, edge_def::count, basic_block_def::count, create_ddg(), ddg_node::cuid, dbg_cnt(), df_set_bb_dirty(), doloop_register_get(), dump_file, dump_insn_location(), ddg_node::first_note, free(), free_ddg(), free_partial_schedule(), g, generate_prolog_epilog(), get_ebb_head_tail(), haifa_sched_finish(), haifa_sched_init(), loop::header, HOST_WIDEST_INT, HOST_WIDEST_INT_PRINT_DEC, partial_schedule::ii, ps_reg_move_info::insn, issue_rate, loop_canon_p(), loop_latch_edge(), loop_optimizer_finalize(), loop_optimizer_init(), loop_preheader_edge(), loop_single_full_bb_p(), loop_version(), LOOPS_HAVE_PREHEADERS, LOOPS_HAVE_RECORDED_EXITS, mark_loop_unsched(), loop::num, ddg::num_loads, ddg::num_nodes, ddg::num_stores, number_of_loops(), optimize_sc(), permute_partial_schedule(), print_ddg(), print_node_sched_params(), print_partial_schedule(), print_rtl_single(), prob, profile_info, reg_mentioned_p(), reload_completed, res_MII(), reset_sched_times(), rotate_partial_schedule(), schedule_reg_moves(), set_columns_for_ps(), set_node_sched_params(), setup_sched_infos(), single_exit(), sms_order_nodes(), sms_schedule_by_order(), edge_def::src, gcov_ctr_summary::sum_max, and targetm.
Referenced by rest_of_handle_sms().
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Referenced by sms_schedule().
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This function implements the scheduling algorithm for SMS according to the above algorithm.
References bitmap_bit_p(), bitmap_clear(), bitmap_clear_bit(), bitmap_equal_p(), bitmap_ones(), calculate_must_precede_follow(), compute_split_row(), create_partial_schedule(), dump_file, free_partial_schedule(), partial_schedule::g, get_sched_window(), partial_schedule::ii, ddg_node::insn, ddg::nodes, ddg::num_nodes, loop::num_nodes, ps_insert_empty_row(), reset_partial_schedule(), sbitmap_alloc(), sbitmap_free(), set_must_precede_follow(), try_scheduling_node_in_cycle(), and verify_partial_schedule().
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Return 1 if U_NODE can be scheduled in CYCLE. Use the following parameters to decide if that's possible: PS - The partial schedule. U - The serial number of U_NODE. NUM_SPLITS - The number of row splits made so far. MUST_PRECEDE - The nodes that must precede U_NODE. (only valid at the first row of the scheduling window) MUST_FOLLOW - The nodes that must follow U_NODE. (only valid at the last row of the scheduling window)
References bitmap_set_bit(), dump_file, ps_add_node_check_conflicts(), and verify_partial_schedule().
Referenced by optimize_sc(), and sms_schedule_by_order().
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Update the sched_params (time, row and stage) for node U using the II, the CYCLE of U and MIN_CYCLE. We're not simply taking the following SCHED_STAGE (u) = CALC_STAGE_COUNT (SCHED_TIME (u), min_cycle, ii); because the stages may not be aligned on cycle 0.
Referenced by optimize_sc(), reset_sched_times(), and schedule_reg_move().
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Referenced by ps_insert_empty_row(), sms_schedule_by_order(), and try_scheduling_node_in_cycle().
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A vector that contains the sched data for each ps_insn.
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Referenced by setup_sched_infos().
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Referenced by setup_sched_infos().
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Referenced by setup_sched_infos().