Instruction scheduling pass. Copyright (C) 1992-2013 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiema.nosp@m.nn@c.nosp@m.ygnus.nosp@m..com) Enhanced by, and currently maintained by, Jim Wilson (wilso.nosp@m.n@cy.nosp@m.gnus..nosp@m.com)
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/. This pass implements list scheduling within basic blocks. It is run twice: (1) after flow analysis, but before register allocation, and (2) after register allocation.
The first run performs interblock scheduling, moving insns between different blocks in the same "region", and the second runs only basic block scheduling.
Interblock motions performed are useful motions and speculative motions, including speculative loads. Motions requiring code duplication are not supported. The identification of motion type and the check for validity of speculative motions requires construction and analysis of the function's control flow graph.
The main entry point for this pass is schedule_insns(), called for each function. The work of the scheduler is organized in three levels: (1) function level: insns are subject to splitting, control-flow-graph is constructed, regions are computed (after reload, each region is of one block), (2) region level: control flow graph attributes required for interblock scheduling are computed (dominators, reachability, etc.), data dependences and priorities are computed, and (3) block level: insns in the block are actually scheduled.
