GCC Middle and Back End API Reference
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#include "config.h"
#include "system.h"
#include "coretypes.h"
#include "tm.h"
#include "tree.h"
#include "tm_p.h"
#include "basic-block.h"
#include "tree-pretty-print.h"
#include "gimple.h"
#include "gimple-ssa.h"
#include "tree-ssa-loop-ivopts.h"
#include "tree-ssa-loop-manip.h"
#include "tree-ssa-loop-niter.h"
#include "tree-ssa-loop.h"
#include "tree-into-ssa.h"
#include "cfgloop.h"
#include "tree-pass.h"
#include "insn-config.h"
#include "hashtab.h"
#include "tree-chrec.h"
#include "tree-scalar-evolution.h"
#include "diagnostic-core.h"
#include "params.h"
#include "langhooks.h"
#include "tree-inline.h"
#include "tree-data-ref.h"
#include "expr.h"
#include "optabs.h"
#include "recog.h"
Data Structures | |
struct | mem_ref_group |
struct | mem_ref |
struct | ar_data |
Macros | |
#define | WRITE_CAN_USE_READ_PREFETCH 1 |
#define | READ_CAN_USE_WRITE_PREFETCH 0 |
#define | PREFETCH_BLOCK L1_CACHE_LINE_SIZE |
#define | HAVE_FORWARD_PREFETCH 0 |
#define | HAVE_BACKWARD_PREFETCH 0 |
#define | ACCEPTABLE_MISS_RATE 50 |
#define | HAVE_prefetch 0 |
#define | L1_CACHE_SIZE_BYTES ((unsigned) (L1_CACHE_SIZE * 1024)) |
#define | L2_CACHE_SIZE_BYTES ((unsigned) (L2_CACHE_SIZE * 1024)) |
#define | NONTEMPORAL_FRACTION 16 |
#define | FENCE_FOLLOWING_MOVNT NULL_TREE |
#define | TRIP_COUNT_TO_AHEAD_RATIO 4 |
#define | PREFETCH_ALL (~(unsigned HOST_WIDE_INT) 0) |
#define | PREFETCH_MOD_TO_UNROLL_FACTOR_RATIO 4 |
#define | PREFETCH_MAX_MEM_REFS_PER_LOOP 200 |
#define ACCEPTABLE_MISS_RATE 50 |
In some cases we are only able to determine that there is a certain probability that the two accesses hit the same cache line. In this case, we issue the prefetches for both of them if this probability is less then (1000 - ACCEPTABLE_MISS_RATE) per thousand.
#define FENCE_FOLLOWING_MOVNT NULL_TREE |
In case we have to emit a memory fence instruction after the loop that uses nontemporal stores, this defines the builtin to use.
#define HAVE_BACKWARD_PREFETCH 0 |
Do we have a backward hardware sequential prefetching?
#define HAVE_FORWARD_PREFETCH 0 |
Do we have a forward hardware sequential prefetching?
#define HAVE_prefetch 0 |
#define L1_CACHE_SIZE_BYTES ((unsigned) (L1_CACHE_SIZE * 1024)) |
#define L2_CACHE_SIZE_BYTES ((unsigned) (L2_CACHE_SIZE * 1024)) |
#define NONTEMPORAL_FRACTION 16 |
We consider a memory access nontemporal if it is not reused sooner than after L2_CACHE_SIZE_BYTES of memory are accessed. However, we ignore accesses closer than L1_CACHE_SIZE_BYTES / NONTEMPORAL_FRACTION, so that we use nontemporal prefetches e.g. if single memory location is accessed several times in a single iteration of the loop.
#define PREFETCH_ALL (~(unsigned HOST_WIDE_INT) 0) |
Assigned to PREFETCH_BEFORE when all iterations are to be prefetched.
Referenced by mark_nontemporal_stores().
#define PREFETCH_BLOCK L1_CACHE_LINE_SIZE |
The size of the block loaded by a single prefetch. Usually, this is the same as cache line size (at the moment, we only consider one level of cache hierarchy).
Referenced by is_miss_rate_acceptable(), and prune_ref_by_group_reuse().
#define PREFETCH_MAX_MEM_REFS_PER_LOOP 200 |
Some of the prefetch computations have quadratic complexity. We want to avoid huge compile times and, therefore, want to limit the amount of memory references per loop where we consider prefetching.
#define PREFETCH_MOD_TO_UNROLL_FACTOR_RATIO 4 |
Do not generate a prefetch if the unroll factor is significantly less than what is required by the prefetch. This is to avoid redundant prefetches. For example, when prefetch_mod is 16 and unroll_factor is 2, prefetching requires unrolling the loop 16 times, but the loop is actually unrolled twice. In this case (ratio = 8), prefetching is not likely to be beneficial.
Referenced by prune_by_reuse().
#define READ_CAN_USE_WRITE_PREFETCH 0 |
True if read can be prefetched by a write prefetch.
#define TRIP_COUNT_TO_AHEAD_RATIO 4 |
It is not profitable to prefetch when the trip count is not at least TRIP_COUNT_TO_AHEAD_RATIO times the prefetch ahead distance. For example, in a loop with a prefetch ahead distance of 10, supposing that TRIP_COUNT_TO_AHEAD_RATIO is equal to 4, it is profitable to prefetch when the trip count is greater or equal to
#define WRITE_CAN_USE_READ_PREFETCH 1 |
Array prefetching. Copyright (C) 2005-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/. FIXME: Needed for optabs, but this should all be moved to a TBD interface between the GIMPLE and RTL worlds. This pass inserts prefetch instructions to optimize cache usage during accesses to arrays in loops. It processes loops sequentially and:
1) Gathers all memory references in the single loop. 2) For each of the references it decides when it is profitable to prefetch it. To do it, we evaluate the reuse among the accesses, and determines two values: PREFETCH_BEFORE (meaning that it only makes sense to do prefetching in the first PREFETCH_BEFORE iterations of the loop) and PREFETCH_MOD (meaning that it only makes sense to prefetch in the iterations of the loop that are zero modulo PREFETCH_MOD). For example (assuming cache line size is 64 bytes, char has size 1 byte and there is no hardware sequential prefetch):
char *a; for (i = 0; i < max; i++) { a[255] = ...; (0) a[i] = ...; (1) a[i + 64] = ...; (2) a[16*i] = ...; (3) a[187*i] = ...; (4) a[187*i + 50] = ...; (5) }
(0) obviously has PREFETCH_BEFORE 1 (1) has PREFETCH_BEFORE 64, since (2) accesses the same memory location 64 iterations before it, and PREFETCH_MOD 64 (since it hits the same cache line otherwise). (2) has PREFETCH_MOD 64 (3) has PREFETCH_MOD 4 (4) has PREFETCH_MOD 1. We do not set PREFETCH_BEFORE here, since the cache line accessed by (5) is the same with probability only 7/32. (5) has PREFETCH_MOD 1 as well.
Additionally, we use data dependence analysis to determine for each reference the distance till the first reuse; this information is used to determine the temporality of the issued prefetch instruction.
3) We determine how much ahead we need to prefetch. The number of iterations needed is time to fetch / time spent in one iteration of the loop. The problem is that we do not know either of these values, so we just make a heuristic guess based on a magic (possibly) target-specific constant and size of the loop.
4) Determine which of the references we prefetch. We take into account that there is a maximum number of simultaneous prefetches (provided by machine description). We prefetch as many prefetches as possible while still within this bound (starting with those with lowest prefetch_mod, since they are responsible for most of the cache misses).
5) We unroll and peel loops so that we are able to satisfy PREFETCH_MOD and PREFETCH_BEFORE requirements (within some bounds), and to avoid prefetching nonaccessed memory. TODO – actually implement peeling.
6) We actually emit the prefetch instructions. ??? Perhaps emit the prefetch instructions with guards in cases where 5) was not sufficient to satisfy the constraints?
A cost model is implemented to determine whether or not prefetching is profitable for a given loop. The cost model has three heuristics:
The limits used in these heuristics are defined as parameters with reasonable default values. Machine-specific default values will be added later.
Some other TODO: – write and use more general reuse analysis (that could be also used in other cache aimed loop optimizations) – make it behave sanely together with the prefetches given by user (now we just ignore them; at the very least we should avoid optimizing loops in that user put his own prefetches) – we assume cache line size alignment of arrays; this could be improved. Magic constants follow. These should be replaced by machine specific numbers. True if write can be prefetched by a read prefetch.
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Add the steps of ACCESS_FN multiplied by STRIDE to the array STRIDE at the position corresponding to the loop of the step. N is the depth of the considered loop nest, and, LOOP is its innermost loop.
References current_loops, HOST_WIDE_INT, loop::inner, loop_outer(), loop::next, and vNULL.
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Tries to express REF_P in shape &BASE + STEP * iter + DELTA, where DELTA and STEP are integer constants and iter is number of iterations of LOOP. The reference occurs in statement STMT. Strips nonaddressable component references from REF_P.
First strip off the component references. Ignore bitfields. Also strip off the real and imagine parts of a complex, so that they can have the same base.
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Divides X by BY, rounding down.
Referenced by is_miss_rate_acceptable().
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Determines the distance till the first reuse of each reference in REFS in the loop nest of LOOP. NO_OTHER_REFS is true if there are no other memory references in the loop. Return false if the analysis fails.
Find the outermost loop of the loop nest of loop (we require that there are no sibling loops inside the nest).
For each loop, determine the amount of data accessed in each iteration. We use this to estimate whether the reference is evicted from the cache before its reuse.
Bound the volume by the L2 cache size, since above this bound, all dependence distances are equivalent.
Prepare the references in the form suitable for data dependence analysis. We ignore unanalyzable data references (the results are used just as a heuristics to estimate temporality of the references, hence we do not need to worry about correctness).
If the dependence cannot be analyzed, assume that there might be a reuse.
The distance vectors are normalized to be always lexicographically positive, hence we cannot tell just from them whether DDR_A comes before DDR_B or vice versa. However, it is not important, anyway – if DDR_A is close to DDR_B, then it is either reused in DDR_B (and it is not nontemporal), or it reuses the value of DDR_B in cache (and marking it as nontemporal would not affect anything).
If this is a dependence in the innermost loop (i.e., the distances in all superloops are zero) and it is not the trivial self-dependence with distance zero, record that the references are not completely independent.
Ignore accesses closer than L1_CACHE_SIZE_BYTES / NONTEMPORAL_FRACTION, so that we use nontemporal prefetches e.g. if single memory location is accessed several times in a single iteration of the loop.
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Determine the coefficient by that unroll LOOP, from the information contained in the list of memory references REFS. Description of umber of iterations of LOOP is stored to DESC. NINSNS is the number of insns of the LOOP. EST_NITER is the estimated number of iterations of the loop, or -1 if no estimate is available.
First check whether the loop is not too large to unroll. We ignore PARAM_MAX_UNROLL_TIMES, because for small loops, it prevented us from unrolling them enough to make exactly one cache line covered by each iteration. Also, the goal of PARAM_MAX_UNROLL_TIMES is to prevent us from unrolling the loops too many times in cases where we only expect gains from better scheduling and decreasing loop overhead, which is not the case here.
If we unrolled the loop more times than it iterates, the unrolled version of the loop would be never entered.
Choose the factor so that we may prefetch each cache just once, but bound the unrolling by UPPER_BOUND.
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Dumps information about memory reference
References mem_ref_group::base, mem_ref::delta, mem_ref::group, mem_ref_group::step, and mem_ref::write_p.
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Dumps information about reference REF to FILE.
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Issue a memory fence instruction after LOOP.
If possible, we prefer not to insert the fence on other paths in cfg.
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Estimate the number of prefetches in the given GROUPS. UNROLL_FACTOR is the factor by which LOOP was unrolled.
References mem_ref::issue_prefetch_p, issue_prefetch_ref(), mem_ref_group::next, mem_ref::next, and mem_ref_group::refs.
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Finds a group with BASE and STEP in GROUPS, or creates one if it does not exist.
If step is an integer constant, keep the list of groups sorted by decreasing step.
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Record the suitable memory references in LOOP. NO_OTHER_REFS is set to true if there are no other memory references inside the loop.
Scan the loop body in order, so that the former references precede the later ones.
References gather_memory_references_ref().
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Record a memory reference REF to the list REFS. The reference occurs in LOOP in statement STMT and it is write if WRITE_P. Returns true if the reference was recorded, false otherwise.
If analyze_ref fails the default is a NULL_TREE. We can stop here.
Stop if the address of BASE could not be taken.
Limit non-constant step prefetching only to the innermost loops and only when the step is loop invariant in the entire loop nest.
Now we know that REF = &BASE + STEP * iter + DELTA, where DELTA and STEP are integer constants.
Referenced by gather_memory_references().
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Analyzes a single INDEX of a memory reference to obtain information described at analyze_ref. Callback for for_each_index.
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Determine whether or not the instruction to prefetch ratio in the loop is too small based on the profitablity consideration. NINSNS: estimated number of instructions in the loop, PREFETCH_COUNT: an estimate of the number of prefetches, UNROLL_FACTOR: the factor to unroll the loop if prefetching.
Prefetching most likely causes performance degradation when the instruction to prefetch ratio is too small. Too many prefetch instructions in a loop may reduce the I-cache performance. (unroll_factor * ninsns) is used to estimate the number of instructions in the unrolled loop. This implementation is a bit simplistic – the number of issued prefetch instructions is also affected by unrolling. So, prefetch_mod and the unroll factor should be taken into account when determining prefetch_count. Also, the number of insns of the unrolled loop will usually be significantly smaller than the number of insns of the original loop * unroll_factor (at least the induction variable increases and the exit branches will get eliminated), so it might be better to use tree_estimate_loop_size + estimated_unrolled_size.
References single_dom_exit(), and tree_unroll_loop().
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Given a CACHE_LINE_SIZE and two inductive memory references with a common STEP greater than CACHE_LINE_SIZE and an address difference DELTA, compute the probability that they will fall in different cache lines. Return true if the computed miss rate is not greater than the ACCEPTABLE_MISS_RATE. DISTINCT_ITERS is the number of distinct iterations after which the pattern repeats itself. ALIGN_UNIT is the unit of alignment in bytes.
It always misses if delta is greater than or equal to the cache line size.
Iterate through all possible alignments of the first memory reference within its cache line.
Iterate through all distinct iterations.
References cst_and_fits_in_hwi(), ddown(), mem_ref::delta, mem_ref::group, HOST_WIDE_INT, int_cst_value(), mem_ref::prefetch_before, PREFETCH_BLOCK, and mem_ref_group::step.
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Issue prefetches for the reference REF into loop as decided before. HEAD is the number of iterations to prefetch ahead. UNROLL_FACTOR is the factor by which LOOP was unrolled.
Determine the address to prefetch.
The step size is non-constant but loop-invariant. We use the heuristic to simply prefetch ahead iterations ahead.
Create the prefetch instruction.
Referenced by estimate_prefetch_count().
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Issue prefetches for the references in GROUPS into loop as decided before. HEAD is the number of iterations to prefetch ahead. UNROLL_FACTOR is the factor by that LOOP was unrolled.
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Issue prefetch instructions for array references in LOOP. Returns true if the LOOP was unrolled.
FIXME: the time should be weighted by the probabilities of the blocks in the loop body.
Prefetching is not likely to be profitable if the trip count to ahead ratio is too small.
Step 1: gather the memory references.
Give up prefetching if the number of memory references in the loop is not reasonable based on profitablity and compilation time considerations.
Step 2: estimate the reuse effects.
Step 3: determine unroll factor.
Estimate prefetch count for the unrolled loop.
Prefetching is not likely to be profitable if the instruction to prefetch ratio is too small.
Step 4: what to prefetch?
Step 5: unroll the loop. TODO – peeling of first and last few iterations so that we do not issue superfluous prefetches.
Step 6: issue the prefetches.
gimple_opt_pass* make_pass_loop_prefetch | ( | ) |
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If REF is a nontemporal store, we mark the corresponding modify statement and return true. Otherwise, we return false.
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Marks nontemporal stores in LOOP. GROUPS contains the description of memory references in the loop.
References mem_ref_group::next, mem_ref::next, PREFETCH_ALL, mem_ref::prefetch_before, and mem_ref_group::refs.
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Returns true if we can use storent in loop, false otherwise.
If we must issue a mfence insn after using storent, check that there is a suitable place for it at each of the loop exits.
References least_common_multiple(), and mem_ref::prefetch_mod.
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Determine whether or not the number of memory references in the loop is reasonable based on the profitablity and compilation time considerations. NINSNS: estimated number of instructions in the loop, MEM_REF_COUNT: total number of memory references in the loop.
Miss rate computation (is_miss_rate_acceptable) and dependence analysis (compute_all_dependences) have high costs based on quadratic complexity. To avoid huge compilation time, we give up prefetching if mem_ref_count is too large.
Prefetching improves performance by overlapping cache missing memory accesses with CPU operations. If the loop does not have enough CPU operations to overlap with memory operations, prefetching won't give a significant benefit. One approximate way of checking this is to require the ratio of instructions to memory references to be above a certain limit. This approximation works well in practice. TODO: Implement a more precise computation by estimating the time for each CPU or memory op in the loop. Time estimates for memory ops should account for cache misses.
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Returns true if REF is a memory write for that a nontemporal store insn can be used.
REF must be a write that is not reused. We require it to be independent on all other memory references in the loop, as the nontemporal stores may be reordered with respect to other memory references.
Check that we have the storent instruction for the mode.
References edge_def::dest, EXIT_BLOCK_PTR, edge_def::flags, FOR_EACH_VEC_ELT, and get_loop_exit_edges().
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Return TRUE if no prefetch is going to be generated in the given GROUPS.
References fold_build2, fold_build_pointer_plus, fold_convert, force_gimple_operand_gsi(), mem_ref::group, GSI_SAME_STMT, NULL, size_int, sizetype, mem_ref_group::step, and unshare_expr().
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Prune the list of prefetch candidates GROUPS using the reuse analysis.
References mem_ref::prefetch_mod, PREFETCH_MOD_TO_UNROLL_FACTOR_RATIO, and should_issue_prefetch_p().
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Prune the prefetch candidates in GROUP using the reuse analysis.
References dump_file, and dump_flags.
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Prune the prefetch candidate REF using the reuse with BY. If BY_IS_BEFORE is true, BY is before REF in the loop.
If the step is non constant we cannot calculate prefetch_before.
If the references has the same address, only prefetch the former.
If the reference addresses are invariant and fall into the same cache line, prefetch just the first one.
Only prune the reference that is behind in the array.
Transform the data so that we may assume that the accesses are forward.
Check whether the two references are likely to hit the same cache line, and how distant the iterations in that it occurs are from each other.
The accesses are sure to meet. Let us check when.
Do not reduce prefetch_before if we meet beyond cache size.
A more complicated case with step > prefetch_block. First reduce the ratio between the step and the cache line size to its simplest terms. The resulting denominator will then represent the number of distinct iterations after which each address will go back to its initial location within the cache line. This computation assumes that PREFETCH_BLOCK is a power of two.
Do not reduce prefetch_before if we meet beyond cache size.
Try also the following iteration.
The ref probably does not reuse by.
References PREFETCH_BLOCK, and mem_ref_group::step.
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Prune the prefetch candidate REF using the reuses with other references in REFS.
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Prune the prefetch candidate REF using the self-reuse.
If the step size is non constant, we cannot calculate prefetch_mod.
Prefetch references to invariant address just once.
References gcc_assert.
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Records a memory reference MEM in GROUP with offset DELTA and write status WRITE_P. The reference occurs in statement STMT.
Do not record the same address twice.
It does not have to be possible for write reference to reuse the read prefetch, or vice versa.
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Release memory references in GROUPS.
References affine_iv_d::base, cst_and_fits_in_hwi(), HOST_WIDE_INT, int_cst_value(), ar_data::loop, loop_containing_stmt(), simple_iv(), affine_iv_d::step, ar_data::step, ar_data::stmt, TREE_CODE, and TREE_OPERAND.
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Decide which of the prefetch candidates in GROUPS to prefetch. AHEAD is the number of iterations to prefetch ahead (which corresponds to the number of simultaneous instances of one prefetch running at a time). UNROLL_FACTOR is the factor by that the loop is going to be unrolled. Returns true if there is anything to prefetch.
At most SIMULTANEOUS_PREFETCHES should be running at the same time.
The prefetch will run for AHEAD iterations of the original loop, i.e., AHEAD / UNROLL_FACTOR iterations of the unrolled loop. In each iteration, it will need a prefetch slot.
For now we just take memory references one by one and issue prefetches for as many as possible. The groups are sorted starting with the largest step, since the references with large step are more likely to cause many cache misses.
The loop is far from being sufficiently unrolled for this prefetch. Do not generate prefetch to avoid many redudant prefetches.
If we need to prefetch the reference each PREFETCH_MOD iterations, and we unroll the loop UNROLL_FACTOR times, we need to insert ceil (UNROLL_FACTOR / PREFETCH_MOD) instructions in each iteration.
If more than half of the prefetches would be lost anyway, do not issue the prefetch.
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Returns the volume of memory references accessed between two consecutive self-reuses of the reference DR. We consider the subscripts of DR in N loops, and LOOP_SIZES contains the volumes of accesses in each of the loops. LOOP is the innermost loop of the current loop nest.
In the following example:
for (i = 0; i < N; i++) for (j = 0; j < N; j++) use (a[j][i]); the same cache line is accessed each N steps (except if the change from i to i + 1 crosses the boundary of the cache line). Thus, for self-reuse, we cannot rely purely on the results of the data dependence analysis.
Instead, we compute the stride of the reference in each loop, and consider the innermost loop in that the stride is less than cache size.
Keep track of the reference corresponding to the subscript, so that we know its stride.
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Returns true if we should issue prefetch for REF.
For now do not issue prefetches for only first few of the iterations.
Do not prefetch nontemporal stores.
Referenced by prune_by_reuse().
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Determines whether we can profitably unroll LOOP FACTOR times, and if this is the case, fill in DESC by the description of number of iterations.
We only consider loops without control flow for unrolling. This is not a hard restriction – tree_unroll_loop works with arbitrary loops as well; but the unrolling/prefetching is usually more profitable for loops consisting of a single basic block, and we want to limit the code growth.
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Prefetching.
unsigned int tree_ssa_prefetch_arrays | ( | ) |
Issue prefetch instructions for array references in loops.
It is possible to ask compiler for say -mtune=i486 -march=pentium4. -mtune=i486 causes us having PREFETCH_BLOCK 0, since this is part of processor costs and i486 does not have prefetch, but -march=pentium4 causes HAVE_prefetch to be true. Ugh.
We assume that size of cache line is a power of two, so verify this here.
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Determine whether or not the trip count to ahead ratio is too small based on prefitablility consideration. AHEAD: the iteration ahead distance, EST_NITER: the estimated trip count.
Assume trip count to ahead ratio is big enough if the trip count could not be estimated at compile time.
References dump_file, and dump_flags.
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Returns the volume of memory references accessed across VEC iterations of loops, whose sizes are described in the LOOP_SIZES array. N is the number of the loops in the nest (length of VEC and LOOP_SIZES vectors).
We ignore the parts of the distance vector in subloops, since usually the numbers of iterations are much smaller.
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Returns the total volume of the memory references REFS, taking into account reuses in the innermost loop and cache line size. TODO – we should also take into account reuses across the iterations of the loops in the loop nest.
Almost always reuses another value?
If several iterations access the same cache line, use the size of the line divided by this number. Otherwise, a cache line is accessed in each iteration. TODO – in the latter case, we should take the size of the reference into account, rounding it up on cache line size multiple.