GCC Middle and Back End API Reference
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#include <sched-int.h>
Describe state of dependencies used during sched_analyze phase.
enum post_call_group deps_desc::in_post_call_group_p |
Used to keep post-call pseudo/hard reg movements together with the call.
rtx deps_desc::last_debug_insn |
The last debug insn we've seen.
rtx deps_desc::last_function_call |
A list of the last function calls we have seen. We use a list to represent last function calls from multiple predecessor blocks. Used to prevent register lifetimes from expanding unnecessarily.
rtx deps_desc::last_function_call_may_noreturn |
A list of the last function calls that may not return normally we have seen. We use a list to represent last function calls from multiple predecessor blocks. Used to prevent moving trapping insns across such calls.
rtx deps_desc::last_pending_memory_flush |
The last insn upon which all memory references must depend. This is an insn which flushed the pending lists, creating a dependency between it and all previously pending memory references. This creates a barrier (or a checkpoint) which no memory reference is allowed to cross. This includes all non constant CALL_INSNs. When we do interprocedural alias analysis, this restriction can be relaxed. This may also be an INSN that writes memory if the pending lists grow too large.
enum reg_pending_barrier_mode deps_desc::last_reg_pending_barrier |
Shows the last value of reg_pending_barrier associated with the insn.
int deps_desc::max_reg |
The maximum register number for the following arrays. Before reload this is max_reg_num; after reload it is FIRST_PSEUDO_REGISTER.
Referenced by mark_reg_death().
int deps_desc::pending_flush_length |
Length of the pending memory flush list plus the length of the pending jump insn list. Large functions with no calls may build up extremely large lists.
rtx deps_desc::pending_jump_insns |
An INSN_LIST containing all jump insns.
Referenced by add_branch_dependences().
rtx deps_desc::pending_read_insns |
The *_insns and *_mems are paired lists. Each pending memory operation will have a pointer to the MEM rtx on one list and a pointer to the containing insn on the other list in the same place in the list.
We can't use add_dependence like the old code did, because a single insn may have multiple memory accesses, and hence needs to be on the list once for each memory access. Add_dependence won't let you add an insn to a list more than once.
An INSN_LIST containing all insns with pending read operations.
Referenced by add_branch_dependences(), and remove_from_dependence_list().
int deps_desc::pending_read_list_length |
We must prevent the above lists from ever growing too large since the number of dependencies produced is at least O(N*N), and execution time is at least O(4*N*N), as a function of the length of these pending lists.
Indicates the length of the pending_read list.
Referenced by remove_from_dependence_list().
rtx deps_desc::pending_read_mems |
An EXPR_LIST containing all MEM rtx's which are pending reads.
Referenced by add_branch_dependences(), and remove_from_dependence_list().
rtx deps_desc::pending_write_insns |
An INSN_LIST containing all insns with pending write operations.
Referenced by add_branch_dependences().
int deps_desc::pending_write_list_length |
Indicates the length of the pending_write list.
rtx deps_desc::pending_write_mems |
An EXPR_LIST containing all MEM rtx's which are pending writes.
Referenced by add_branch_dependences().
BOOL_BITFIELD deps_desc::readonly |
True when this context should be treated as a readonly by the analysis.
Referenced by add_dependence_list_and_free().
struct deps_reg* deps_desc::reg_last |
Element N is the next insn that sets (hard or pseudo) register N within the current basic block; or zero, if there is no such insn. Needed for new registers which may be introduced by splitting insns.
Referenced by haifa_note_mem_dep().
regset_head deps_desc::reg_last_in_use |
Element N is set for each register that has any nonzero element in reg_last[N].{uses,sets,clobbers}.
rtx deps_desc::sched_before_next_call |
A list of insns which use a pseudo register that does not already cross a call. We create dependencies between each of those insn and the next call insn, to ensure that they won't cross a call after scheduling is done.
rtx deps_desc::sched_before_next_jump |
Similarly, a list of insns which should not cross a branch.