- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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| static struct obstack | unfilled_slots_obstack |
| static rtx * | unfilled_firstobj |
| static rtx | function_return_label |
| static rtx | function_simple_return_label |
| static int * | uid_to_ruid |
| static int | max_uid |
| static int | num_insns_needing_delays [NUM_REORG_FUNCTIONS][MAX_REORG_PASSES] |
| static int | num_filled_delays [NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES] |
| static int | reorg_pass_number |
| static vec< rtx > | sibling_labels |
Referenced by note_delay_statistics().
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Add INSN to DELAY_LIST and return the head of the new list. The list must be in the order in which the insns are to be executed.
If we have an empty list, just make a new list element. If
INSN has its block number recorded, clear it since we may
be moving the insn to a new block. Otherwise this must be an INSN_LIST. Add INSN to the end of the
list.
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DELAY_LIST is a list of insns that have already been placed into delay slots. See if all of them have the same annulling status as ANNUL_TRUE_P. If not, return 0; otherwise return 1.
References insn_references_resource_p(), mark_set_resources(), and MARK_SRC_DEST_CALL.
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Return nonzero if CONDITION is more strict than the condition of INSN, i.e., if INSN will always branch if CONDITION is true.
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Try to find insns to place in delay slots.
If the current function has no insns other than the prologue and
epilogue, then do not try to fill any delay slots. Find the highest INSN_UID and allocate and initialize our map from
INSN_UID's to position in code. Initialize the list of insns that need filling.
Skip vector tables. We can't get attributes for them.
Ensure all jumps go to the last of a set of consecutive labels.
Show we haven't computed an end-of-function label yet.
Initialize the statistics for this function.
Now do the delay slot filling. Try everything twice in case earlier
changes make more slots fillable. If we made an end of function label, indicate that it is now
safe to delete it by undoing our prior adjustment to LABEL_NUSES.
If it is now unused, delete it. Delete any USE insns made by update_block; subsequent passes don't need
them or know how to deal with them. It is not clear why the line below is needed, but it does seem to be.
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Delete INSN and recursively delete insns that compute values used only by INSN. This uses the REG_DEAD notes computed during flow analysis. Look at all our REG_DEAD notes. If a previous insn does nothing other than set a register that dies in this insn, we can delete that insn as well. On machines with CC0, if CC0 is used in this insn, we may be able to delete the insn that set it.
We assume that at this stage
CC's are always set explicitly
and always immediately before the jump that
will use them. So if the previous insn
exists to set the CC's, delete it
(unless it performs auto-increments, etc.). Otherwise, show that cc0 won't be used.
Verify that the REG_NOTE is legitimate.
References add_insn_after(), delete_related_insns(), delete_scheduled_jump(), and emit_copy_of_insn_after().
Referenced by delete_prior_computation(), and try_merge_delay_insns().
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Delete INSN from the delay slot of the insn that it is in, which may produce an insn with no delay slots. Return the new insn.
We first must find the insn containing the SEQUENCE with INSN in its
delay slot. Do this by finding an insn, TRIAL, where
PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. Create a delay list consisting of all the insns other than the one
we are deleting (unless we were the only one). Delete the old SEQUENCE, re-emit the insn that used to have the delay
list, and rebuild the delay list if non-empty. If there was a barrier after the old SEQUENCE, remit it.
If there are any delay insns, remit them. Otherwise clear the
annul flag. Show we need to fill this insn again.
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If all INSN does is set the pc, delete it, and delete the insn that set the condition codes for it if that's what the previous thing was.
References reorg_redirect_jump(), and set_unique_reg_note().
Referenced by delete_prior_computation().
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Recursively delete prior insns that compute the value (used only by INSN which the caller is deleting) stored in the register mentioned by NOTE which is a REG_DEAD note associated with INSN.
If we reach a CALL which is not calling a const function
or the callee pops the arguments, then give up. If we reach a SEQUENCE, it is too complex to try to
do anything with it, so give up. We can be run during
and after reorg, so SEQUENCE rtl can legitimately show
up here. reorg creates USEs that look like this. We leave them
alone because reorg needs them for its own purposes. If we find a SET of something else, we can't
delete the insn. We may have a multi-word hard register and some, but not
all, of the words of the register are needed in subsequent
insns. Write REG_UNUSED notes for those parts that were not
needed. If PAT references the register that dies here, it is an
additional use. Hence any prior SET isn't dead. However, this
insn becomes the new place for the REG_DEAD note.
References any_condjump_p(), cfun, condjump_in_parallel_p(), condjump_p(), delete_from_delay_slot(), delete_jump(), delete_related_insns(), find_end_label(), follow_jumps(), invert_jump(), mostly_true_jump(), next_active_insn(), no_labels_between_p(), optimize_function_for_size_p(), prev_active_insn(), reorg_redirect_jump(), set_unique_reg_note(), simplejump_or_return_p(), and skip_consecutive_labels().
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Referenced by delete_computation().
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Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down the insn that sets CC0 for it and delete it too.
Delete the insn that sets cc0 for us. On machines without cc0, we could
delete the insn that sets the condition code, but it is hard to find it.
Since this case is rare anyway, don't bother trying; there would likely
be other insns that became dead anyway, which we wouldn't know to
delete. If a reg-note was found, it points to an insn to set CC0. This
insn is in the delay list of some other insn. So delete it from
the delay list it was in. The insn setting CC0 is our previous insn, but it may be in
a delay slot. It will be the last insn in the delay slot, if
it is.
References reorg_pass_number.
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Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace the pattern of INSN with the SEQUENCE. Returns the SEQUENCE that replaces INSN.
Allocate the rtvec to hold the insns and the SEQUENCE.
If DELAY_INSN has a location, use it for SEQ_INSN. If DELAY_INSN does
not have a location, but one of the delayed insns does, we pick up a
location from there later. Unlink INSN from the insn chain, so that we can put it into
the SEQUENCE. Remember where we want to emit SEQUENCE in AFTER. Build our SEQUENCE and rebuild the insn chain.
Show that this copy of the insn isn't deleted.
Unlink insn from its original place, and re-emit it into
the sequence. SPARC assembler, for instance, emit warning when debug info is output
into the delay slot. Remove any REG_DEAD notes because we can't rely on them now
that the insn has been moved. Keep the label reference count up to date.
Splice our SEQUENCE into the insn stream where INSN used to be.
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Make another attempt to find insns to place in delay slots. We previously looked for insns located in front of the delay insn and, for non-jump delay insns, located behind the delay insn. Here only try to schedule jump insns and try to move insns from either the target or the following insns into the delay slot. If annulling is supported, we will be likely to do this. Otherwise, we can do this only if safe.
Some machine description have defined instructions to have
delay slots only in certain circumstances which may depend on
nearby insns (which change due to reorg's actions).
For example, the PA port normally has delay slots for unconditional
jumps.
However, the PA port claims such jumps do not have a delay slot
if they are immediate successors of certain CALL_INSNs. This
allows the port to favor filling the delay slot of the call with
the unconditional jump. Get the next active fallthrough and target insns and see if we own
them. Then see whether the branch is likely true. We don't need
to do a lot of this for unconditional branches. If this insn is expected to branch, first try to get insns from our
target, then our fallthrough insns. If it is not expected to branch,
try the other order. Even though we didn't find anything for delay slots,
we might have found a redundant insn which we deleted
from the thread that was filled. So we have to recompute
the next insn at the target.
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Scan a function looking for insns that need a delay slot and find insns to put into the delay slot. NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such as calls). We do these first since we don't want jump insns (that are easier to fill) to get the only insns that could be used for non-jump insns. When it is zero, only try to fill JUMP_INSNs. When slots are filled in this manner, the insns (including the delay_insn) are put together in a SEQUENCE rtx. In this fashion, it is possible to tell whether a delay slot has really been filled or not. `final' knows how to deal with this, by communicating through FINAL_SEQUENCE.
Get the next insn to fill. If it has already had any slots assigned,
we can't do anything with it. Maybe we'll improve this later. It may have been that this insn used to need delay slots, but
now doesn't; ignore in that case. This can happen, for example,
on the HP PA RISC, where the number of delay slots depends on
what insns are nearby. Some machine description have defined instructions to have
delay slots only in certain circumstances which may depend on
nearby insns (which change due to reorg's actions).
For example, the PA port normally has delay slots for unconditional
jumps.
However, the PA port claims such jumps do not have a delay slot
if they are immediate successors of certain CALL_INSNs. This
allows the port to favor filling the delay slot of the call with
the unconditional jump. This insn needs, or can use, some delay slots. SLOTS_TO_FILL
says how many. After initialization, first try optimizing
call _foo call _foo
nop add %o7,.-L1,%o7
b,a L1
nop
If this case applies, the delay slot of the call is filled with
the unconditional jump. This is done first to avoid having the
delay slot of the call filled in the backward scan. Also, since
the unconditional jump is likely to also have a delay slot, that
insn must exist when it is subsequently scanned.
This is tried on each insn with delay slots as some machines
have insns which perform calls, but are not represented as
CALL_INSNs. TRIAL may have had its delay slot filled, then unfilled. When
the delay slot is unfilled, TRIAL is placed back on the unfilled
slots obstack. Unfortunately, it is placed on the end of the
obstack, not in its original location. Therefore, we must search
from entry i + 1 to the end of the unfilled slots obstack to
try and find TRIAL. Remove the unconditional jump from consideration for delay slot
filling and unthread it. Now, scan backwards from the insn to search for a potential
delay-slot candidate. Stop searching when a label or jump is hit.
For each candidate, if it is to go into the delay slot (moved
forward in execution sequence), it must not need or set any resources
that were set by later insns and must not set any resources that
are needed for those insns.
The delay slot insn itself sets resources unless it is a call
(in which case the called routine, not the insn itself, is doing
the setting). This must be an INSN or CALL_INSN.
Stand-alone USE and CLOBBER are just for flow.
Check for resource conflict first, to avoid unnecessary
splitting. Can't separate set of cc0 from its use.
In this case, we are searching backward, so if we
find insns to put on the delay list, we want
to put them at the head, rather than the
tail, of the list. If all needed slots haven't been filled, we come here.
Try to optimize case of jumping around a single insn.
Try to get insns from beyond the insn needing the delay slot.
These insns can neither set or reference resources set in insns being
skipped, cannot set resources in the insn being skipped, and, if this
is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
call might not return).
There used to be code which continued past the target label if
we saw all uses of the target label. This code did not work,
because it failed to account for some instructions which were
both annulled and marked as from the target. This can happen as a
result of optimize_skip. Since this code was redundant with
fill_eager_delay_slots anyways, it was just deleted. If this instruction could throw an exception which is
caught in the same function, then it's not safe to fill
the delay slot with an instruction from beyond this
point. For example, consider:
int i = 2;
try {
f();
i = 3;
} catch (...) {}
return i;
Even though `i' is a local variable, we must be sure not
to put `i = 3' in the delay slot if `f' might throw an
exception.
Presumably, we should also check to see if we could get
back to this function via `setjmp'. This must be an INSN or CALL_INSN.
Stand-alone USE and CLOBBER are just for flow.
If this already has filled delay slots, get the insn needing
the delay slots. Stop our search when seeing a jump.
See if we have a resource problem before we try to split.
Ensure we don't put insns between the setting of cc and the
comparison by moving a setting of cc into an earlier delay
slot since these insns could clobber the condition code. If this is a call, we might not get here.
If there are slots left to fill and our search was stopped by an
unconditional branch, try the insn at the branch target. We can
redirect the branch if it works.
Don't do this if the insn at the branch target is a branch. See comment in relax_delay_slots about necessity of using
next_real_insn here. If this is an unconditional jump, then try to get insns from the
target of the jump.
References delete_related_insns(), prev_nonnote_insn(), try_split(), update_block(), and update_reg_dead_notes().
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Try to find insns to place in delay slots. INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION or is an unconditional branch if CONDITION is const_true_rtx. *PSLOTS_FILLED is updated with the number of slots that we have filled. THREAD is a flow-of-control, either the insns to be executed if the branch is true or if the branch is false, THREAD_IF_TRUE says which. OPPOSITE_THREAD is the thread in the opposite direction. It is used to see if any potential delay slot insns set things needed there. LIKELY is nonzero if it is extremely likely that the branch will be taken and THREAD_IF_TRUE is set. This is used for the branch at the end of a loop back up to the top. OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the thread. I.e., it is the fallthrough code of our jump or the target of the jump when we are the only jump going there. If OWN_THREAD is false, it must be the "true" thread of a jump. In that case, we can only take insns from the head of the thread for our delay slot. We then adjust the jump to point after the insns we have taken.
Validate our arguments.
If our thread is the end of subroutine, we can't get any delay
insns from that. If this is an unconditional branch, nothing is needed at the
opposite thread. Otherwise, compute what is needed there. If the insn at THREAD can be split, do it here to avoid having to
update THREAD and NEW_THREAD if it is done in the loop below. Also
initialize NEW_THREAD. Scan insns at THREAD. We are looking for an insn that can be removed
from THREAD (it neither sets nor references resources that were set
ahead of it and it doesn't set anything needs by the insns ahead of
it) and that either can be placed in an annulling insn or aren't
needed at OPPOSITE_THREAD. If we do not own this thread, we must stop as soon as we find
something that we can't put in a delay slot, since all we can do
is branch into THREAD at a later point. Therefore, labels stop
the search if this is not the `true' thread. If we have passed a label, we no longer own this thread.
If TRIAL conflicts with the insns ahead of it, we lose. Also,
don't separate or copy insns that set and use CC0. If TRIAL is redundant with some insn before INSN, we don't
actually need to add it to the delay list; we can merely pretend
we did. There are two ways we can win: If TRIAL doesn't set anything
needed at the opposite thread and can't trap, or if it can
go into an annulled delay slot. If we own this thread, delete the insn. If this is the
destination of a branch, show that a basic block status
may have been updated. In any case, mark the new
starting point of this thread. We are moving this insn, not deleting it. We must
temporarily increment the use count on any referenced
label lest it be deleted by delete_related_insns. REG_LABEL_OPERAND could be
NOTE_INSN_DELETED_LABEL too. REG_LABEL_OPERAND could be
NOTE_INSN_DELETED_LABEL too. Even though we have filled all the slots, we
may be branching to a location that has a
redundant insn. Skip any if so. We know we do not own the thread, so no need
to call update_block and delete_insn. This insn can't go into a delay slot.
Ensure we don't put insns between the setting of cc and the comparison
by moving a setting of cc into an earlier delay slot since these insns
could clobber the condition code. If this insn is a register-register copy and the next insn has
a use of our destination, change it to use our source. That way,
it will become a candidate for our delay slot the next time
through this loop. This case occurs commonly in loops that
scan a list.
We could check for more complex cases than those tested below,
but it doesn't seem worth it. It might also be a good idea to try
to swap the two insns. That might do better.
We can't do this if the next insn modifies our destination, because
that would make the replacement into the insn invalid. We also can't
do this if it modifies our source, because it might be an earlyclobber
operand. This latter test also prevents updating the contents of
a PRE_INC. We also can't do this if there's overlap of source and
destination. Overlap may happen for larger-than-register-size modes. If we stopped on a branch insn that has delay slots, see if we can
steal some of the insns in those slots. If this is the `true' thread, we will want to follow the jump,
so we can only do this if we have taken everything up to here. If we owned the thread and are told that it branched
elsewhere, make sure we own the thread at the new location. If we haven't found anything for this delay slot and it is very
likely that the branch will be taken, see if the insn at our target
increments or decrements a register with an increment that does not
depend on the destination register. If so, try to place the opposite
arithmetic insn after the jump insn and put the arithmetic insn in the
delay slot. If we can't do this, return. If this is a constant adjustment, use the same code with
the negated constant. Otherwise, reverse the sense of the
arithmetic. If we are to branch into the middle of this thread, find an appropriate
label or make a new one if none, and redirect INSN to it. If we hit the
end of the function, use the end-of-function label.
Referenced by delete_prior_computation(), and note_delay_statistics().
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Find a label at the end of the function or before a RETURN. If there is none, try to make one. If that fails, returns 0. The property of such a label is that it is placed just before the epilogue or a bare RETURN insn, so that another bare RETURN can be turned into a jump to the label unconditionally. In particular, the label cannot be placed before a RETURN insn with a filled delay slot. ??? There may be a problem with the current implementation. Suppose we start with a bare RETURN insn and call find_end_label. It may set function_return_label just before the RETURN. Suppose the machinery is able to fill the delay slot of the RETURN insn afterwards. Then function_return_label is no longer valid according to the property described above and find_end_label will still return it unmodified. Note that this is probably mitigated by the following observation: once function_return_label is made, it is very likely the target of a jump, so filling the delay slot of the RETURN will be much more difficult. KIND is either simple_return_rtx or ret_rtx, indicating which type of return we're looking for.
If we found one previously, return it.
Otherwise, see if there is a label at the end of the function. If there
is, it must be that RETURN insns aren't needed, so that is our return
label and we don't have to do anything else. When a target threads its epilogue we might already have a
suitable return insn. If so put a label before it for the
function_return_label. Put the label before any USE insns that may precede the RETURN
insn. If the basic block reorder pass moves the return insn to
some other place try to locate it again and put our
function_return_label there. Put the label before any USE insns that may precede the
RETURN insn. The RETURN insn has its delay slot filled so we cannot
emit the label just before it. Since we already have
an epilogue and cannot emit a new RETURN, we cannot
emit the label at all. Otherwise, make a new label and emit a RETURN and BARRIER,
if needed. The return we make may have delay slots too.
Show one additional use for this label so it won't go away until
we are done.
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A wrapper around next_active_insn which takes care to return ret_rtx unchanged.
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Called when an insn redundant with start_insn is deleted. If there is a REG_DEAD note for the target of start_insn between start_insn and stop_insn, then the REG_DEAD note needs to be deleted since the value no longer dies there. If the REG_DEAD note isn't deleted, then mark_target_live_regs may be confused into thinking the register is dead.
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Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP; return the ultimate label reached by any such chain of jumps. Return a suitable return rtx if the chain ultimately leads to a return instruction. If LABEL is not followed by a jump, return LABEL. If the chain loops or we can't find end, return LABEL, since that tells caller to avoid changing the insn. If the returned label is obtained by following a REG_CROSSING_JUMP jump, set *CROSSING to true, otherwise set it to false.
If we have found a cycle, make the insn jump to itself.
Referenced by delete_prior_computation().
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At -O0 dataflow info isn't updated after RA.
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Machine dependent reorg pass.
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Return the condition under which INSN will branch to TARGET. If TARGET is zero, return the condition under which INSN will return. If INSN is an unconditional branch, return const_true_rtx. If INSN isn't a simple type of jump, or it doesn't go to TARGET, return 0.
References get_jump_flags().
Referenced by get_branch_condition().
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Encode and return branch direction and prediction information for
INSN assuming it will jump to LABEL.
Non conditional branches return no direction information and
are predicted as very likely taken. get_jump_flags can be passed any insn with delay slots, these may
be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
direction information, and only if they are conditional jumps.
If LABEL is a return, then there is no way to determine the branch
direction. No valid direction information.
References condjump_in_parallel_p(), const_true_rtx, pc_rtx, reversed_comparison_code(), and SET.
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Return the label before INSN, or put a new label there. If SIBLING is non-zero, it is another label associated with the new label (if any), typically the former target of the jump that will be redirected to the new label.
Find an existing label at this point
or make a new one if there is none.
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Return TRUE if any resource marked in RES, a `struct resources', is referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called routine is using those resources. We compute this by computing all the resources referenced by INSN and seeing if this conflicts with RES. It might be faster to directly check ourselves, and this is the way it used to work, but it means duplicating a large block of complex code.
References mark_set_resources(), MARK_SRC_DEST, MARK_SRC_DEST_CALL, and resource_conflicts_p().
Referenced by check_annul_list_true_false(), and try_merge_delay_insns().
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Return TRUE if INSN modifies resources that are marked in RES. INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be included. CC0 is only modified if it is explicitly set; see comments in front of mark_set_resources for details.
References function_return_label, function_simple_return_label, ret_rtx, and simple_return_rtx.
Referenced by try_merge_delay_insns().
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INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER and REG_CC_USER notes so we can find it.
| rtl_opt_pass* make_pass_delay_slots | ( | ) |
| rtl_opt_pass* make_pass_machine_reorg | ( | ) |
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Look for filled jumps to the end of function label. We can try to convert them into RETURN insns if the insns in the delay slot are valid for the RETURN as well.
See if there is a RETURN insn in the function other than the one we
made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
into a RETURN to jump to it. Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
was equal to END_OF_FUNCTION_LABEL. Clear the list of insns to fill so we can use it.
Only look at filled JUMP_INSNs that go to the end of function
label. If we can't make the jump into a RETURN, try to redirect it to the best
RETURN and go on to the next insn. Make sure redirecting the jump will not invalidate the delay
slot insns. See if this RETURN can accept the insns current in its delay slot.
It can if it has more or an equal number of slots and the contents
of each is valid. We have to do something with this insn. If it is an unconditional
RETURN, delete the SEQUENCE and output the individual insns,
followed by the RETURN. Then set things up so we try to find
insns for its delay slots, if it needs some. It is probably more efficient to keep this with its current
delay slot as a branch to a RETURN. Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
new delay slots we have created.
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Referenced by delete_prior_computation().
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Return truth value of the statement that this branch is mostly taken. If we think that the branch is extremely likely to be taken, we return 2. If the branch is slightly more likely to be taken, return 1. If the branch is slightly less likely to be taken, return 0 and if the branch is highly unlikely to be taken, return -1.
If branch probabilities are available, then use that number since it
always gives a correct answer. If there is no note, assume branches are not taken.
This should be rare.
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Optimize the following cases:
1. When a conditional branch skips over only one instruction,
use an annulling branch and put that insn in the delay slot.
Use either a branch that annuls when the condition if true or
invert the test with a branch that annuls when the condition is
false. This saves insns, since otherwise we must copy an insn
from the L1 target.
(orig) (skip) (otherwise)
Bcc.n L1 Bcc',a L1 Bcc,a L1'
insn insn insn2
L1: L1: L1:
insn2 insn2 insn2
insn3 insn3 L1':
insn3
2. When a conditional branch skips over only one instruction,
and after that, it unconditionally branches somewhere else,
perform the similar optimization. This saves executing the
second branch in the case where the inverted condition is true.
Bcc.n L1 Bcc',a L2
insn insn
L1: L1:
Bra L2 Bra L2
INSN is a JUMP_INSN.
This should be expanded to skip over N insns, where N is the number
of delay slots required. There are two cases where we are just executing one insn (we assume
here that a branch requires only one insn; this should be generalized
at some point): Where the branch goes around a single insn or where
we have one insn followed by a branch to the same label we branch to.
In both of these cases, inverting the jump and annulling the delay
slot give the same effect in fewer insns. Also, if we are targeting an unconditional
branch, thread our jump to the target of that branch. Don't
change this into a RETURN here, because it may not accept what
we have in the delay slot. We'll fix this up later. Recompute the flags based on TARGET_LABEL since threading
the jump to TARGET_LABEL may change the direction of the
jump (which may change the circumstances in which the
delay slot is nullified).
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Return 1 if THREAD can only be executed in one way. If LABEL is nonzero, it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH is nonzero, we are allowed to fall into this thread; otherwise, we are not. If LABEL is used more than one or we pass a label other than LABEL before finding an active insn, we do not own this thread.
We don't own the function end.
Get the first active insn, or THREAD, if it is an active insn.
Ensure that we reach a BARRIER before any insn or label.
References reg_set_p(), and remove_note().
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Return nonzero if redirecting JUMP to NEWLABEL does not invalidate any insns we wish to place in the delay slot of JUMP.
Make sure all the insns in DELAY_LIST would still be
valid after threading the jump. If they are still
valid, then return nonzero.
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Return nonzero if redirecting JUMP to NEWLABEL does not invalidate any insns already in the delay slot of JUMP.
Make sure all the delay slots of this jump would still
be valid after threading the jump. If they are still
valid, then return nonzero.
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See if INSN is redundant with an insn in front of TARGET. Often this is called when INSN is a candidate for a delay slot of TARGET. DELAY_LIST are insns that will be placed in delay slots of TARGET in front of INSN. Often INSN will be redundant with an insn in a delay slot of some previous insn. This happens when we have a series of branches to the same label; in that case the first insn at the target might want to go into each of the delay slots. If we are not careful, this routine can take up a significant fraction of the total compilation time (4%), but only wins rarely. Hence we speed this routine up by making two passes. The first pass goes back until it hits a label and sees if it finds an insn with an identical pattern. Only in this (relatively rare) event does it check for data conflicts. We do not split insns we encounter. This could cause us not to find a redundant insn, but the cost of splitting seems greater than the possible gain in rare cases.
If INSN has any REG_UNUSED notes, it can't match anything since we
are allowed to not actually assign to such a register. Scan backwards looking for a match.
Stop for a CALL and its delay slots because it is difficult to
track its resource needs correctly. Stop for an INSN or JUMP_INSN with delayed effects and its delay
slots because it is difficult to track its resource needs
correctly. See if any of the insns in the delay slot match, updating
resource requirements as we go. If found a match, exit this loop early.
If we didn't find an insn that matches, return 0.
See what resources this insn sets and needs. If they overlap, or
if this insn references CC0, it can't be redundant. If TARGET is a SEQUENCE, get the main insn.
The insn requiring the delay may not set anything needed or set by
INSN. Insns we pass may not set either NEEDED or SET, so merge them for
simpler tests. This insn isn't redundant if it conflicts with an insn that either is
or will be in a delay slot of TARGET. Scan backwards until we reach a label or an insn that uses something
INSN sets or sets something insn uses or sets. If this is a CALL_INSN and its delay slots, it is hard to track
the resource needs properly, so give up. If this is an INSN or JUMP_INSN with delayed effects, it
is hard to track the resource needs properly, so give up. See if any of the insns in the delay slot match, updating
resource requirements as we go. If an insn will be annulled if the branch is false, it isn't
considered as a possible duplicate insn. Show that this insn will be used in the sequel.
Unless this is an annulled insn from the target of a branch,
we must stop if it sets anything needed or set by INSN. If the insn requiring the delay slot conflicts with INSN, we
must stop. See if TRIAL is the same as INSN.
Can't go any further if TRIAL conflicts with INSN.
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Once we have tried two ways to fill a delay slot, make a pass over the code to try to improve the results and to do such things as more jump threading.
Look at every JUMP_INSN and see if we can improve it.
If this is a jump insn, see if it now jumps to a jump, jumps to
the next insn, or jumps to a label that is not the last of a
group of consecutive labels. See if this jump conditionally branches around an unconditional
jump. If so, invert this jump and point it to the target of the
second jump. Be careful how we do this to avoid deleting code or
labels that are momentarily dead. See similar optimization
in jump.c.
We also need to ensure we properly handle the case when
invert_jump fails. If this is an unconditional jump and the previous insn is a
conditional jump, try reversing the condition of the previous
insn and swapping our targets. The next pass might be able to
fill the slots.
Don't do this if we expect the conditional branch to be true, because
we would then be making the more common case longer. Now look only at cases where we have a filled delay slot.
See if the first insn in the delay slot is redundant with some
previous insn. Remove it from the delay slot if so; then set up
to reprocess this insn. See if we have a RETURN insn with a filled delay slot followed
by a RETURN insn with an unfilled a delay slot. If so, we can delete
the first RETURN (but not its delay insn). This gives the same
effect in fewer instructions.
Only do so if optimizing for size since this results in slower, but
smaller code. Delete the RETURN and just execute the delay list insns.
We do this by deleting the INSN containing the SEQUENCE, then
re-emitting the insns separately, and then deleting the RETURN.
This allows the count of the jump target to be properly
decremented.
Note that we need to change the INSN_UID of the re-emitted insns
since it is used to hash the insns for mark_target_live_regs and
the re-emitted insns will no longer be wrapped up in a SEQUENCE.
Clear the from target bit, since these insns are no longer
in delay slots. Now look only at the cases where we have a filled JUMP_INSN.
If this jump goes to another unconditional jump, thread it, but
don't convert a jump into a RETURN here. If the first insn at TARGET_LABEL is redundant with a previous
insn, redirect the jump to the following insn and process again.
We use next_real_insn instead of next_active_insn so we
don't skip USE-markers, or we'll end up with incorrect
liveness info. Figure out where to emit the special USE insn so we don't
later incorrectly compute register live/death info. Insert the special USE insn and update dataflow info.
Now emit a label before the special USE insn, and
redirect our jump to the new label. Similarly, if it is an unconditional jump with one insn in its
delay list and that insn is redundant, thread the jump. See if we have a simple (conditional) jump that is useless.
If the last insn in the delay slot sets CC0 for some insn,
various code assumes that it is in a delay slot. We could
put it back where it belonged and delete the register notes,
but it doesn't seem worthwhile in this uncommon case. All this insn does is execute its delay list and jump to the
following insn. So delete the jump and just execute the delay
list insns.
We do this by deleting the INSN containing the SEQUENCE, then
re-emitting the insns separately, and then deleting the jump.
This allows the count of the jump target to be properly
decremented.
Note that we need to change the INSN_UID of the re-emitted insns
since it is used to hash the insns for mark_target_live_regs and
the re-emitted insns will no longer be wrapped up in a SEQUENCE.
Clear the from target bit, since these insns are no longer
in delay slots. See if this is an unconditional jump around a single insn which is
identical to the one in its delay slot. In this case, we can just
delete the branch and the insn in its delay slot. See if this jump (with its delay slots) conditionally branches
around an unconditional jump (without delay slots). If so, invert
this jump and point it to the target of the second jump. We cannot
do this for annulled jumps, though. Again, don't convert a jump to
a RETURN here. find_end_label can generate a new label. Check this first.
Be careful how we do this to avoid deleting code or labels
that are momentarily dead. See similar optimization in
jump.c Must update the INSN_FROM_TARGET_P bits now that
the branch is reversed, so that mark_target_live_regs
will handle the delay slot insn correctly. If we own the thread opposite the way this insn branches, see if we
can merge its delay slots with following insns. If we get here, we haven't deleted INSN. But we may have deleted
NEXT, so recompute it.
Referenced by delete_jump(), and delete_prior_computation().
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Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for the basic block containing the jump.
Referenced by insn_references_resource_p(), and resource_conflicts_p().
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Return TRUE if any resources are marked in both RES1 and RES2 or if either resource set contains a volatile memory reference. Otherwise, return FALSE.
References mark_referenced_resources(), and resource_conflicts_p().
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Run delay slot optimization.
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Return true iff INSN is a simplejump, or any kind of return insn.
Referenced by delete_prior_computation(), and note_delay_statistics().
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First, some functions that were used before GCC got a control flow graph. These functions are now only used here in reorg.c, and have therefore been moved here to avoid inadvertent misuse elsewhere in the compiler.
Return the last label to mark the same position as LABEL. Return LABEL itself if it is null or any return rtx.
Referenced by delete_prior_computation().
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Similar to steal_delay_list_from_target except that SEQ is on the fallthrough path of INSN. Here we only do something if the delay insn of SEQ is an unconditional branch. In that case we steal its delay slot for INSN since unconditional branches are much easier to fill.
We can't do anything if SEQ's delay insn isn't an
unconditional branch. If TRIAL sets CC0, stealing it will move it too far from the use
of CC0. If this insn was already done, we don't need it.
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INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that the condition tested by INSN is CONDITION and the resources shown in OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns from SEQ's delay list, in addition to whatever insns it may execute (in DELAY_LIST). SETS and NEEDED are denote resources already set and needed while searching for delay slot insns. Return the concatenated delay list if possible, otherwise, return 0. SLOTS_TO_FILL is the total number of slots required by INSN, and PSLOTS_FILLED points to the number filled so far (also the number of insns in DELAY_LIST). It is updated with the number that have been filled from the SEQUENCE, if any. PANNUL_P points to a nonzero value if we already know that we need to annul INSN. If this routine determines that annulling is needed, it may set that value nonzero. PNEW_THREAD points to a location that is to receive the place at which execution should continue.
We can't do anything if there are more delay slots in SEQ than we
can handle, or if we don't know that it will be a taken branch.
We know that it will be a taken branch if it is either an unconditional
branch or a conditional branch with a stricter branch condition.
Also, exit if the branch has more than one set, since then it is computing
other results that can't be ignored, e.g. the HPPA mov&branch instruction.
??? It may be possible to move other sets into INSN in addition to
moving the instructions in the delay slots.
We can not steal the delay list if one of the instructions in the
current delay_list modifies the condition codes and the jump in the
sequence is a conditional jump. We can not do this because we can
not change the direction of the jump because the condition codes
will effect the direction of the jump in the sequence. On some targets, branches with delay slots can have a limited
displacement. Give the back end a chance to tell us we can't do
this. If TRIAL sets CC0, we can't copy it, so we can't steal this
delay list. If TRIAL is from the fallthrough code of an annulled branch insn
in SEQ, we cannot use it. If this insn was already done (usually in a previous delay slot),
pretend we put it in our delay slot. We will end up re-vectoring this branch, so compute flags
based on jumping to the new label. Show the place to which we will be branching.
Add any new insns to the delay list and update the count of the
number of slots filled.
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Return TRUE if this insn should stop the search for insn to fill delay slots. LABELS_P indicates that labels should terminate the search. In all cases, jumps terminate the search.
If the insn can throw an exception that is caught within the function,
it may effectively perform a jump from the viewpoint of the function.
Therefore act like for a jump. OK unless it contains a delay slot or is an `asm' insn of some type.
We don't know anything about these.
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Try merging insns starting at THREAD which match exactly the insns in INSN's delay list. If all insns were matched and the insn was previously annulling, the annul bit will be cleared. For each insn that is merged, if the branch is or will be non-annulling, we delete the merged insn.
If this is not an annulling branch, take into account anything needed in
INSN's delay slot. This prevents two increments from being incorrectly
folded into one. If we are annulling, this would be the correct
thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
will essentially disable this optimization. This method is somewhat of
a kludge, but I don't see a better way.) TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER.
We can't share an insn that sets cc0.
Update next_trial, in case try_split succeeded.
Likewise THREAD.
Have to test this condition if annul condition is different
from (and less restrictive than) non-annulling one. See if we stopped on a filled insn. If we did, try to see if its
delay slots match. Account for resources set/needed by the filled insn.
Keep track of the set/referenced resources for the delay
slots of any trial insns we encounter. If all insns in the delay slot have been matched and we were previously
annulling the branch, we need not any more. In that case delete all the
merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
the delay list so that we know that it isn't only being used at the
target.
References delete_from_delay_slot(), insn_references_resource_p(), insn_sets_resource_p(), mark_referenced_resources(), mark_set_resources(), MARK_SRC_DEST_CALL, rtx_equal_p(), sets_cc0_p(), and update_block().
Referenced by fill_simple_delay_slots(), note_delay_statistics(), and try_merge_delay_insns().
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Called when INSN is being moved from a location near the target of a jump. We leave a marker of the form (use (INSN)) immediately in front of WHERE for mark_target_live_regs. These markers will be deleted when reorg finishes. We used to try to update the live status of registers if WHERE is at the start of a basic block, but that can't work since we may remove a BARRIER in relax_delay_slots.
Ignore if this was in a delay slot and it came from the target of
a branch. INSN might be making a value live in a block where it didn't use to
be. So recompute liveness information for this block.
References emit_label_after(), gen_label_rtx(), and prev_nonnote_insn().
Referenced by fill_simple_delay_slots().
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Called when INSN is being moved forward into a delay slot of DELAYED_INSN. We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes that reference values used in INSN. If we find one, then we move the REG_DEAD note to INSN. This is needed to handle the case where a later insn (after INSN) has a REG_DEAD note for a register used by INSN, and this later insn subsequently gets moved before a CODE_LABEL because it is a redundant insn. In this case, mark_target_live_regs may be confused into thinking the register is dead because it sees a REG_DEAD note immediately before a CODE_LABEL.
Move the REG_DEAD note from P to INSN.
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Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN. This handles the case of udivmodXi4 instructions which optimize their output depending on whether any REG_UNUSED notes are present. we must make sure that INSN calculates as many results as REDUNDANT_INSN does.
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Points to the label before the end of the function, or before a return insn.
Referenced by insn_sets_resource_p().
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Likewise for a simple_return.
Referenced by insn_sets_resource_p().
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Highest valid index in `uid_to_ruid'.
Referenced by delay_i2_hasher::hash(), and update_alignments().
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Referenced by delete_scheduled_jump().
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Mapping between INSN_UID's and position in the code since INSN_UID's do not always monotonically increase.
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Insns which have delay slots that have not yet been filled.
1.8.1.1