- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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| int active_insn_p | ( | ) |
Find the next insn after INSN that really does something. This routine does not look inside SEQUENCEs. After reload this also skips over standalone USE and CLOBBER insn.
Referenced by contains_no_active_insn_p(), emit_insn_at_entry(), next_insn(), peep2_regno_dead_p(), record_insns(), and set_insn_locations().
| void add_function_usage_to | ( | ) |
Append CALL_FUSAGE to the CALL_INSN_FUNCTION_USAGE for CALL_INSN.
Put the register usage information on the CALL. If there is already
some usage information, put ours at the end.
| void add_insn | ( | ) |
Add INSN to the end of the doubly-linked list. INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE.
Referenced by emit_barrier_after(), emit_call_insn_after_setloc(), emit_debug_insn_after(), emit_pattern_after_setloc(), emit_pattern_before_setloc(), expand_copysign(), and note_outside_basic_block_p().
| void add_insn_after | ( | ) |
Like add_insn_after_nobb, but try to set BLOCK_FOR_INSN. If BB is NULL, an attempt is made to infer the bb from before. This and the next function should be the only functions called to insert an insn once delay slots have been filled since only they know how to update a SEQUENCE.
Should not happen as first in the BB is always
either NOTE or LABEL. Avoid clobbering of structure when creating new BB.
Referenced by delete_computation().
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Add INSN into the doubly-linked list after insn AFTER.
Scan all pending sequences too.
| void add_insn_before | ( | ) |
Like add_insn_before_nobb, but try to set BLOCK_FOR_INSN. If BB is NULL, an attempt is made to infer the bb from before. This and the previous function should be the only functions called to insert an insn once delay slots have been filled since only they know how to update a SEQUENCE.
Should not happen as first in the BB is always either NOTE or
LABEL. Avoid clobbering of structure when creating new BB.
Referenced by apply_reg_moves().
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Add INSN into the doubly-linked list before insn BEFORE.
Scan all pending sequences too.
| rtx adjust_address_1 | ( | rtx | memref, |
| enum machine_mode | mode, | ||
| HOST_WIDE_INT | offset, | ||
| int | validate, | ||
| int | adjust_address, | ||
| int | adjust_object, | ||
| HOST_WIDE_INT | size | ||
| ) |
Return a memory reference like MEMREF, but with its mode changed to MODE and its address offset by OFFSET bytes. If VALIDATE is nonzero, the memory address is forced to be valid. If ADJUST_ADDRESS is zero, OFFSET is only used to update MEM_ATTRS and the caller is responsible for adjusting MEMREF base register. If ADJUST_OBJECT is zero, the underlying object associated with the memory reference is left unchanged and the caller is responsible for dealing with it. Otherwise, if the new memory reference is outside the underlying object, even partially, then the object is dropped. SIZE, if nonzero, is the size of an access in cases where MODE has no inherent size.
VOIDmode means no mode change for change_address_1.
Take the size of non-BLKmode accesses from the mode.
If there are no changes, just return the original memory reference.
??? Prefer to create garbage instead of creating shared rtl.
This may happen even if offset is nonzero -- consider
(plus (plus reg reg) const_int) -- so do this always. Convert a possibly large offset to a signed value within the
range of the target address space. If MEMREF is a LO_SUM and the offset is within the alignment of the
object, we can merge it into the LO_SUM. If MEMREF is a ZERO_EXTEND from pointer_mode and the offset is valid
in that mode, we merge it into the ZERO_EXTEND. We take advantage of
the fact that pointers are not allowed to overflow. If the address is a REG, change_address_1 rightfully returns memref,
but this would destroy memref's MEM_ATTRS. Conservatively drop the object if we don't know where we start from.
Compute the new values of the memory attributes due to this adjustment.
We add the offsets and update the alignment. Drop the object if the new left end is not within its bounds.
Compute the new alignment by taking the MIN of the alignment and the
lowest-order set bit in OFFSET, but don't change the alignment if OFFSET
if zero. Drop the object if the new right end is not within its bounds.
??? The store_by_pieces machinery generates negative sizes,
so don't assert for that here.
| rtx adjust_automodify_address_1 | ( | rtx | memref, |
| enum machine_mode | mode, | ||
| rtx | addr, | ||
| HOST_WIDE_INT | offset, | ||
| int | validate | ||
| ) |
Return a memory reference like MEMREF, but with its mode changed to MODE and its address changed to ADDR, which is assumed to be MEMREF offset by OFFSET bytes. If VALIDATE is nonzero, the memory address is forced to be valid.
| void adjust_reg_mode | ( | ) |
Adjust REG in-place so that it has mode MODE. It is assumed that the new register is a (possibly paradoxical) lowpart of the old one.
| int byte_lowpart_offset | ( | enum machine_mode | outer_mode, |
| enum machine_mode | inner_mode | ||
| ) |
Return the number of bytes between the start of an OUTER_MODE in-memory value and the start of an INNER_MODE in-memory value, given that the former is a lowpart of the latter. It may be a paradoxical lowpart, in which case the offset will be negative on big-endian targets.
Referenced by set_reg_attrs_from_value().
| rtx change_address | ( | ) |
Like change_address_1 with VALIDATE nonzero, but we are not saying in what way we are changing MEMREF, so we only preserve the alias set.
If there are no changes, just return the original memory reference.
Referenced by assign_parm_adjust_entry_rtl().
Referenced by set_mem_attributes().
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Return a memory reference like MEMREF, but with its mode changed to MODE and its address changed to ADDR. (VOIDmode means don't change the mode. NULL for ADDR means don't change the address.) VALIDATE is nonzero if the returned memory location is required to be valid. The memory attributes are not changed.
References mem_attrs::alias, and mem_attrs::expr.
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Return an indication of which type of insn should have X as a body. The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN.
References copy_insn_1().
| void clear_mem_offset | ( | ) |
Clear the offset of MEM.
| void clear_mem_size | ( | ) |
Clear the size of MEM.
| rtx const_double_from_real_value | ( | ) |
Return a CONST_DOUBLE rtx for a floating-point value specified by VALUE in mode MODE.
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Returns nonzero if the value represented by X (really a ...) is the same as that represented by Y (really a ...)
References fixed_hash().
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Returns a hash code for X (which is really a CONST_DOUBLE).
MODE is used in the comparison, so it should be in the hash.
| rtx const_fixed_from_fixed_value | ( | ) |
Return a CONST_FIXED rtx for a fixed-point value specified by VALUE in mode MODE.
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Returns nonzero if the value represented by X (really a ...) is the same as that represented by Y (really a ...).
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Returns a hash code for X (which is really a CONST_FIXED).
MODE is used in the comparison, so it should be in the hash.
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Returns nonzero if the value represented by X (which is really a CONST_INT) is the same as that given by Y (which is really a HOST_WIDE_INT *).
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Returns a hash code for X (which is a really a CONST_INT).
| rtx copy_delay_slot_insn | ( | ) |
Return a copy of INSN that can be used in a SEQUENCE delay slot, on that assumption that INSN itself remains in its original place.
Copy INSN with its rtx_code, all its notes, location etc.
| rtx copy_insn | ( | ) |
Create a new copy of an rtx. This function differs from copy_rtx in that it handles SCRATCHes and ASM_OPERANDs properly. INSN doesn't really have to be a full INSN; it could be just the pattern.
Referenced by gen_const_vector(), and reg_killed_on_edge().
| rtx copy_insn_1 | ( | ) |
Recursively create a new copy of an rtx for copy_insn. This function differs from copy_rtx in that it handles SCRATCHes and ASM_OPERANDs properly. Normally, this function is not used directly; use copy_insn as front end. However, you could first copy an insn pattern with copy_insn and then use this function afterwards to properly copy any REG_NOTEs containing SCRATCHes.
Share clobbers of hard registers (like cc0), but do not share pseudo reg
clobbers or clobbers of hard registers that originated as pseudos.
This is needed to allow safe register renaming. A MEM with a constant address is not sharable. The problem is that
the constant address may need to be reloaded. If the mem is shared,
then reloading one copy of this mem will cause all copies to appear
to have been reloaded. Copy the various flags, fields, and other information. We assume
that all fields need copying, and then clear the fields that should
not be copied. That is the sensible default behavior, and forces
us to explicitly document why we are *not* copying a flag. We do not copy the USED flag, which is used as a mark bit during
walks over the RTL. We do not copy JUMP, CALL, or FRAME_RELATED for INSNs.
These are left unchanged.
Referenced by classify_insn().
| rtx copy_rtx_if_shared | ( | ) |
Mark ORIG as in use, and return a copy of it if it was already in use. Recursively does the same for subexpressions. Uses copy_rtx_if_shared_1 to reduce stack space.
References mark_used_flags().
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Referenced by reset_insn_used_flags().
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Mark *ORIG1 as in use, and set it to a copy of it if it was already in use. Recursively does the same for subexpressions.
Repeat is used to turn tail-recursion into iteration.
These types may be freely shared.
SCRATCH must be shared because they represent distinct values.
Share clobbers of hard registers (like cc0), but do not share pseudo reg
clobbers or clobbers of hard registers that originated as pseudos.
This is needed to allow safe register renaming. The chain of insns is not being copied.
This rtx may not be shared. If it has already been seen,
replace it with a copy of itself. Now scan the subexpressions recursively.
We can store any replaced subexpressions directly into X
since we know X is not shared! Any vectors in X
must be copied if X was copied. Copy the vector iff I copied the rtx and the length
is nonzero. Call recursively on all inside the vector.
References emit_move_insn(), gen_reg_rtx(), and reg_mentioned_p().
| location_t curr_insn_location | ( | void | ) |
Get current location.
Referenced by find_auto_inc(), and mark_label_nuses().
| void delete_insns_since | ( | ) |
Delete all insns made since FROM. FROM becomes the new last instruction.
References emit_pattern_after_noloc(), and make_insn_raw().
Referenced by emit_block_move_libcall_fn(), emit_block_move_via_loop(), emit_cstore(), expand_binop_directly(), expand_doubleword_clz(), get_atomic_op_for_code(), and supportable_convert_operation().
| rtx emit | ( | ) |
Emit the rtl pattern X as an appropriate kind of insn. If X is a label, it is simply added into the insn chain.
| rtx emit_barrier | ( | void | ) |
Make an insn of code BARRIER and add it to the end of the doubly-linked list.
Referenced by emit_debug_insn(), expand_float(), and std_expand_builtin_va_start().
| rtx emit_barrier_after | ( | ) |
Make an insn of code BARRIER and output it after the insn AFTER.
References add_insn().
Referenced by cond_exec_find_if_block(), and outof_cfg_layout_mode().
| rtx emit_barrier_before | ( | ) |
Make an insn of code BARRIER and output it before the insn BEFORE.
| rtx emit_call_insn | ( | ) |
Make an insn of code CALL_INSN with pattern X and add it to the end of the doubly-linked list.
Referenced by emit_debug_insn().
| rtx emit_call_insn_after | ( | ) |
Like emit_call_insn_after_noloc, but set INSN_LOCATION according to AFTER.
Referenced by gen_const_vector().
| rtx emit_call_insn_after_noloc | ( | ) |
Make an instruction with body X and code CALL_INSN and output it after the instruction AFTER.
References emit_pattern_before(), and make_debug_insn_raw().
| rtx emit_call_insn_after_setloc | ( | ) |
Like emit_call_insn_after_noloc, but set INSN_LOCATION according to LOC.
References add_insn(), and table.
| rtx emit_call_insn_before | ( | ) |
Like emit_call_insn_before_noloc, but set insn_location according to BEFORE.
| rtx emit_call_insn_before_noloc | ( | ) |
Make an instruction with body X and code CALL_INSN and output it before the instruction BEFORE.
References emit_pattern_after_setloc(), and make_jump_insn_raw().
| rtx emit_call_insn_before_setloc | ( | ) |
Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.
References df_notes_rescan().
| rtx emit_clobber | ( | ) |
Emit a clobber of lvalue X.
CONCATs should not appear in the insn stream.
References copy().
Referenced by count_type_elements().
| rtx emit_copy_of_insn_after | ( | ) |
Produce exact duplicate of insn INSN after AFTER. Care updating of libcall regions if present.
Update LABEL_NUSES.
If the old insn is frame related, then so is the new one. This is
primarily needed for IA-64 unwind info which marks epilogue insns,
which may be duplicated by the basic block reordering code. Copy all REG_NOTES except REG_LABEL_OPERAND since mark_jump_label
will make them. REG_LABEL_TARGETs are created there too, but are
supposed to be sticky, so we copy them.
Referenced by delete_computation().
| rtx emit_debug_insn | ( | ) |
Make an insn of code DEBUG_INSN with pattern X and add it to the end of the doubly-linked list.
References any_uncondjump_p(), emit_barrier(), emit_call_insn(), emit_insn(), emit_jump_insn(), and emit_label().
Referenced by avoid_complex_debug_insns().
| rtx emit_debug_insn_after | ( | ) |
Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to AFTER.
References add_insn(), and make_note_raw().
Referenced by gen_const_vector().
| rtx emit_debug_insn_after_noloc | ( | ) |
Make an instruction with body X and code CALL_INSN and output it after the instruction AFTER.
References get_last_insn(), and last.
| rtx emit_debug_insn_after_setloc | ( | ) |
Like emit_debug_insn_after_noloc, but set INSN_LOCATION according to LOC.
| rtx emit_debug_insn_before | ( | ) |
Like emit_debug_insn_before_noloc, but set insn_location according to BEFORE.
| rtx emit_debug_insn_before_noloc | ( | ) |
Make an instruction with body X and code DEBUG_INSN and output it before the instruction BEFORE.
References emit_pattern_after_setloc(), and make_call_insn_raw().
| rtx emit_debug_insn_before_setloc | ( | ) |
Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.
| rtx emit_insn | ( | ) |
Take X and emit it at the end of the doubly-linked INSN list. Returns the last insn emitted.
Referenced by do_output_reload(), emit_block_move_libcall_fn(), emit_block_move_via_loop(), emit_debug_insn(), emit_pattern_after(), expand_atomic_load(), expand_builtin_memset_args(), expand_builtin_sincos(), expand_ffs(), get_def_for_expr(), gmalloc(), maybe_emit_atomic_exchange(), maybe_emit_sync_lock_test_and_set(), move_insn_for_shrink_wrap(), n_occurrences(), noce_emit_store_flag(), noce_try_cmove_arith(), and undo_transformations().
| rtx emit_insn_after | ( | ) |
Like emit_insn_after_noloc, but set INSN_LOCATION according to AFTER.
Referenced by find_invariants_to_move(), gen_const_vector(), insert_insn_end_basic_block(), and split_iv().
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Helper for emit_insn_after, handles lists of instructions efficiently.
| rtx emit_insn_after_noloc | ( | ) |
Make X be output after the insn AFTER and set the BB of insn. If BB is NULL, an attempt is made to infer the BB from AFTER.
References emit_pattern_before(), and make_call_insn_raw().
Referenced by cfg_layout_redirect_edge_and_branch().
| rtx emit_insn_after_setloc | ( | ) |
Like emit_insn_after_noloc, but set INSN_LOCATION according to LOC.
| rtx emit_insn_before | ( | ) |
Like emit_insn_before_noloc, but set INSN_LOCATION according to BEFORE.
Referenced by insert_insn_end_basic_block(), result_vector(), and subst_all_stack_regs_in_debug_insn().
| rtx emit_insn_before_noloc | ( | ) |
Make X be output before the instruction BEFORE.
| rtx emit_insn_before_setloc | ( | ) |
Like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.
References emit_use(), end_sequence(), get_insns(), and start_sequence().
Referenced by cond_exec_find_if_block(), and noce_try_addcc().
| rtx emit_jump_insn | ( | ) |
Make an insn of code JUMP_INSN with pattern X and add it to the end of the doubly-linked list.
Referenced by emit_debug_insn(), expand_atomic_fetch_op_no_fallback(), and expand_float().
| rtx emit_jump_insn_after | ( | ) |
Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to AFTER.
Referenced by cond_exec_find_if_block(), gen_const_vector(), and sched_extend_ready_list().
| rtx emit_jump_insn_after_noloc | ( | ) |
Make an insn of code JUMP_INSN with body X and output it after the insn AFTER.
References emit_pattern_before_setloc(), and make_debug_insn_raw().
| rtx emit_jump_insn_after_setloc | ( | ) |
Like emit_jump_insn_after_noloc, but set INSN_LOCATION according to LOC.
| rtx emit_jump_insn_before | ( | ) |
Like emit_jump_insn_before_noloc, but set INSN_LOCATION according to BEFORE.
| rtx emit_jump_insn_before_noloc | ( | ) |
Make an instruction with body X and code JUMP_INSN and output it before the instruction BEFORE.
References emit_pattern_after(), and make_insn_raw().
| rtx emit_jump_insn_before_setloc | ( | ) |
like emit_insn_before_noloc, but set INSN_LOCATION according to LOC.
| rtx emit_jump_table_data | ( | ) |
Make an insn of code JUMP_TABLE_DATA and add it to the end of the doubly-linked list.
| rtx emit_label | ( | ) |
Add the label LABEL to the end of the doubly-linked list.
References sequence_stack::first, sequence_stack::last, sequence_stack::next, set_first_insn(), and set_last_insn().
Referenced by do_jump_by_parts_zero_rtx(), emit_debug_insn(), expand_computed_goto(), expand_float(), and mathfn_built_in_1().
| rtx emit_label_after | ( | ) |
Emit the label LABEL after the insn AFTER.
Referenced by update_block().
| rtx emit_label_before | ( | ) |
Emit the label LABEL before the insn BEFORE.
| rtx emit_note | ( | ) |
Make an insn of code NOTE or type NOTE_NO and add it to the end of the doubly-linked list.
Referenced by convert_regs_entry(), and move_insn_for_shrink_wrap().
| rtx emit_note_after | ( | ) |
Emit a note of subtype SUBTYPE after the insn AFTER.
Referenced by collect_one_action_chain(), and new_cfi_row().
| rtx emit_note_before | ( | ) |
Emit a note of subtype SUBTYPE before the insn BEFORE.
Referenced by add_debug_prefix_map(), collect_one_action_chain(), create_pre_exit(), and fix_crossing_unconditional_branches().
| rtx emit_note_copy | ( | ) |
Emit a copy of note ORIG.
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Insert PATTERN after AFTER. MAKE_RAW indicates how to turn PATTERN into a real insn. SKIP_DEBUG_INSNS indicates whether to insert after any DEBUG_INSNs.
References emit_insn().
Referenced by emit_jump_insn_before_noloc().
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Referenced by delete_insns_since().
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Insert PATTERN after AFTER, setting its INSN_LOCATION to LOC. MAKE_RAW indicates how to turn PATTERN into a real insn.
References add_insn(), and sequence_stack::next.
Referenced by emit_call_insn_before_noloc(), and emit_debug_insn_before_noloc().
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Insert PATTERN before BEFORE. MAKE_RAW indicates how to turn PATTERN into a real insn. SKIP_DEBUG_INSNS indicates whether to insert before any DEBUG_INSNs. INSNP indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN, CALL_INSN, etc.
Referenced by emit_call_insn_after_noloc(), and emit_insn_after_noloc().
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Emit insn(s) of given code and pattern
at a specified place within the doubly-linked list.
All of the emit_foo global entry points accept an object
X which is either an insn list or a PATTERN of a single
instruction.
There are thus a few canonical ways to generate code and
emit it at a specific place in the instruction stream. For
example, consider the instruction named SPOT and the fact that
we would like to emit some instructions before SPOT. We might
do it like this:
start_sequence ();
... emit the new instructions ...
insns_head = get_insns ();
end_sequence ();
emit_insn_before (insns_head, SPOT);
It used to be common to generate SEQUENCE rtl instead, but that
is a relic of the past which no longer occurs. The reason is that
SEQUENCE rtl results in much fragmented RTL memory since the SEQUENCE
generated would almost certainly die right after it was created.
Referenced by set_insn_deleted().
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Insert PATTERN before BEFORE, setting its INSN_LOCATION to LOC. MAKE_RAW indicates how to turn PATTERN into a real insn. INSNP indicates if PATTERN is meant for an INSN as opposed to a JUMP_INSN, CALL_INSN, etc.
References add_insn(), and make_note_raw().
Referenced by emit_jump_insn_after_noloc().
| rtx emit_use | ( | ) |
Emit a use of rvalue X.
CONCATs should not appear in the insn stream.
Referenced by emit_insn_before_setloc(), and move_insn_for_shrink_wrap().
| void end_sequence | ( | void | ) |
After emitting to a sequence, restore previous saved state. To get the contents of the sequence just made, you must call `get_insns' *before* calling here. If the compiler might have deferred popping arguments while generating this sequence, and this sequence will not be immediately inserted into the instruction stream, use do_pending_stack_adjust before calling get_insns. That will ensure that the deferred pops are inserted into this sequence, and not into some random location in the instruction stream. See INHIBIT_DEFER_POP for more information about deferred popping of arguments.
Referenced by add_test(), convert_regs_entry(), emit_insn_before_setloc(), expand_atomic_load(), expand_builtin_sincos(), expand_ffs(), gmalloc(), init_set_costs(), move_insn_for_shrink_wrap(), noce_emit_store_flag(), noce_try_abs(), noce_try_addcc(), record_insns(), result_vector(), sjlj_assign_call_site_values(), split_iv(), and undo_transformations().
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Find a RTX_AUTOINC class rtx which matches DATA.
References curr_insn_location(), debug_rtx(), returnjump_p(), SET, and warning().
| rtx gen_blockage | ( | void | ) |
Generate an empty ASM_INPUT, which is used to block attempts to schedule, and to block register equivalences to be seen across this insn.
Referenced by move_insn_for_shrink_wrap().
| rtx gen_clobber | ( | ) |
Return a sequence of insns to clobber lvalue X.
| rtx gen_const_mem | ( | ) |
Generate a memory referring to non-trapping constant memory.
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Generate a vector constant for mode MODE and constant value CONSTANT.
We need to call this function after we set the scalar const_tiny_rtx
entries.
References copy_insn(), emit_call_insn_after(), emit_debug_insn_after(), emit_insn_after(), and emit_jump_insn_after().
| rtx gen_frame_mem | ( | ) |
Generate a MEM referring to fixed portions of the frame, e.g., register save areas.
Referenced by expand_builtin_return_addr().
| rtx gen_hard_reg_clobber | ( | ) |
| rtx gen_highpart | ( | ) |
This case loses if X is a subreg. To catch bugs early,
complain if an invalid MODE is used even in other cases. simplify_gen_subreg is not guaranteed to return a valid operand for
the target if we have a MEM. gen_highpart must return a valid operand,
emitting code if necessary to do so.
Referenced by gen_lowpart_common().
| rtx gen_highpart_mode | ( | ) |
Like gen_highpart, but accept mode of EXP operand in case EXP can be VOIDmode constant.
| rtx gen_int_mode | ( | ) |
Referenced by combine_set_extension(), convert_modes(), determine_common_wider_type(), emit_cstore(), expand_expr_real_1(), expand_float(), expand_widening_mult(), extract_high_half(), find_shift_sequence(), make_extraction(), mathfn_built_in_1(), move2add_use_add3_insn(), move2add_valid_value_p(), noce_try_sign_mask(), noce_try_store_flag_constants(), push_block(), rtx_to_double_int(), sjlj_assign_call_site_values(), split_edge_and_insert(), and undo_commit().
| rtx gen_label_rtx | ( | void | ) |
Return a newly created CODE_LABEL rtx with a unique label number.
References len, SET, and verify_rtx_sharing().
Referenced by do_jump_by_parts_zero_rtx(), expand_float(), have_sub2_insn(), set_stack_check_libfunc(), and update_block().
| rtx gen_lowpart_common | ( | ) |
Return a value representing some low-order bits of X, where the number of low-order bits is given by MODE. Note that no conversion is done between floating-point and fixed-point values, rather, the bit representation is returned. This function handles the cases in common between gen_lowpart, below, and two variants in cse.c and combine.c. These are the cases that can be safely handled at all points in the compilation. If this is not a case we can handle, return 0.
Unfortunately, this routine doesn't take a parameter for the mode of X,
so we have to make one up. Yuk. MODE must occupy no more words than the mode of X.
Don't allow generating paradoxical FLOAT_MODE subregs.
If we are getting the low-order part of something that has been
sign- or zero-extended, we can either just use the object being
extended or make a narrower extension. If we want an even smaller
piece than the size of the object being extended, call ourselves
recursively.
This case is used mostly by combine and cse. Otherwise, we can't do this.
References gen_highpart().
Referenced by reg_truncated_to_mode_general().
| rtx gen_lowpart_SUBREG | ( | ) |
Generate a SUBREG representing the least-significant part of REG if MODE is smaller than mode of REG, otherwise paradoxical SUBREG.
References subreg_lowpart_offset().
Referenced by compute_argument_block_size(), and reg_class_from_constraints().
| rtx gen_raw_REG | ( | ) |
Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and don't attempt to share with the various global pieces of rtl (such as frame_pointer_rtx).
Referenced by determine_common_wider_type(), and seq_cost().
| rtx gen_reg_rtx | ( | ) |
Generate a REG rtx for a new pseudo register of mode MODE. This pseudo is assigned the next sequential register number.
If a virtual register with bigger mode alignment is generated,
increase stack alignment estimation because it might be spilled
to stack later. For complex modes, don't make a single pseudo.
Instead, make a CONCAT of two pseudos.
This allows noncontiguous allocation of the real and imaginary parts,
which makes much better code. Besides, allocating DCmode
pseudos overstrains reload on some machines like the 386. Make sure regno_pointer_align, and regno_reg_rtx are large
enough to have an element for this pseudo reg number.
Referenced by allocate_struct_function(), assign_parm_remove_parallels(), can_decompose_p(), copy_rtx_if_shared_1(), elim_forward(), entry_register(), expand_abs(), expand_atomic_compare_and_swap(), expand_builtin_memset_args(), expand_builtin_sincos(), expand_doubleword_clz(), expand_mult_highpart_adjust(), gen_group_rtx(), get_inner_reference(), get_ivts_expr(), have_sub2_insn(), mem_overlaps_already_clobbered_arg_p(), move_block_to_reg(), noce_try_addcc(), noce_try_cmove_arith(), push_cfun(), restore_fixed_argument_area(), split_edge_and_insert(), supportable_convert_operation(), and undo_transformations().
| rtx gen_reg_rtx_and_attrs | ( | ) |
Generate a REG rtx for a new pseudo register, copying the mode and attributes from X.
Referenced by find_invariants_to_move().
| rtx gen_reg_rtx_offset | ( | ) |
Generate a new pseudo-register with the same attributes as REG, but with OFFSET added to the REG_OFFSET.
References set_reg_attrs_from_value().
| rtvec gen_rtvec | ( | ) |
Create an rtvec and stores within it the RTXen passed in the arguments.
Don't allocate an empty rtvec...
Referenced by maybe_emit_atomic_exchange().
| rtvec gen_rtvec_v | ( | ) |
Don't allocate an empty rtvec...
| rtx gen_rtx_CONST_INT | ( | ) |
There are some RTL codes that require special attention; the generation functions do the raw handling. If you add to this list, modify special_rtx in gengenrtl.c as well.
Look up the CONST_INT in the hash table.
| rtx gen_rtx_CONST_VECTOR | ( | ) |
Generate a vector like gen_rtx_raw_CONST_VEC, but use the zero vector when all elements are zero, and the one vector when all elements are one.
Check to see if all of the elements have the same value.
If the values are all the same, check to see if we can use one of the
standard constant vectors.
| rtx gen_rtx_MEM | ( | ) |
This field is not cleared by the mere allocation of the rtx, so
we clear it here.
Referenced by assign_parm_adjust_stack_rtl(), convert_debug_memory_address(), expand_builtin_prefetch(), initialize_argument_information(), mathfn_built_in_1(), maybe_emit_atomic_exchange(), save_fixed_argument_area(), sched_analyze_2(), seq_cost(), set_mem_alias_set(), and set_storage_via_setmem().
| rtx gen_rtx_REG | ( | ) |
In case the MD file explicitly references the frame pointer, have
all such references point to the same frame pointer. This is
used during frame pointer elimination to distinguish the explicit
references to these registers from pseudos that happened to be
assigned to them.
If we have eliminated the frame pointer or arg pointer, we will
be using it as a normal register, for example as a spill
register. In such cases, we might be accessing it in a mode that
is not Pmode and therefore cannot use the pre-allocated rtx.
Also don't do this when we are making new REGs in reload, since
we don't want to get confused with the real pointers. If the per-function register table has been set up, try to re-use
an existing entry in that table to avoid useless generation of RTL.
This code is disabled for now until we can fix the various backends
which depend on having non-shared hard registers in some cases. Long
term we want to re-enable this code as it can significantly cut down
on the amount of useless RTL that gets generated.
We'll also need to fix some code that runs after reload that wants to
set ORIGINAL_REGNO.
Referenced by apply_args_size(), assign_parm_adjust_entry_rtl(), choose_best_reg_1(), delete_trivially_dead_insns(), emit_block_move_libcall_fn(), emit_block_move_via_loop(), find_dummy_reload(), gmalloc(), inherit_piecemeal_p(), insert_restore(), insn_live_p(), ira_init_once(), mark_unavailable_hard_regs(), maybe_select_cc_mode(), mem_overlaps_already_clobbered_arg_p(), reload_combine_recognize_pattern(), replace_reg_with_saved_mem(), and update_eliminable_offsets().
Generate a register with same attributes as REG, but with OFFSET added to the REG_OFFSET.
| rtx gen_rtx_SUBREG | ( | ) |
Referenced by extract_split_bit_field(), and reg_class_from_constraints().
| rtx gen_tmp_stack_mem | ( | ) |
Generate a MEM referring to a temporary use of the stack, not part
of the fixed stack frame. For example, something which is pushed
by a target splitter.
References lra_in_progress.
| rtx gen_use | ( | ) |
Return a sequence of insns to use rvalue X.
Referenced by cfg_layout_can_merge_blocks_p().
| int get_first_label_num | ( | void | ) |
Return first label number used in this function (if any were used).
| rtx get_first_nonnote_insn | ( | void | ) |
Return the first nonnote insn emitted in current sequence or current function. This routine looks inside SEQUENCEs.
| rtx get_last_insn_anywhere | ( | void | ) |
Emission of insns (adding them to the doubly-linked list).
Return the last insn emitted, even if it is in a sequence now pushed.
| rtx get_last_nonnote_insn | ( | void | ) |
Return the last nonnote insn emitted in current sequence or current function. This routine looks inside SEQUENCEs.
| int get_max_insn_count | ( | void | ) |
Return the number of actual (non-debug) insns emitted in this function.
The table size must be stable across -g, to avoid codegen
differences due to debug insns, and not be affected by
-fmin-insn-uid, to avoid excessive table size and to simplify
debugging of -fcompare-debug failures.
Referenced by canon_list_insert(), and compute_hash_table_work().
| int get_mem_align_offset | ( | ) |
Return OFFSET if XEXP (MEM, 0) - OFFSET is known to be ALIGN bits aligned for 0 <= OFFSET < ALIGN / BITS_PER_UNIT, or -1 if not known.
This function can't use
if (!MEM_EXPR (mem) || !MEM_OFFSET_KNOWN_P (mem)
|| (MAX (MEM_ALIGN (mem),
MAX (align, get_object_alignment (MEM_EXPR (mem))))
< align))
return -1;
else
return (- MEM_OFFSET (mem)) & (align / BITS_PER_UNIT - 1);
for two reasons:
- COMPONENT_REFs in MEM_EXPR can have NULL first operand,
for <variable>. get_inner_reference doesn't handle it and
even if it did, the alignment in that case needs to be determined
from DECL_FIELD_CONTEXT's TYPE_ALIGN.
- it would do suboptimal job for COMPONENT_REFs, even if MEM_EXPR
isn't sufficiently aligned, the object it is in might be.
Referenced by set_reg_attrs_from_value().
|
static |
Allocate a new reg_attrs structure and insert it into the hash table if one identical to it is not already in the table. We are doing this for MEM of mode MODE.
If everything is the default, we can just return zero.
| tree get_spill_slot_decl | ( | ) |
| rtx immed_double_const | ( | ) |
Return a CONST_DOUBLE or CONST_INT for a value specified as a pair of ints: I0 is the low-order word and I1 is the high-order word. For values that are larger than HOST_BITS_PER_DOUBLE_INT, the implied upper bits are copies of the high bit of i1. The value itself is neither signed nor unsigned. Do not use this routine for non-integer modes; convert to REAL_VALUE_TYPE and use CONST_DOUBLE_FROM_REAL_VALUE.
There are the following cases (note that there are no modes with
HOST_BITS_PER_WIDE_INT < GET_MODE_BITSIZE (mode) < HOST_BITS_PER_DOUBLE_INT):
1) If GET_MODE_BITSIZE (mode) <= HOST_BITS_PER_WIDE_INT, then we use
gen_int_mode.
2) If the value of the integer fits into HOST_WIDE_INT anyway
(i.e., i1 consists only from copies of the sign bit, and sign
of i0 and i1 are the same), then we return a CONST_INT for i0.
3) Otherwise, we create a CONST_DOUBLE for i0 and i1. We can get a 0 for an error mark.
If this integer fits in one word, return a CONST_INT.
We use VOIDmode for integers.
Referenced by expand_subword_shift(), and expand_superword_shift().
| rtx immed_double_int_const | ( | ) |
Return a CONST_DOUBLE or CONST_INT for a value specified as a double_int.
Referenced by expand_ffs().
| int in_sequence_p | ( | void | ) |
Return 1 if currently emitting into a sequence.
References mem_attrs::align, mem_attrs::size, and mem_attrs::size_known_p.
| void init_emit | ( | void | ) |
Initialize data structures and variables in this file before generating rtl for each function.
Init the tables that describe all the pseudo regs.
Put copies of all the hard registers into regno_reg_rtx.
Put copies of all the virtual register rtx into regno_reg_rtx.
Indicate that the virtual registers and stack locations are
all pointers.
Referenced by blocks_nreverse().
| void init_emit_once | ( | void | ) |
Create some permanent unique rtl objects shared between all functions.
Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
hash tables. Compute the word and byte modes.
This is to initialize {init|mark|free}_machine_status before the first
call to push_function_context_to. This is needed by the Chill front
end which calls push_function_context_to before the first call to
init_function_start. Create the unique rtx's for certain rtx codes and operand values.
Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
tries to use these variables. We store the value 1.
We store the value 1.
References MEMMODEL_ACQ_REL, MEMMODEL_ACQUIRE, MEMMODEL_CONSUME, MEMMODEL_RELAXED, MEMMODEL_RELEASE, and MEMMODEL_SEQ_CST.
| void init_emit_regs | ( | void | ) |
Initialise global register information required by all functions.
Reset register attributes
We need reg_raw_mode, so initialize the modes now.
Assign register numbers to the globally defined register rtx.
Initialize RTL for commonly used hard registers. These are
copied into regno_reg_rtx as we begin to compile each function.
|
static |
Put the various virtual registers into REGNO_REG_RTX.
| const char* insn_file | ( | ) |
Return source file of the statement that produced this insn.
| int insn_line | ( | ) |
Return line number of the statement that produced this insn.
| void insn_locations_finalize | ( | void | ) |
At the end of emit stage, clear current location.
| void insn_locations_init | ( | void | ) |
Allocate insn location datastructure.
| tree insn_scope | ( | ) |
Return lexical scope block insn belongs to.
| rtx last_call_insn | ( | void | ) |
Return the last CALL_INSN in the current list, or 0 if there is none. This routine does not look inside SEQUENCEs.
|
inlinestatic |
Add INSN to the end of the doubly-linked list, between PREV and NEXT. INSN may be any object that can appear in the chain: INSN_P and NOTE_P objects, but also BARRIERs and JUMP_TABLE_DATAs. PREV and NEXT may be NULL.
References set_first_insn(), and set_last_insn().
|
static |
CONST_DOUBLEs might be created from pairs of integers, or from REAL_VALUE_TYPEs. Also, their length is known only at run time, so we cannot use gen_rtx_raw_CONST_DOUBLE.
Determine whether REAL, a CONST_DOUBLE, already exists in the hash table. If so, return its counterpart; otherwise add it to the hash table and return it.
|
static |
Determine whether FIXED, a CONST_FIXED, already exists in the hash table. If so, return its counterpart; otherwise add it to the hash table and return it.
|
static |
Like `make_insn_raw' but make a CALL_INSN instead of an insn.
Referenced by emit_debug_insn_before_noloc(), emit_insn_after_noloc(), and set_insn_deleted().
|
static |
Like `make_insn_raw' but make a DEBUG_INSN instead of an insn.
Referenced by emit_call_insn_after_noloc(), and emit_jump_insn_after_noloc().
| rtx make_insn_raw | ( | ) |
Make and return an INSN rtx, initializing all its slots. Store PATTERN in the pattern slots.
Referenced by check_asm_operands(), delete_insns_since(), and emit_jump_insn_before_noloc().
|
static |
Like `make_insn_raw' but make a JUMP_INSN instead of an insn.
Referenced by emit_call_insn_before_noloc().
|
static |
Like `make_insn_raw' but make a NOTE instead of an insn.
Some notes are never created this way at all. These notes are
only created by patching out insns.
Referenced by emit_debug_insn_after(), and emit_pattern_before_setloc().
| rtx make_safe_from | ( | ) |
Copy X if necessary so that it won't be altered by changes in OTHER. Return X or the rtx for the pseudo reg the value of X was copied into. OTHER must be valid as a SET_DEST.
|
static |
Referenced by next_cc0_user(), and prev_nonnote_insn_bb().
|
static |
Increment the label uses for all labels present in rtx.
References curr_insn_location().
| void mark_reg_pointer | ( | ) |
Identify REG as a probable pointer register and show its alignment as ALIGN, if nonzero.
We can no-longer be sure just how aligned this pointer is.
Referenced by allocate_struct_function(), and elim_forward().
|
static |
Set the USED bit in X and its non-shareable subparts to FLAG.
Repeat is used to turn tail-recursion into iteration.
These types may be freely shared so we needn't do any resetting
for them. The chain of insns is not being copied.
Referenced by copy_rtx_if_shared().
| void mark_user_reg | ( | ) |
Identify REG (which may be a CONCAT) as a user register.
Referenced by assign_parm_remove_parallels().
| int max_label_num | ( | void | ) |
Return 1 + the largest label number used so far in the current function.
Referenced by update_alignments().
| int max_reg_num | ( | void | ) |
Return 1 plus largest pseudo reg number used in the current function.
Referenced by calculate_allocation_cost(), coalescable_pseudo_p(), coalesced_pseudo_reg_slot_compare(), df_scan_add_problem(), emit_add2_insn(), cost_classes_hasher::equal(), finish_live_range_start_chains(), lra_debug_live_range_list(), mark_reg_death(), print_redundant_copies(), setup_allocno_class_and_costs(), split_live_ranges_for_shrink_wrap(), undo_transformations(), and update_lives().
| void maybe_set_first_label_num | ( | ) |
If the rtx for label was created during the expansion of a nested function, then first_label_num won't include this label number. Fix this now so that array indices work later.
References validize_mem().
|
static |
Return true if the given memory attributes are equal.
Referenced by set_mem_alias_set().
|
static |
|
static |
Returns nonzero if the value represented by X (which is really a mem_attrs *) is the same as that given by Y (which is also really a mem_attrs *).
|
static |
|
static |
Returns a hash code for X (which is a really a mem_attrs *).
| int mem_expr_equal_p | ( | ) |
Returns 1 if both MEM_EXPR can be considered equal and 0 otherwise.
| bool need_atomic_barrier_p | ( | ) |
Return true if memory model MODEL requires a pre-operation (release-style) barrier or a post-operation (acquire-style) barrier. While not universal, this function matches behavior of several targets.
| rtx next_active_insn | ( | ) |
References add_reg_note().
Referenced by delete_prior_computation(), note_delay_statistics(), peep2_regno_dead_p(), replace_rtx(), and set_nonzero_bits_and_sign_copies().
| rtx next_cc0_user | ( | ) |
Return the next insn that uses CC0 after INSN, which is assumed to set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter applied to the result of this function should yield INSN). Normally, this is simply the next insn. However, if a REG_CC_USER note is present, it contains the insn that uses CC0. Return 0 if we can't find the insn.
References mark_label_nuses().
Referenced by validate_replace_src_1().
| rtx next_insn | ( | ) |
Return the next insn. If it is a SEQUENCE, return the first insn of the sequence.
References active_insn_p().
| rtx next_nondebug_insn | ( | ) |
Return the next insn after INSN that is not a DEBUG_INSN. This routine does not look inside SEQUENCEs.
| rtx next_nonnote_insn | ( | ) |
Return the next insn after INSN that is not a NOTE. This routine does not look inside SEQUENCEs.
Referenced by make_pass_compute_alignments(), previous_insn(), reemit_notes(), and subreg_offset_representable_p().
| rtx next_nonnote_insn_bb | ( | ) |
Return the next insn after INSN that is not a NOTE, but stop the search before we enter another basic block. This routine does not look inside SEQUENCEs.
Referenced by rtl_dump_bb().
| rtx next_nonnote_nondebug_insn | ( | ) |
Return the next insn after INSN that is not a NOTE nor DEBUG_INSN. This routine does not look inside SEQUENCEs.
Referenced by cse_prescan_path(), get_last_value_validate(), and move2add_use_add3_insn().
| rtx next_real_insn | ( | ) |
Return the next INSN, CALL_INSN or JUMP_INSN after INSN; or 0, if there is none. This routine does not look inside SEQUENCEs.
References add_int_reg_note(), any_condjump_p(), find_reg_note(), and mark_jump_label().
Referenced by invert_jump().
|
static |
Notes require a bit of special handling: Some notes need to have their BLOCK_FOR_INSN set, others should never have it set, and some should have it set or clear depending on the context.
Return true iff a note of kind SUBTYPE should be emitted with routines that never set BLOCK_FOR_INSN on NOTE. BB_BOUNDARY is true if the caller is asked to emit a note before BB_HEAD, or after BB_END.
NOTE_INSN_SWITCH_TEXT_SECTIONS only appears between basic blocks.
Notes for var tracking and EH region markers can appear between or
inside basic blocks. If the caller is emitting on the basic block
boundary, do not set BLOCK_FOR_INSN on the new note. Otherwise, BLOCK_FOR_INSN must be set.
References add_insn(), get_last_insn(), last, and sequence_stack::next.
| rtx offset_address | ( | ) |
Return a memory reference like MEMREF, but whose address is changed by adding OFFSET, an RTX, to it. POW2 is the highest power of two factor known to be in OFFSET (possibly 1).
At this point we don't know _why_ the address is invalid. It
could have secondary memory references, multiplies or anything.
However, if we did go and rearrange things, we can wind up not
being able to recognize the magic around pic_offset_table_rtx.
This stuff is fragile, and is yet another example of why it is
bad to expose PIC machinery too early. If there are no changes, just return the original memory reference.
Update the alignment to reflect the offset. Reset the offset, which
we don't know.
| rtx operand_subword | ( | ) |
Return subword OFFSET of operand OP. The word number, OFFSET, is interpreted as the word number starting at the low-order address. OFFSET 0 is the low-order word if not WORDS_BIG_ENDIAN, otherwise it is the high-order word. If we cannot extract the required word, we return zero. Otherwise, an rtx corresponding to the requested word will be returned. VALIDATE_ADDRESS is nonzero if the address should be validated. Before reload has completed, a valid address will always be returned. After reload, if a valid address cannot be returned, we return zero. If VALIDATE_ADDRESS is zero, we simply form the required address; validating it is the responsibility of the caller. MODE is the mode of OP in case it is a CONST_INT. ??? This is still rather broken for some cases. The problem for the moment is that all callers of this thing provide no 'goal mode' to tell us to work with. This exists because all callers were written in a word based SUBREG world. Now use of this function can be deprecated by simplify_subreg in most cases.
If OP is narrower than a word, fail.
If we want a word outside OP, return zero.
Form a new MEM at the requested address.
Rest can be handled by simplify_subreg.
Referenced by emit_block_move_via_loop(), expand_abs(), and expand_ffs().
| rtx operand_subword_force | ( | ) |
Similar to `operand_subword', but never return 0. If we can't extract the required subword, put OP into a register and try again. The second attempt must succeed. We always validate the address in this case. MODE is the mode of OP, in case it is CONST_INT.
If this is a register which can not be accessed by words, copy it
to a pseudo register.
Referenced by do_jump_by_parts_greater_rtx(), do_jump_by_parts_zero_rtx(), expand_abs(), expand_builtin_assume_aligned(), expand_ffs(), mem_overlaps_already_clobbered_arg_p(), and restore_fixed_argument_area().
| bool paradoxical_subreg_p | ( | ) |
Return true if X is a paradoxical subreg, false otherwise.
References operand_equal_p().
| void pop_topmost_sequence | ( | void | ) |
After emitting to the outer-level insn chain, update the outer-level insn chain, and restore the previous saved state.
Referenced by result_vector().
| rtx prev_active_insn | ( | ) |
Find the last insn before INSN that really does something. This routine does not look inside SEQUENCEs. After reload this also skips over standalone USE and CLOBBER insn.
Referenced by delete_prior_computation(), and merge_blocks_move_predecessor_nojumps().
| rtx prev_cc0_setter | ( | ) |
Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER note, it is the previous insn.
| rtx prev_nondebug_insn | ( | ) |
Return the previous insn before INSN that is not a DEBUG_INSN. This routine does not look inside SEQUENCEs.
References any_condjump_p(), and find_reg_note().
| rtx prev_nonnote_insn | ( | ) |
Return the previous insn before INSN that is not a NOTE. This routine does not look inside SEQUENCEs.
References rtx_equal_p().
Referenced by alter_reg(), assign_parm_setup_reg(), fill_simple_delay_slots(), rebuild_jump_labels_chain(), and update_block().
| rtx prev_nonnote_insn_bb | ( | ) |
Return the previous insn before INSN that is not a NOTE, but stop the search before we enter another basic block. This routine does not look inside SEQUENCEs.
References gdbhooks::GET_RTX_FORMAT(), gdbhooks::GET_RTX_LENGTH(), and mark_label_nuses().
| rtx prev_nonnote_nondebug_insn | ( | ) |
Return the previous insn before INSN that is not a NOTE nor DEBUG_INSN. This routine does not look inside SEQUENCEs.
References rtx_equal_p().
| rtx prev_real_insn | ( | ) |
Return the last INSN, CALL_INSN or JUMP_INSN before INSN; or 0, if there is none. This routine does not look inside SEQUENCEs.
Referenced by lra_set_insn_deleted().
| rtx previous_insn | ( | ) |
Return the previous insn. If it is a SEQUENCE, return the last insn of the sequence.
References find_reg_note(), and next_nonnote_insn().
Referenced by decls_for_scope().
| void push_to_sequence | ( | ) |
Set up the insn chain starting with FIRST as the current sequence, saving the previously current one. See the documentation for start_sequence for more information about how to use this function.
| void push_to_sequence2 | ( | ) |
Like push_to_sequence, but take the last insn as an argument to avoid looping through the list.
| void push_topmost_sequence | ( | void | ) |
Set up the outer-level insn chain as the current sequence, saving the previously current one.
Referenced by result_vector().
|
static |
|
static |
Returns nonzero if the value represented by X (which is really a reg_attrs *) is the same as that given by Y (which is also really a reg_attrs *).
References memcpy().
|
static |
|
static |
Returns a hash code for X (which is a really a reg_attrs *).
References reg_attrs::decl, reg_attrs::offset, and offset.
| bool reg_is_parm_p | ( | ) |
Return TRUE if REG is a PARM_DECL, FALSE otherwise.
| void remove_insn | ( | ) |
Unlink INSN from the insn chain. This function knows how to handle sequences. This function does not invalidate data flow information associated with INSN (i.e. does not call df_insn_delete). That makes this function usable for only disconnecting an insn from the chain, and re-emit it elsewhere later. To later insert INSN elsewhere in the insn chain via add_insn and similar functions, PREV_INSN and NEXT_INSN must be nullified by the caller. Nullifying them here breaks many insn chain walks. To really delete an insn and related DF information, use delete_insn.
Scan all pending sequences too.
Scan all pending sequences too.
Fix up basic block boundaries, if necessary.
Never ever delete the basic block note without deleting whole
basic block.
| void reorder_insns | ( | ) |
Same as function above, but take care to update BB boundaries.
Referenced by find_invariants_to_move(), and noce_can_store_speculate_p().
| void reorder_insns_nobb | ( | ) |
This function is deprecated, please use sequences instead. Move a consecutive bunch of insns to a different place in the chain. The insns to be moved are those between FROM and TO. They are moved to a new position after the insn AFTER. AFTER must not be FROM or TO or any insn in between. This function does not know about SEQUENCEs and hence should not be called after delay-slot filling has been done.
Splice this bunch out of where it is now.
Make the new neighbors point to it and it to them.
Referenced by apply_reg_moves(), delete_insn(), and merge_blocks_move_predecessor_nojumps().
| rtx replace_equiv_address | ( | ) |
Return a memory reference like MEMREF, but with its address changed to ADDR. The caller is asserting that the actual piece of memory pointed to is the same, just the form of the address is being changed, such as by putting something into a register.
change_address_1 copies the memory attribute structure without change
and that's exactly what we want here.
Referenced by get_atomic_op_for_code(), and subreg_lowpart_offset().
| rtx replace_equiv_address_nv | ( | ) |
Likewise, but the reference is not required to be valid.
Referenced by can_reload_into(), dataflow_set_destroy(), and emit_notes_for_differences_2().
|
static |
Go through all the RTL insn bodies and clear all the USED bits.
|
static |
Reset used-flags for INSN.
References copy_rtx_if_shared_1().
| void reset_used_flags | ( | ) |
Clear all the USED bits in X to allow copy_rtx_if_shared to be used to look for shared sub-parts.
| double_int rtx_to_double_int | ( | ) |
Constructs double_int from rtx CST.
References gen_int_mode(), and HOST_BITS_PER_WIDE_INT.
| void set_curr_insn_location | ( | ) |
Set current location.
Referenced by avoid_complex_debug_insns(), and insert_rtx_to_part_on_edge().
| void set_decl_incoming_rtl | ( | ) |
Assign the RTX X to parameter declaration T. BY_REFERENCE_P is true if the ABI requires the parameter to be passed by reference.
Referenced by allocate_struct_function().
| void set_decl_rtl | ( | ) |
Assign the RTX X to declaration T.
| rtx set_dst_reg_note | ( | ) |
Like set_unique_reg_note, but don't do anything unless INSN sets DST.
Referenced by allocate_struct_function(), assign_parm_setup_reg(), do_output_reload(), and expand_float().
| void set_insn_deleted | ( | ) |
Replace insn with an deleted instruction note.
References emit_pattern_before_noloc(), and make_call_insn_raw().
| void set_mem_addr_space | ( | ) |
Set the address space of MEM to ADDRSPACE (target-defined).
| void set_mem_alias_set | ( | ) |
Set the alias set of MEM to SET.
If the new and old alias sets don't conflict, something is wrong.
References gen_rtx_MEM(), get_mem_attrs(), and mem_attrs_eq_p().
Referenced by expand_builtin_prefetch().
| void set_mem_align | ( | ) |
Set the alignment of MEM to ALIGN bits.
References get_mem_attrs(), and HOST_WIDE_INT.
Referenced by save_fixed_argument_area().
| void set_mem_attributes | ( | ) |
References change_address_1(), mem_attrs::expr, get_mem_attrs(), and mem_attrs::offset_known_p.
Referenced by assign_parm_adjust_stack_rtl(), convert_debug_memory_address(), expand_builtin_prefetch(), and initialize_argument_information().
| void set_mem_attributes_minus_bitpos | ( | rtx | ref, |
| tree | t, | ||
| int | objectp, | ||
| HOST_WIDE_INT | bitpos | ||
| ) |
Given REF (a MEM) and T, either the type of X or the expression corresponding to REF, set the memory attributes. OBJECTP is nonzero if we are making a new object of this type. BITPOS is nonzero if there is an offset outstanding on T that will be applied later.
It can happen that type_for_mode was given a mode for which there
is no language-level type. In which case it returns NULL, which
we can see here. If we have already set DECL_RTL = ref, get_alias_set will get the
wrong answer, as it assumes that DECL_RTL already has the right alias
info. Callers should not set DECL_RTL until after the call to
set_mem_attributes. Get the alias set from the expression or type (perhaps using a
front-end routine) and use it. Default values from pre-existing memory attributes if present.
??? Can this ever happen? Calling this routine on a MEM that
already carries memory attributes should probably be invalid. Otherwise, default values from the mode of the MEM reference.
Respect mode size.
??? Is this really necessary? We probably should always get
the size from the type below. Respect mode alignment for STRICT_ALIGNMENT targets if T is a type;
if T is an object, always compute the object alignment below. ??? If T is a type, respecting mode alignment may *also* be wrong
e.g. if the type carries an alignment attribute. Should we be
able to simply always use TYPE_ALIGN? We can set the alignment from the type if we are making an object,
this is an INDIRECT_REF, or if TYPE_ALIGN_OK. If the size is known, we can set that.
The address-space is that of the type.
If T is not a type, we may be able to deduce some more information about
the expression. Now remove any conversions: they don't change what the underlying
object is. Likewise for SAVE_EXPR. Note whether this expression can trap.
Mark static const strings readonly as well.
Address-space information is on the base object.
If this expression uses it's parent's alias set, mark it such
that we won't change it. If this is a decl, set the attributes of the MEM from it.
??? If we end up with a constant here do record a MEM_EXPR.
If this is a field reference, record it.
If this is an array reference, look for an outer field reference.
We can't modify t, because we use it at the end of the
function. We assume all arrays have sizes that are a multiple of a byte.
First subtract the lower bound, if any, in the type of the
index, then convert to sizetype and multiply by the size of
the array element. Else do not record a MEM_EXPR.
If this is an indirect reference, record it.
Compute the alignment.
If we modified OFFSET based on T, then subtract the outstanding
bit position offset. Similarly, increase the size of the accessed
object to contain the negative offset. Now set the attributes we computed above.
|
static |
Set MEM's memory attributes so that they are the same as ATTRS.
If everything is the default, we can just clear the attributes.
References reg_attrs::decl, and reg_attrs::offset.
| void set_mem_attrs_for_spill | ( | ) |
Given MEM, a result from assign_stack_local, fill in the memory attributes as appropriate for a register allocator spill slot. These slots are not aliasable by other memory. We arrange for them all to use a single MEM_EXPR, so that the aliasing code can work properly in the case of shared spill slots.
We expect the incoming memory to be of the form:
(mem:MODE (plus (reg sfp) (const_int offset)))
with perhaps the plus missing for offset = 0.
| void set_mem_expr | ( | ) |
Set the expr for MEM to EXPR.
References targetm.
Referenced by discover_nonconstant_array_refs_r(), and emit_call_1().
| void set_mem_offset | ( | ) |
Set the offset of MEM to OFFSET.
Referenced by assign_parms_setup_varargs().
| void set_mem_size | ( | ) |
Set the size of MEM to SIZE.
Referenced by assign_parms_setup_varargs(), builtin_memset_gen_str(), and move_by_pieces_1().
| void set_new_first_and_last_insn | ( | ) |
For procedure integration.
Install new pointers to the first and last insns in the chain. Also, set cur_insn_uid to one higher than the last in use. Used for an inline-procedure after copying the insn chain.
| void set_reg_attrs_for_decl_rtl | ( | ) |
Set the REG_ATTRS for registers in value X, given that X represents decl T.
Check for a NULL entry, used to indicate that the parameter goes
both on the stack and in registers.
Referenced by dump_case_nodes().
| void set_reg_attrs_for_parm | ( | ) |
Set the register attributes for registers contained in PARM_RTX. Use needed values from memory attributes of MEM.
Check for a NULL entry in the first slot, used to indicate that the
parameter goes both on the stack and in registers.
| void set_reg_attrs_from_value | ( | ) |
Copy REG's attributes from X, if X has any attributes. If REG and X have different modes, REG is a (possibly paradoxical) lowpart of X.
Don't call mark_reg_pointer for incompatible pointer sign
extension. Hard registers can be reused for multiple purposes within the same
function, so setting REG_ATTRS, REG_POINTER and REG_POINTER_ALIGN
on them is wrong.
References byte_lowpart_offset(), get_reg_attrs(), and subreg_lowpart_p().
Referenced by gen_reg_rtx_offset().
| rtx set_unique_reg_note | ( | ) |
Place a note of KIND on insn INSN with DATUM as the datum. If a note of this type already exists, remove it first.
Don't add REG_EQUAL/REG_EQUIV notes if the insn
has multiple sets (some callers assume single_set
means the insn only has one set, when in fact it
means the insn only has one * useful * set). Don't add ASM_OPERAND REG_EQUAL/REG_EQUIV notes.
It serves no useful purpose and breaks eliminate_regs.
Referenced by assign_parm_setup_reg(), delete_jump(), delete_prior_computation(), and try_fwprop_subst().
|
static |
Referenced by verify_rtx_sharing().
|
static |
Go through all virtual stack slots of a function and mark them as shared. We never replace the DECL_RTLs themselves with a copy, but expressions mentioned into a DECL_RTL cannot be shared with expressions in the instruction stream. Note that reload may convert pseudo registers into memories in-place. Pseudo registers are always shared, but MEMs never are. Thus if we reset the used flags on MEMs in the instruction stream, we must set them again on MEMs that appear in DECL_RTLs.
Mark decls.
Now process sub-blocks.
| void set_used_flags | ( | ) |
Set all the USED bits in X to allow copy_rtx_if_shared to be used to look for shared sub-parts.
Referenced by verify_rtx_sharing().
| void start_sequence | ( | void | ) |
Begin emitting insns to a sequence. If this sequence will contain something that might cause the compiler to pop arguments to function calls (because those pops have previously been deferred; see INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust before calling this function. That will ensure that the deferred pops are not accidentally emitted in the middle of this sequence.
Referenced by convert_regs_entry(), convert_tree_comp_to_rtx(), emit_insn_before_setloc(), end_ifcvt_sequence(), expand_abs(), expand_atomic_load(), expand_builtin_sincos(), expand_ffs(), gmalloc(), init_set_costs(), move_insn_for_shrink_wrap(), noce_emit_store_flag(), noce_try_addcc(), record_insns(), result_vector(), sjlj_assign_call_site_values(), split_edge_and_insert(), split_iv(), and undo_transformations().
| unsigned int subreg_highpart_offset | ( | ) |
Return offset in bytes to get OUTERMODE high part of the value in mode INNERMODE stored in memory in target format.
| unsigned int subreg_lowpart_offset | ( | ) |
Return the SUBREG_BYTE for an OUTERMODE lowpart of an INNERMODE value.
References reload_completed, replace_equiv_address(), strict_memory_address_addr_space_p(), and word_mode.
Referenced by assign_parms_setup_varargs(), expand_debug_parm_decl(), extract_split_bit_field(), gen_lowpart_SUBREG(), and vt_stack_adjustments().
| int subreg_lowpart_p | ( | ) |
Return 1 iff X, assumed to be a SUBREG, refers to the least significant part of its containing reg. If X is not a SUBREG, always return 1 (it is its own low part!).
Referenced by check_iv_ref_table_size(), distribute_and_simplify_rtx(), make_extraction(), mark_hard_reg_live(), scompare_loc_descriptor(), set_reg_attrs_from_value(), and simplify_set().
| rtx try_split | ( | ) |
Try splitting insns that can be split for better scheduling. PAT is the pattern which might split. TRIAL is the insn providing PAT. LAST is nonzero if we should return the last insn of the sequence produced. If this routine succeeds in splitting, it returns the first or last replacement insn depending on the value of LAST. Otherwise, it returns TRIAL. If the insn to be returned can be split, it will be.
We're not good at redistributing frame information.
If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
We may need to handle this specially. Avoid infinite loop if any insn of the result matches
the original pattern. We will be adding the new sequence to the function. The splitters
may have introduced invalid RTL sharing, so unshare the sequence now. Mark labels.
We can preserve the REG_BR_PROB notes only if exactly
one jump is created, otherwise the machine description
is responsible for this step using
split_branch_probability variable. If we are splitting a CALL_INSN, look for the CALL_INSN
in SEQ and copy any additional information across. Add the old CALL_INSN_FUNCTION_USAGE to whatever the
target may have explicitly specified. If the old call was a sibling call, the new one must
be too. If the new call is the last instruction in the sequence,
it will effectively replace the old call in-situ. Otherwise
we must move any following NOTE_INSN_CALL_ARG_LOCATION note
so that it comes immediately after the new call. Copy notes, particularly those related to the CFG.
If there are LABELS inside the split insns increment the
usage count so we don't delete the label. JUMP_P insns have already been "marked" above.
Recursively call try_split for each new insn created; by the
time control returns here that insn will be fully split, so
set LAST and continue from the insn after the one returned.
We can't use next_active_insn here since AFTER may be a note.
Ignore deleted insns, which can be occur if not optimizing. Return either the first or the last insn, depending on which was
requested.
Referenced by fill_simple_delay_slots().
| unsigned int unshare_all_rtl | ( | void | ) |
|
static |
Go through all the RTL insn bodies and copy any invalid shared structure. This routine should only be called once.
Unshare just about everything else.
Make sure the addresses of stack slots found outside the insn chain
(such as, in DECL_RTL of a variable) are not shared
with the insn chain.
This special care is necessary when the stack slot MEM does not
actually appear in the insn chain. If it does appear, its address
is unshared from all else at that point.
| void unshare_all_rtl_again | ( | ) |
Go through all the RTL insn bodies and copy any invalid shared structure, again. This is a fairly expensive thing to do so it should be done sparingly.
Make sure that virtual stack slots are not shared.
Make sure that virtual parameters are not shared.
| void unshare_all_rtl_in_chain | ( | ) |
Go through all the RTL insn bodies and copy any invalid shared structure. Assumes the mark bits are cleared at entry.
|
static |
Update NEW with the same attributes as REG, but with OFFSET added to the REG_OFFSET.
| bool validate_subreg | ( | enum machine_mode | omode, |
| enum machine_mode | imode, | ||
| const_rtx | reg, | ||
| unsigned int | offset | ||
| ) |
We want to create (subreg:OMODE (obj:IMODE) OFFSET). Return true if this construct would be valid, and false otherwise.
All subregs must be aligned.
The subreg offset cannot be outside the inner object.
??? This should not be here. Temporarily continue to allow word_mode
subregs of anything. The most common offender is (subreg:SI (reg:DF)).
Generally, backends are doing something sketchy but it'll take time to
fix them all. ??? Similarly, e.g. with (subreg:DF (reg:TI)). Though store_bit_field
is the culprit here, and not the backends. Allow component subregs of complex and vector. Though given the below
extraction rules, it's not always clear what that means. ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
i.e. (subreg:V4SF (reg:SF) 0). This surely isn't the cleanest way to
represent this. It's questionable if this ought to be represented at
all -- why can't this all be hidden in post-reload splitters that make
arbitrarily mode changes to the registers themselves. Subregs involving floating point modes are not allowed to
change size. Therefore (subreg:DI (reg:DF) 0) is fine, but
(subreg:SI (reg:DF) 0) isn't. LRA can use subreg to store a floating point value in
an integer mode. Although the floating point and the
integer modes need the same number of hard registers,
the size of floating point mode can be less than the
integer mode. LRA also uses subregs for a register
should be used in different mode in on insn. Paradoxical subregs must have offset zero.
This is a normal subreg. Verify that the offset is representable.
For hard registers, we already have most of these rules collected in
subreg_offset_representable_p. For pseudo registers, we want most of the same checks. Namely:
If the register no larger than a word, the subreg must be lowpart.
If the register is larger than a word, the subreg must be the lowpart
of a subword. A subreg does *not* perform arbitrary bit extraction.
Given that we've already checked mode/offset alignment, we only have
to check subword subregs here.
References subreg_offset_representable_p().
Referenced by extract_split_bit_field(), and vt_stack_adjustments().
|
static |
Verify sharing in INSN.
| DEBUG_FUNCTION void verify_rtl_sharing | ( | void | ) |
Go through all the RTL insn bodies and check that there is no unexpected sharing in between the subexpressions.
|
static |
Check that ORIG is not marked when it should not be and mark ORIG as in use, Recursively does the same for subexpressions.
These types may be freely shared.
SCRATCH must be shared because they represent distinct values.
Share clobbers of hard registers (like cc0), but do not share pseudo reg
clobbers or clobbers of hard registers that originated as pseudos.
This is needed to allow safe register renaming. A MEM is allowed to be shared if its address is constant.
This rtx may not be shared. If it has already been seen,
replace it with a copy of itself. Now scan the subexpressions recursively.
We allow sharing of ASM_OPERANDS inside single
instruction.
References set_used_decls(), and set_used_flags().
Referenced by gen_label_rtx().
| rtx widen_memory_access | ( | ) |
Return a memory reference like MEMREF, but with its mode widened to MODE and offset by OFFSET. This would be used by targets that e.g. cannot issue QImode memory operations and have to use SImode memory operations plus masking logic.
If there are no changes, just return the original memory reference.
If we don't know what offset we were at within the expression, then
we can't know if we've overstepped the bounds. Is the field at least as large as the access? If so, ok,
otherwise strip back to the containing structure. Similarly for the decl.
The widened memory access overflows the expression, which means
that it could alias another expression. Zap it. The widened memory may alias other stuff, so zap the alias set.
??? Maybe use get_alias_set on any remaining expression.
| enum machine_mode byte_mode |
Commonly used modes.
Referenced by clear_storage_hints().
| rtx cc0_rtx |
Referenced by cse_prescan_path().
|
static |
A hash table storing all CONST_DOUBLEs.
|
static |
A hash table storing all CONST_FIXEDs.
|
static |
A hash table storing CONST_INTs whose absolute value is greater than MAX_SAVED_CONST_INT.
| rtx const_int_rtx[MAX_SAVED_CONST_INT *2+1] |
We make one copy of (const_int C) where C is in [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT] to save space during the compilation and simplify comparisons of integers.
| rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE] |
We record floating-point CONST_DOUBLEs in each floating-point mode for the values of 0, 1, and 2. For the integer entries and VOIDmode, we record a copy of const[012]_rtx and constm1_rtx. CONSTM1_RTX is set only for MODE_INT and MODE_VECTOR_INT modes.
| rtx const_true_rtx |
|
static |
|
static |
When an insn is being copied by copy_insn_1, this is nonzero if we have copied an ASM_OPERANDS. In that case, it is the copied input-operand vector.
|
static |
|
static |
Used by copy_insn_1 to avoid copying SCRATCHes more than once.
|
static |
|
static |
Hold current location information and last location information, so the datastructures are built lazily only when some instructions in given place are needed.
| REAL_VALUE_TYPE dconst0 |
**** End of software floating point emulator interface macros ****
Constant real values 0, 1, 2, -1 and 0.5.
Referenced by associate_equivalences_with_edges(), build_one_cst(), expand_builtin_expect(), fold_builtin_classify(), fold_builtin_tan(), set_value_varying(), and vect_slp_analyze_bb().
| REAL_VALUE_TYPE dconst1 |
Referenced by decimal_to_decnumber(), encode_ieee_half(), expand_complex_libcall(), fixed_zerop(), and vect_slp_analyze_bb().
| REAL_VALUE_TYPE dconst2 |
Referenced by decimal_to_decnumber(), estimate_move_cost(), and fold_builtin_sincos().
| REAL_VALUE_TYPE dconsthalf |
Referenced by decimal_to_decnumber(), encode_ieee_half(), and fold_builtin_sincos().
| REAL_VALUE_TYPE dconstm1 |
Referenced by build_string(), and decimal_to_decnumber().
| struct target_rtl default_target_rtl |
@verbatim
Emit RTL for the GCC expander. Copyright (C) 1987-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
Middle-to-low level generation of rtx code and insns. This file contains support functions for creating rtl expressions and manipulating them in the doubly-linked chain of insns. The patterns of the insns are created by machine-dependent routines in insn-emit.c, which is generated automatically from the machine description. These routines make the individual rtx's of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch], which are automatically generated from rtl.def; what is machine dependent is the kind of rtx's they make and what arguments they use.
| enum machine_mode double_mode |
| location_t epilogue_location |
| FIXED_VALUE_TYPE fconst0[MAX_FCONST0] |
Record fixed-point constant 0 and 1.
| FIXED_VALUE_TYPE fconst1[MAX_FCONST1] |
|
static |
Space for free sequence stack entries.
|
static |
|
static |
This is *not* reset after each function. It gives each CODE_LABEL in the entire compilation a unique label number.
|
static |
A hash table storing memory attribute structures.
|
static |
Likewise for the constraints vector.
|
static |
When an insn is being copied by copy_insn_1, this is nonzero if we have copied an ASM_OPERANDS. In that case, it is the original input-operand vector.
| rtx pc_rtx |
Standard pieces of rtx, to be substituted directly into things.
Referenced by add_stack_var_conflict(), alter_reg(), dwf_regno(), gen_formal_parameter_die(), get_jump_flags(), and rtx_for_function_call().
| location_t prologue_location |
Referenced by move_insn_for_shrink_wrap().
| enum machine_mode ptr_mode |
Referenced by default_asm_output_anchor(), expand_builtin_prefetch(), expand_omp_atomic_load(), and lookup_tramp_for_decl().
|
static |
A hash table storing register attribute structures.
| rtx* regno_reg_rtx |
Indexed by pseudo register number, gives the rtx for that pseudo. Allocated in parallel with regno_pointer_align. FIXME: We could put it into emit_status struct, but gengtype is not able to deal with length attribute nested in top level structures.
Referenced by assign_parm_setup_reg(), df_remove_dead_eq_notes(), find_costs_and_classes(), record_value_for_reg(), save_call_clobbered_regs(), and use_crosses_set_p().
| rtx ret_rtx |
Referenced by insn_sets_resource_p().
| rtx simple_return_rtx |
Referenced by insn_sets_resource_p().
|
static |
A fake decl that is used as the MEM_EXPR of spill slots.
| int split_branch_probability = -1 |
Probability of the conditional branch currently proceeded by try_split. Set to -1 otherwise.
| struct target_rtl* this_target_rtl = &default_target_rtl |
| enum machine_mode word_mode |
Referenced by assign_parm_adjust_entry_rtl(), default_eh_return_filter_mode(), default_libgcc_cmp_return_mode(), default_libgcc_shift_count_mode(), default_vector_alignment(), do_jump_by_parts_zero_rtx(), emit_block_move_libcall_fn(), emit_block_move_via_loop(), expand_abs(), expand_absneg_bit(), expand_builtin_assume_aligned(), expand_vector_broadcast(), find_defs(), mathfn_built_in_1(), mem_overlaps_already_clobbered_arg_p(), resolve_reg_notes(), restore_fixed_argument_area(), store_bit_field(), and subreg_lowpart_offset().
| struct rtl_data x_rtl |
Datastructures maintained for currently processed function in RTL form.
1.8.1.1