Functions
bool	just_once_each_iteration_p ()
bool	mark_irreducible_loops ()
int	num_loop_insns ()
int	average_num_loop_insns ()
gcov_type	expected_loop_iterations_unbounded ()
unsigned	expected_loop_iterations ()
unsigned	get_loop_level ()
static unsigned	seq_cost ()
void	init_set_costs ()
unsigned	estimate_reg_pressure_cost (unsigned n_new, unsigned n_old, bool speed, bool call_p)
void	mark_loop_exit_edges ()
edge	single_likely_exit ()
vec< basic_block >	get_loop_hot_path ()

Variables
struct target_cfgloop	default_target_cfgloop
struct target_cfgloop *	this_target_cfgloop = &default_target_cfgloop

Function Documentation

int average_num_loop_insns ( )

   Counts number of insns executed on average per iteration LOOP.

unsigned estimate_reg_pressure_cost	(	unsigned	n_new,
		unsigned	n_old,
		bool	speed,
		bool	call_p
	)

   Estimates cost of increased register pressure caused by making N_NEW new
   registers live around the loop.  N_OLD is the number of registers live
   around the loop.  If CALL_P is true, also take into account that
   call-used registers may be clobbered in the loop body, reducing the
   number of available registers before we spill.

     If there is a call in the loop body, the call-clobbered registers
     are not available for loop invariants.

     If we have enough registers, we should use them and not restrict
     the transformations unnecessarily.

       If we are close to running out of registers, try to preserve
       them.

       If we run out of registers, it is very expensive to add another
       one.

       IRA regional allocation deals with high register pressure
       better.  So decrease the cost (to do more accurate the cost
       calculation for IRA, we need to know how many registers lives
       through the loop transparently).

unsigned expected_loop_iterations ( )

   Returns expected number of LOOP iterations.  The returned value is bounded
   by REG_BR_PROB_BASE.

gcov_type expected_loop_iterations_unbounded ( )

   Returns expected number of iterations of LOOP, according to
   measured or guessed profile.  No bounding is done on the
   value.

References loop::header, loop::latch, basic_block_def::preds, and edge_def::src.

vec<basic_block> get_loop_hot_path ( )

   Gets basic blocks of a LOOP.  Header is the 0-th block, rest is in dfs
   order against direction of edges from latch.  Specially, if
   header != latch, latch is the 1-st block.

unsigned get_loop_level ( )

   Returns the maximum level of nesting of subloops of LOOP.

References set_rtx_cost().

void init_set_costs ( void )

   Initialize the constants for computing set costs.

         Set up the costs for using extra registers:

         1) If not many free registers remain, we should prefer having an
            additional move to decreasing the number of available registers.
            (TARGET_REG_COST).
         2) If no registers are available, we need to spill, which may require
            storing the old value to memory and loading it back
            (TARGET_SPILL_COST).

References emit_move_insn(), end_sequence(), get_insns(), seq_cost(), and start_sequence().

bool just_once_each_iteration_p ( )

   Checks whether BB is executed exactly once in each LOOP iteration.

     It must be executed at least once each iteration.

     And just once.

     But this was not enough.  We might have some irreducible loop here.

bool mark_irreducible_loops ( void )

     Reset the flags.

     Create the edge lists.

           Ignore edges to exit.

           Ignore latch edges.

           Edges inside a single loop should be left where they are.  Edges
           to subloop headers should lead to representative of the subloop,
           but from the same place.

           Edges exiting loops should lead from representative
           of the son of nearest common ancestor of the loops in that
           act lays.

     Find the strongly connected components.

     Mark the irreducible loops.

           edge E in graph G is irreducible if it connects two vertices in the
           same scc.

           All edges should lead from a component with higher number to the
           one with lower one.

Referenced by analyze_function().

void mark_loop_exit_edges ( void )

   Sets EDGE_LOOP_EXIT flag for all loop exits.

int num_loop_insns ( )

   Counts number of insns inside LOOP.

References get_loop_body(), and loop::ninsns.

static unsigned seq_cost ( )

static

   Returns estimate on cost of computing SEQ.

References gen_raw_REG(), gen_rtx_MEM(), and validize_mem().

Referenced by init_set_costs().

edge single_likely_exit ( )

   Return exit edge if loop has only one exit that is likely
   to be executed on runtime (i.e. it is not EH or leading
   to noreturn call.

         The constant of 5 is set in a way so noreturn calls are
         ruled out by this test.  The static branch prediction algorithm
         will not assign such a low probability to conditionals for usual
         reasons.

Variable Documentation

struct target_cfgloop default_target_cfgloop

@verbatim

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

struct target_cfgloop* this_target_cfgloop = &default_target_cfgloop

Functions

Variables

Function Documentation

Variable Documentation