- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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Data Structures | |
| struct | elim_table |
| struct | elim_table_1 |
Typedefs | |
| typedef rtx * | rtx_p |
Stack of addresses where an rtx has been changed. We can undo the changes by popping items off the stack and restoring the original value at each location. We use this simplistic undo capability rather than copy_rtx as copy_rtx will not make a deep copy of a normally sharable rtx, such as (const (plus (symbol_ref) (const_int))). If such an expression appears as R1 in gen_reload_chain_without_interm_reg_p, then a shared rtx expression would be changed. See PR 42431.
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Scan all the operand sub-expressions.
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Find a spill register to use as a reload register for reload R. LAST_RELOAD is nonzero if this is the last reload for the insn being processed. Set rld[R].reg_rtx to the register allocated. We return 1 if successful, or 0 if we couldn't find a spill reg and we didn't change anything.
If we put this reload ahead, thinking it is a group,
then insist on finding a group. Otherwise we can grab a
reg that some other reload needs.
(That can happen when we have a 68000 DATA_OR_FP_REG
which is a group of data regs or one fp reg.)
We need not be so restrictive if there are no more reloads
for this insn.
??? Really it would be nicer to have smarter handling
for that kind of reg class, where a problem like this is normal.
Perhaps those classes should be avoided for reloading
by use of more alternatives. If we want a single register and haven't yet found one,
take any reg in the right class and not in use.
If we want a consecutive group, here is where we look for it.
We use three passes so we can first look for reload regs to
reuse, which are already in use for other reloads in this insn,
and only then use additional registers which are not "bad", then
finally any register.
I think that maximizing reuse is needed to make sure we don't
run out of reload regs. Suppose we have three reloads, and
reloads A and B can share regs. These need two regs.
Suppose A and B are given different regs.
That leaves none for C. I is the index in spill_regs.
We advance it round-robin between insns to use all spill regs
equally, so that inherited reloads have a chance
of leapfrogging each other. We check reload_reg_used to make sure we
don't clobber the return register. Look first for regs to share, then for unshared. But
don't share regs used for inherited reloads; they are
the ones we want to preserve. During the second pass we want to avoid reload registers
which are "bad" for this reload. Avoid the problem where spilling a GENERAL_OR_FP_REG
(on 68000) got us two FP regs. If NR is 1,
we would reject both of them. If we need only one reg, we have already won.
But reject a single reg if we demand a group.
Otherwise check that as many consecutive regs as we need
are available here. If we found something on the current pass, omit later passes.
We should have found a spill register by now.
I is the index in SPILL_REG_RTX of the reload register we are to
allocate. Get an rtx for it and find its register number.
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Referenced by set_label_offsets().
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Modify the home of pseudo-reg I. The new home is present in reg_renumber[I]. FROM_REG may be the hard reg that the pseudo-reg is being spilled from; or it may be -1, meaning there is none or it is not relevant. This is used so that all pseudos spilled from a given hard reg can share one stack slot.
When outputting an inline function, this can happen
for a reg that isn't actually used. If the reg got changed to a MEM at rtl-generation time,
ignore it. Modify the reg-rtx to contain the new hard reg
number or else to contain its pseudo reg number. If we have a pseudo that is needed but has no hard reg or equivalent,
allocate a stack slot for it. Mark the spill for IRA.
Each pseudo reg has an inherent size which comes from its own mode,
and a total size which provides room for paradoxical subregs
which refer to the pseudo reg in wider modes.
We can use a slot already allocated if it provides both
enough inherent space and enough total space.
Otherwise, we allocate a new slot, making sure that it has no less
inherent space, and no less total space, then the previous slot. No known place to spill from => no slot to reuse.
Cancel the big-endian correction done in assign_stack_local.
Get the address of the beginning of the slot. This is so we
can do a big-endian correction unconditionally below. Inform IRA about allocation a new stack slot.
Reuse a stack slot if possible.
Allocate a bigger slot.
Compute maximum size needed, both for inherent size
and for total size. Make a slot with that size.
Cancel the big-endian correction done in assign_stack_local.
Get the address of the beginning of the slot. This is so we
can do a big-endian correction unconditionally below. On a big endian machine, the "address" of the slot
is the address of the low part that fits its inherent mode. If we have any adjustment to make, or if the stack slot is the
wrong mode, make a new stack slot. Set all of the memory attributes as appropriate for a spill.
Save the stack slot for later.
References elim_table::can_eliminate, first_label_num, elim_table::initial_offset, elim_table::offset, offset, offsets_at, offsets_known_at, pc_rtx, prev_nonnote_insn(), SET, set_label_offsets(), and set_offsets_for_label().
| void calculate_elim_costs_all_insns | ( | void | ) |
This function is called from the register allocator to set up estimates for the cost of eliminating pseudos which have REG_EQUIV equivalences to an invariant. The structure is similar to calculate_needs_all_insns.
If this is a label, a JUMP_INSN, or has REG_NOTES (which might
include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
what effects this has on the known offsets at labels. Skip insns that only set an equivalence.
If needed, eliminate any eliminable registers.
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Walk the chain of insns, and determine for each whether it needs reloads and/or eliminations. Build the corresponding insns_need_reload list, and set something_needs_elimination as appropriate.
Clear out the shortcuts.
If this is a label, a JUMP_INSN, or has REG_NOTES (which might
include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
what effects this has on the known offsets at labels. Skip insns that only set an equivalence.
If needed, eliminate any eliminable registers.
Analyze the instruction.
If a no-op set needs more than one reload, this is likely
to be something that needs input address reloads. We
can't get rid of this cleanly later, and it is of no use
anyway, so discard it now.
We only do this when expensive_optimizations is enabled,
since this complements reload inheritance / output
reload deletion, and it can make debugging harder. Inform IRA about the insn deletion.
Delete it from the reload chain.
Remember for later shortcuts which insns had any reloads or
register eliminations. Discard any register replacements done.
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Descend through rtx X and verify that no references to eliminable registers remain. If any do remain, mark the involved register as not eliminable.
References validate_change().
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Assign hard reg targets for the pseudo-registers we must reload into hard regs for this insn. Also output the instructions to copy them in and out of the hard regs. For machines with register classes, we are responsible for finding a reload reg in the proper class.
In order to be certain of getting the registers we need,
we must sort the reloads into order of increasing register class.
Then our grabbing of reload registers will parallel the process
that provided the reload registers.
Also note whether any of the reloads wants a consecutive group of regs.
If so, record the maximum size of the group desired and what
register class contains all the groups needed by this insn. If -O, try first with inheritance, then turning it off.
If not -O, don't do inheritance.
Using inheritance when not optimizing leads to paradoxes
with fp on the 68k: fp numbers (not NaNs) fail to be equal to themselves
because one side of the comparison might be inherited. Process the reloads in order of preference just found.
Beyond this point, subregs can be found in reload_reg_rtx.
This used to look for an existing reloaded home for all of the
reloads, and only then perform any new reloads. But that could lose
if the reloads were done out of reg-class order because a later
reload with a looser constraint might have an old home in a register
needed by an earlier reload with a tighter constraint.
To solve this, we make two passes over the reloads, in the order
described above. In the first pass we try to inherit a reload
from a previous insn. If there is a later reload that needs a
class that is a proper subset of the class being processed, we must
also allocate a spill register during the first pass.
Then make a second pass over the reloads to allocate any reloads
that haven't been given registers yet. Ignore reloads that got marked inoperative.
If find_reloads chose to use reload_in or reload_out as a reload
register, we don't need to chose one. Otherwise, try even if it
found one since we might save an insn if we find the value lying
around.
Try also when reload_in is a pseudo without a hard reg. If this is an optional reload, we can't inherit from earlier insns
until we are sure that any non-optional reloads have been allocated.
The following code takes advantage of the fact that optional reloads
are at the end of reload_order. First see if this pseudo is already available as reloaded
for a previous insn. We cannot try to inherit for reloads
that are smaller than the maximum number of registers needed
for groups unless the register we would allocate cannot be used
for the groups.
We could check here to see if this is a secondary reload for
an object that is already in a register of the desired class.
This would avoid the need for the secondary reload register.
But this is complex because we can't easily determine what
objects might want to be loaded via this reload. So let a
register be allocated here. In `emit_reload_insns' we suppress
one of the loads in the case described above. This won't work, since REGNO can be a pseudo reg number.
Also, it takes much more hair to keep track of all the things
that can invalidate an inherited reload of part of a pseudoreg. Verify that the register it's in can be used in
mode MODE. Even if we can't use this register as a reload
register, we might use it for reload_override_in,
if copying it to the desired class is cheap
enough. If a group is needed, verify that all the subsequent
registers still have their values intact. We found a register that contains the
value we need. If this register is the
same as an `earlyclobber' operand of the
current insn, just mark it as a place to
reload from since we can't use it as the
reload register itself. Don't use it if we'd clobber a pseudo reg.
Don't clobber the frame pointer.
Don't really use the inherited spill reg
if we need it wider than we've got it. If find_reloads chose reload_out as reload
register, stay with it - that leaves the
inherited register for subsequent reloads. We can use this as a reload reg.
Mark the register as in use for this part of
the insn. Here's another way to see if the value is already lying around.
This must be a SUBREG of a hard register.
Make a new REG since this might be used in an
address and not all machines support SUBREGs
there. If we choose EQUIV as the reload register, but the
loop below decides to cancel the inheritance, we'll
end up reloading EQUIV in rld[r].mode, not the mode
it had originally. That isn't safe when EQUIV isn't
available as a spill register since its value might
still be live at this point. If we found a spill reg, reject it unless it is free
and of the desired class. We found a register that contains the value we need.
If this register is the same as an `earlyclobber' operand
of the current insn, just mark it as a place to reload from
since we can't use it as the reload register itself. If the equiv register we have found is explicitly clobbered
in the current insn, it depends on the reload type if we
can use it, use it for reload_override_in, or not at all.
In particular, we then can't use EQUIV for a
RELOAD_FOR_OUTPUT_ADDRESS reload. Fall through.
Fall through.
If we found an equivalent reg, say no code need be generated
to load it, and use it as our reload reg. If reg_reloaded_valid is not set for this register,
there might be a stale spill_reg_store lying around.
We must clear it, since otherwise emit_reload_insns
might delete the store. If any of the hard registers in EQUIV are spill
registers, mark them as in use for this insn. If we found a register to use already, or if this is an optional
reload, we are done. No longer needed for correct operation. Might or might
not give better code on the average. Want to experiment? See if there is a later reload that has a class different from our
class that intersects our class or that requires less register
than our reload. If so, we must allocate a register to this
reload now, since that reload might inherit a previous reload
and take the only available register in our class. Don't do this
for optional reloads since they will force all previous reloads
to be allocated. Also don't do this for reloads that have been
turned off. Now allocate reload registers for anything non-optional that
didn't get one yet. Ignore reloads that got marked inoperative.
Skip reloads that already have a register allocated or are
optional. If that loop got all the way, we have won.
Loop around and try without any inheritance.
First undo everything done by the failed attempt
to allocate with inheritance. Some sanity tests to verify that the reloads found in the first
pass are identical to the ones we have now. If we thought we could inherit a reload, because it seemed that
nothing else wanted the same reload register earlier in the insn,
verify that assumption, now that all reloads have been assigned.
Likewise for reloads where reload_override_in has been set. If doing expensive optimizations, do one preliminary pass that doesn't
cancel any inheritance, but removes reloads that have been needed only
for reloads that we know can be inherited. If we can inherit a RELOAD_FOR_INPUT, or can use a
reload_override_in, then we do not need its related
RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS reloads;
likewise for other reload types.
We handle this by removing a reload when its only replacement
is mentioned in reload_in of the reload we are going to inherit.
A special case are auto_inc expressions; even if the input is
inherited, we still need the address for the output. We can
recognize them because they have RELOAD_OUT set to RELOAD_IN.
If we succeeded removing some reload and we are doing a preliminary
pass just to remove such reloads, make another pass, since the
removal of one reload might allow us to inherit another one. If we needed a memory location for the reload, we also have to
remove its related reloads. Now that reload_override_in is known valid,
actually override reload_in. If this reload won't be done because it has been canceled or is
optional and not inherited, clear reload_reg_rtx so other
routines (such as subst_reloads) don't get confused. Record which pseudos and which spill regs have output reloads.
I is nonneg if this reload uses a register.
If rld[r].reg_rtx is 0, this is an optional reload
that we opted to ignore.
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Initialize all the tables needed to allocate reload registers. CHAIN is the insn currently being processed; SAVE_RELOAD_REG_RTX is the array we use to restore the reg_rtx field for every reload.
If we have already decided to use a certain register,
don't use it in another way.
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Similarly, but show REGNO is no longer in use for a reload.
A complication is that for some reload types, inheritance might
allow multiple reloads of the same types to share a reload register.
We set check_opnum if we have to check only reloads with the same
operand number, and check_any if we have to check all reloads. We resolve conflicts with remaining reloads of the same type by
excluding the intervals of reload registers by them from the
interval of freed reload registers. Since we only keep track of
one set of interval bounds, we might have to exclude somewhat
more than what would be necessary if we used a HARD_REG_SET here.
But this should only happen very infrequently, so there should
be no reason to worry about it. If there is an overlap with the first to-be-freed register,
adjust the interval start. Otherwise, if there is a conflict with one of the other
to-be-freed registers, adjust the interval end.
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Compute the offset to pass to subreg_regno_offset, for a pseudo of mode OUTERMODE that is available in a hard reg of mode INNERMODE. SUBREG is non-NULL if the pseudo is a subreg whose reg is a pseudo, otherwise it is NULL.
If SUBREG is paradoxical then return the normal lowpart offset
for OUTERMODE and INNERMODE. Our caller has already checked
that OUTERMODE fits in INNERMODE. SUBREG is normal, but may not be lowpart; return OUTER_OFFSET
plus the normal lowpart offset for MIDDLEMODE and INNERMODE.
| void compute_use_by_pseudos | ( | ) |
Small utility function to set all regs in hard reg set TO which are allocated to pseudos in regset FROM.
reload_combine uses the information from DF_LIVE_IN,
which might still contain registers that have not
actually been allocated since they have an
equivalence.
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Determine whether the reload reg X overlaps any rtx'es used for overriding inheritance. Return nonzero if so.
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Referenced by maybe_fix_stack_asms().
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Copy the global variables n_reloads and rld into the corresponding elts of CHAIN.
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Update the spill cost arrays, considering that pseudo REG is live.
Ignore spilled pseudo-registers which can be here only if IRA is used.
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We decided to spill hard register SPILLED, which has a size of SPILLED_NREGS. Determine how pseudo REG, which is live during the insn, is affected. We will add it to SPILLED_PSEUDOS if necessary, and we will update SPILL_COST/SPILL_ADD_COST.
Ignore spilled pseudo-registers which can be here only if IRA is used.
| void deallocate_reload_reg | ( | ) |
Deallocate the reload register for reload R. This is called from remove_address_replacements.
References reload::rclass, reload::secondary_out_reload, and secondary_reload_class().
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We are going to delete DEAD_INSN. Recursively delete loads of reload registers used in DEAD_INSN that are not used till CURRENT_INSN. CURRENT_INSN is being reloaded, so we have to check its reloads too.
If we deleted the store from a reloaded post_{in,de}c expression,
we can delete the matching adds.
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Subfunction of delete_address_reloads: process registers found in X.
Scan backwards for the insn that sets x. This might be a way back due
to inheritance. Check that PREV only sets the reload register.
Check if DST was used in a later insn -
it might have been inherited. If there is a reference to the register in the current insn,
it might be loaded in a non-inherited reload. If no other
reload uses it, that means the register is set before
referenced. If DST is still live at CURRENT_INSN, check if it is used for
any reload. Note that even if CURRENT_INSN sets DST, we still
have to check the reloads. ??? We can't finish the loop here, because dst might be
allocated to a pseudo in this block if no reload in this
block needs any of the classes containing DST - see
spill_hard_reg. There is no easy way to tell this, so we
have to scan till the end of the basic block.
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Delete all insns that were inserted by emit_caller_save_insns during this iteration.
References assign_stack_local(), and spill_stack_slot_width.
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Delete an unneeded INSN and any previous insns who sole purpose is loading data that is dead in INSN.
If the previous insn sets a register that dies in our insn make
a note that we want to run DCE immediately after reload.
We used to delete the previous insn & recurse, but that's wrong for
block local equivalences. Instead of trying to figure out the exact
circumstances where we can delete the potentially dead insns, just
let DCE do the job.
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Delete a previously made output-reload whose result we now believe is not needed. First we double-check. INSN is the insn now being processed. LAST_RELOAD_REG is the hard register number for which we want to delete the last output reload. J is the reload-number that originally used REG. The caller has made certain that reload J doesn't use REG any longer for input. NEW_RELOAD_REG is reload register that reload J is using for REG.
It is possible that this reload has been only used to set another reload
we eliminated earlier and thus deleted this instruction too. Get the raw pseudo-register referred to.
This is unsafe if the operand occurs more often in the current
insn than it is inherited. If the pseudo-reg we are reloading is no longer referenced
anywhere between the store into it and here,
and we're within the same basic block, then the value can only
pass through the reload reg and end up here.
Otherwise, give up--return. If this is USE in front of INSN, we only have to check that
there are no more references than accounted for by inheritance. We will be deleting the insn. Remove the spill reg information.
The caller has already checked that REG dies or is set in INSN.
It has also checked that we are optimizing, and thus some
inaccuracies in the debugging information are acceptable.
So we could just delete output_reload_insn. But in some cases
we can improve the debugging information without sacrificing
optimization - maybe even improving the code: See if the pseudo
reg has been completely replaced with reload regs. If so, delete
the store insn and forget we had a stack slot for the pseudo. We know that it was used only between here and the beginning of
the current basic block. (We also know that the last use before
INSN was the output reload we are thinking of deleting, but never
mind that.) Search that range; see if any ref remains. Uses which just store in the pseudo don't count,
since if they are the only uses, they are dead. Some other ref remains; just delete the output reload we
know to be dead. Delete the now-dead stores into this pseudo. Note that this
loop also takes care of deleting output_reload_insn. For the debugging info, say the pseudo lives in this reload reg.
Inform IRA about the change.
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Do input reloading for reload RL, which is for the insn described by CHAIN and has the number J.
Determine the mode to reload in.
This is very tricky because we have three to choose from.
There is the mode the insn operand wants (rl->inmode).
There is the mode of the reload register RELOADREG.
There is the intrinsic mode of the operand, which we could find
by stripping some SUBREGs.
It turns out that RELOADREG's mode is irrelevant:
we can change that arbitrarily.
Consider (SUBREG:SI foo:QI) as an operand that must be SImode;
then the reload reg may not support QImode moves, so use SImode.
If foo is in memory due to spilling a pseudo reg, this is safe,
because the QImode value is in the least significant part of a
slot big enough for a SImode. If foo is some other sort of
memory reference, then it is impossible to reload this case,
so previous passes had better make sure this never happens.
Then consider a one-word union which has SImode and one of its
members is a float, being fetched as (SUBREG:SF union:SI).
We must fetch that as SFmode because we could be loading into
a float-only register. In this case OLD's mode is correct.
Consider an immediate integer: it has VOIDmode. Here we need
to get a mode from something else.
In some cases, there is a fourth mode, the operand's
containing mode. If the insn specifies a containing mode for
this operand, it overrides all others.
I am not sure whether the algorithm here is always right,
but it does the right things in those cases. We cannot use gen_lowpart_common since it can do the wrong thing
when REG_RTX has a multi-word mode. Note that REG_RTX must
always be a REG here. AUTO_INC reloads need to be handled even if inherited. We got an
AUTO_INC reload if reload_out is set but reload_out_reg isn't. When inheriting a wider reload, we have a MEM in rl->in,
e.g. inheriting a SImode output reload for
(mem:HI (plus:SI (reg:SI 14 fp) (const_int 10))) If we are reloading a register that was recently stored in with an
output-reload, see if we can prove there was
actually no need to store the old value in it. There doesn't seem to be any reason to restrict this to pseudos
and doing so loses in the case where we are copying from a
register of the wrong class. The insn might have already some references to stackslots
replaced by MEMs, while reload_out_reg still names the
original pseudo.
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Do output reloading for reload RL, which is for the insn described by CHAIN and has the number J. ??? At some point we need to support handling output reloads of JUMP_INSNs or insns that set cc0.
If this is an output reload that stores something that is
not loaded in this same reload, see if we can eliminate a previous
store. Determine the mode to reload in.
See comments above (for input reloading). VOIDmode should never happen for an output.
It's the compiler's fault.
Prevent crash--use something we know is valid.
We don't need to test full validity of last_regno for
inherit here; we only want to know if the store actually
matches the pseudo. An output operand that dies right away does need a reload,
but need not be copied from it. Show the new location in the
REG_UNUSED note. Likewise for a SUBREG of an operand that dies.
If we aren't optimizing, there won't be a REG_UNUSED note,
but we don't want to make an output reload. If is a JUMP_INSN, we can't support output reloads yet.
References emit_insn(), emit_insn_if_valid_for_reload(), find_replacement(), gen_add2_insn(), gen_reload(), insn_chain::insn, insn_operand_matches(), optab_handler(), reg_overlap_mentioned_p(), rtx_equal_p(), and set_dst_reg_note().
| rtx eliminate_regs | ( | ) |
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Scan X and replace any eliminable registers (such as fp) with a replacement (such as sp), plus an offset. MEM_MODE is the mode of an enclosing MEM. We need this to know how much to adjust a register for, e.g., PRE_DEC. Also, if we are inside a MEM, we are allowed to replace a sum of a register and the constant zero with the register, which we cannot do outside a MEM. In addition, we need to record the fact that a register is referenced outside a MEM. If INSN is an insn, it is the insn containing X. If we replace a REG in a SET_DEST with an equivalent MEM and INSN is nonzero, write a CLOBBER of the pseudo after INSN so find_equiv_regs will know that the REG is being modified. Alternatively, INSN may be a note (an EXPR_LIST or INSN_LIST). That's used when we eliminate in expressions stored in notes. This means, do not set ref_outside_mem even if the reference is outside of MEMs. If FOR_COSTS is true, we are being called before reload in order to estimate the costs of keeping registers with an equivalence unallocated. REG_EQUIV_MEM and REG_EQUIV_ADDRESS contain address that have had replacements done assuming all offsets are at their initial values. If they are not, or if REG_EQUIV_ADDRESS is nonzero for a pseudo we encounter, return the actual location so that find_reloads will do the proper thing.
First handle the case where we encounter a bare register that
is eliminable. Replace it with a PLUS. There exists at least one use of REGNO that cannot be
eliminated. Prevent the defining insn from being deleted. You might think handling MINUS in a manner similar to PLUS is a
good idea. It is not. It has been tried multiple times and every
time the change has had to have been reverted.
Other parts of reload know a PLUS is special (gen_reload for example)
and require special code to handle code a reloaded PLUS operand.
Also consider backends where the flags register is clobbered by a
MINUS, but we can emit a PLUS that does not clobber flags (IA-32,
lea instruction comes to mind). If we try to reload a MINUS, we
may kill the flags register that was holding a useful value.
So, please before trying to handle MINUS, consider reload as a
whole instead of this little section as well as the backend issues. If this is the sum of an eliminable register and a constant, rework
the sum. The only time we want to replace a PLUS with a REG (this
occurs when the constant operand of the PLUS is the negative
of the offset) is when we are inside a MEM. We won't want
to do so at other times because that would change the
structure of the insn in a way that reload can't handle.
We special-case the commonest situation in
eliminate_regs_in_insn, so just replace a PLUS with a
PLUS here, unless inside a MEM. If the register is not eliminable, we are done since the other
operand is a constant. If this is part of an address, we want to bring any constant to the
outermost PLUS. We will do this by doing register replacement in
our operands and seeing if a constant shows up in one of them.
Note that there is no risk of modifying the structure of the insn,
since we only get called for its operands, thus we are either
modifying the address inside a MEM, or something like an address
operand of a load-address insn. If one side is a PLUS and the other side is a pseudo that
didn't get a hard register but has a reg_equiv_constant,
we must replace the constant here since it may no longer
be in the position of any operand. As above, if we are not inside a MEM we do not want to
turn a PLUS into something else. We might try to do so here
for an addition of 0 if we aren't optimizing. If this is the product of an eliminable register and a
constant, apply the distribute law and move the constant out
so that we have (plus (mult ..) ..). This is needed in order
to keep load-address insns valid. This case is pathological.
We ignore the possibility of overflow here. Refs inside notes or in DEBUG_INSNs don't count for
this purpose. ... fall through ...
See comments before PLUS about handling MINUS.
If we have something in XEXP (x, 0), the usual case, eliminate it.
If this is a REG_DEAD note, it is not valid anymore.
Using the eliminated version could result in creating a
REG_DEAD note for the stack or frame pointer. ... fall through ...
Now do eliminations in the rest of the chain. If this was
an EXPR_LIST, this might result in allocating more memory than is
strictly needed, but it simplifies the code. We do not support elimination of a register that is modified.
elimination_effects has already make sure that this does not
happen. We do not support elimination of a register that is modified.
elimination_effects has already make sure that this does not
happen. The only remaining case we need to consider here is
that the increment value may be an eliminable register. Similar to above processing, but preserve SUBREG_BYTE.
Convert (subreg (mem)) to (mem) if not paradoxical.
Also, if we have a non-paradoxical (subreg (pseudo)) and the
pseudo didn't get a hard reg, we must replace this with the
eliminated version of the memory location because push_reload
may do the replacement in certain circumstances. On these machines, combine can create rtl of the form
(set (subreg:m1 (reg:m2 R) 0) ...)
where m1 < m2, and expects something interesting to
happen to the entire word. Moreover, it will use the
(reg:m2 R) later, expecting all bits to be preserved.
So if the number of words is the same, preserve the
subreg so that push_reload can see it. Our only special processing is to pass the mode of the MEM to our
recursive call and copy the flags. While we are here, handle this
case more efficiently. Handle insn_list USE that a call to a pure function may generate.
Process each of our operands recursively. If any have changed, make a
copy of the rtx.
Referenced by set_label_offsets().
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Scan INSN and eliminate all eliminable registers in it. If REPLACE is nonzero, do the replacement destructively. Also delete the insn as dead it if it is setting an eliminable register. If REPLACE is zero, do all our allocations in reload_obstack. If no eliminations were done and this insn doesn't require any elimination processing (these are not identical conditions: it might be updating sp, but not referencing fp; this needs to be seen during reload_as_needed so that the offset between fp and sp can be taken into consideration), zero is returned. Otherwise, 1 is returned.
Check for setting an eliminable register.
If this is setting the frame pointer register to the
hardware frame pointer register and this is an elimination
that will be done (tested above), this insn is really
adjusting the frame pointer downward to compensate for
the adjustment done before a nonlocal goto. First see if this insn remains valid when we
make the change. If not, keep the INSN_CODE
the same and let reload fit it up. In this case this insn isn't serving a useful purpose. We
will delete it in reload_as_needed once we know that this
elimination is, in fact, being done.
If REPLACE isn't set, we can't delete this insn, but needn't
process it since it won't be used unless something changes. We allow one special case which happens to work on all machines we
currently support: a single set with the source or a REG_EQUAL
note being a PLUS of an eliminable register and a constant. First see if the source is of the form (plus (...) CST).
Otherwise, see if we have a REG_EQUAL note of the form
(plus (...) CST). Check that the first operand of the PLUS is a hard reg or
the lowpart subreg of one. If we have a nonzero offset, and the source is already
a simple REG, the following transformation would
increase the cost of the insn by replacing a simple REG
with (plus (reg sp) CST). So try only when we already
had a PLUS before. First see if this insn remains valid when we make the
change. If not, try to replace the whole pattern with
a simple set (this may help if the original insn was a
PARALLEL that was only recognized as single_set due to
REG_UNUSED notes). If this isn't valid either, keep
the INSN_CODE the same and let reload fix it up. This can't have an effect on elimination offsets, so skip right
to the end. Determine the effects of this insn on elimination offsets.
Eliminate all eliminable registers occurring in operands that
can be handled by reload. For an asm statement, every operand is eliminable.
Check for setting a register that we know about.
If we are assigning to a register that can be eliminated, it
must be as part of a PARALLEL, since the code above handles
single SETs. We must indicate that we can no longer
eliminate this reg. Companion to the above plus substitution, we can allow
invariants as the source of a plain move. Terminate the search in check_eliminable_occurrences at
this point. If an output operand changed from a REG to a MEM and INSN is an
insn, write a CLOBBER insn. If any eliminable remain, they aren't eliminable anymore.
Substitute the operands; the new values are in the substed_operand
array. If we are replacing a body that was a (set X (plus Y Z)), try to
re-recognize the insn. We do this in case we had a simple addition
but now can do this as a load-address. This saves an insn in this
common case.
If re-recognition fails, the old insn code number will still be used,
and some register operands may have changed into PLUS expressions.
These will be handled by find_reloads by loading them into a register
again. If we aren't replacing things permanently and we changed something,
make another copy to ensure that all the RTL is new. Otherwise
things can go wrong if find_reload swaps commutative operands
and one is inside RTL that has been copied while the other is not. If we had a move insn but now we don't, rerecognize it. This will
cause spurious re-recognition if the old move had a PARALLEL since
the new one still will, but we can't call single_set without
having put NEW_BODY into the insn and the re-recognition won't
hurt in this rare case. ??? Why this huge if statement - why don't we just rerecognize the
thing always? If this was a load from or store to memory, compare
the MEM in recog_data.operand to the one in the insn.
If they are not equal, then rerecognize the insn. If this was an add insn before, rerecognize.
Restore the old body. If there were any changes to it, we made a copy
of it while the changes were still in place, so we'll correctly return
a modified insn below. Restore the old body.
Restoring a top-level match_parallel would clobber the new_body
we installed in the insn. Update all elimination pairs to reflect the status after the current
insn. The changes we make were determined by the earlier call to
elimination_effects.
We also detect cases where register elimination cannot be done,
namely, if a register would be both changed and referenced outside a MEM
in the resulting insn since such an insn is often undefined and, even if
not, we cannot know what meaning will be given to it. Note that it is
valid to have a register used in an address in an insn that changes it
(presumably with a pre- or post-increment or decrement).
If anything changes, return nonzero. If we changed something, perform elimination in REG_NOTES. This is
needed even when REPLACE is zero because a REG_DEAD note might refer
to a register that we eliminate and could cause a different number
of spill registers to be needed in the final reload pass than in
the pre-passes.
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|
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Like eliminate_regs_in_insn, but only estimate costs for the use of the register allocator. INSN is the instruction we need to examine, we perform eliminations in its operands and record cases where eliminating a reg with an invariant equivalence would add extra cost.
Check for setting an eliminable register.
We allow one special case which happens to work on all machines we
currently support: a single set with the source or a REG_EQUAL
note being a PLUS of an eliminable register and a constant. First see if the source is of the form (plus (...) CST).
Otherwise, see if we have a REG_EQUAL note of the form
(plus (...) CST). Determine the effects of this insn on elimination offsets.
Eliminate all eliminable registers occurring in operands that
can be handled by reload. For an asm statement, every operand is eliminable.
Check for setting a register that we know about.
If we are assigning to a register that can be eliminated, it
must be as part of a PARALLEL, since the code above handles
single SETs. We must indicate that we can no longer
eliminate this reg. Companion to the above plus substitution, we can allow
invariants as the source of a plain move. Terminate the search in check_eliminable_occurrences at
this point. If any eliminable remain, they aren't eliminable anymore.
Restore the old body.
Update all elimination pairs to reflect the status after the current
insn. The changes we make were determined by the earlier call to
elimination_effects.
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|
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Scan rtx X for modifications of elimination target registers. Update the table of eliminables to reflect the changed state. MEM_MODE is the mode of an enclosing MEM rtx, or VOIDmode if not within a MEM.
First handle the case where we encounter a bare register that
is eliminable. Replace it with a PLUS. If we modify the source of an elimination rule, disable it.
If we modify the target of an elimination rule by adding a constant,
update its offset. If we modify the target in any other way, we'll
have to disable the rule as well. If more bytes than MEM_MODE are pushed, account for them.
These two aren't unary operators.
Fall through to generic unary operation case.
If using a register that is the source of an eliminate we still
think can be performed, note it cannot be performed since we don't
know how this register is used. If clobbering a register that is the replacement register for an
elimination we still think can be performed, note that it cannot
be performed. Otherwise, we need not be concerned about it. Check for setting a register that we know about.
See if this is setting the replacement register for an
elimination.
If DEST is the hard frame pointer, we do nothing because we
assume that all assignments to the frame pointer are for
non-local gotos and are being done at a time when they are valid
and do not disturb anything else. Some machines want to
eliminate a fake argument pointer (or even a fake frame pointer)
with either the real frame or the stack pointer. Assignments to
the hard frame pointer must not prevent this elimination. If it is being incremented, adjust the offset. Otherwise,
this elimination can't be done. Our only special processing is to pass the mode of the MEM to our
recursive call.
| bool elimination_target_reg_p | ( | ) |
Return true if X is used as the target register of an elimination.
References pseudo_forbidden_regs, and insn_chain::used_spill_regs.
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Generate insns to perform reload RL, which is for the insn in CHAIN and has the number J. OLD contains the value to be used as input.
delete_output_reload is only invoked properly if old contains
the original pseudo register. Since this is replaced with a
hard reg when RELOAD_OVERRIDE_IN is set, see if we can
find the pseudo in RELOAD_IN_REG. If we are reloading from a register that was recently stored in
with an output-reload, see if we can prove there was
actually no need to store the old value in it. Encapsulate OLDEQUIV into the reload mode, then load RELOADREG from
OLDEQUIV. Switch to the right place to emit the reload insns.
Auto-increment addresses must be reloaded in a special way.
We are not going to bother supporting the case where a
incremented register can't be copied directly from
OLDEQUIV since this seems highly unlikely. Prevent normal processing of this reload.
Output a special code sequence for this case.
If we are reloading a pseudo-register that was set by the previous
insn, see if we can get rid of that pseudo-register entirely
by redirecting the previous insn into our reload register. This is unsafe if some other reload
uses the same reg first. Make sure we can access insn_operand_constraint.
This is unsafe if operand occurs more than once in current
insn. Perhaps some occurrences aren't reloaded. Store into the reload register instead of the pseudo.
Verify that resulting insn is valid.
If the previous insn is an output reload, the source is
a reload register, and its spill_reg_store entry will
contain the previous destination. This is now
invalid. If these are the only uses of the pseudo reg,
pretend for GDB it lives in the reload reg we used. Inform IRA about the change.
Adjust any debug insns between temp and insn.
We can't do that, so output an insn to load RELOADREG.
If we have a secondary reload, pick up the secondary register
and icode, if any. If OLDEQUIV and OLD are different or
if this is an in-out reload, recompute whether or not we
still need a secondary register and what the icode should
be. If we still need a secondary register and the class or
icode is different, go back to reloading from OLD if using
OLDEQUIV means that we got the wrong type of register. We
cannot have different class or icode due to an in-out reload
because we don't make such reloads when both the input and
output need secondary reload registers. If OLDEQUIV is a pseudo with a MEM, get the real MEM
and similarly for OLD.
See comments in get_secondary_reload in reload.c. If it is a pseudo that cannot be replaced with its
equivalent MEM, we must fall back to reload_in, which
will have all the necessary substitutions registered.
Likewise for a pseudo that can't be replaced with its
equivalent constant.
Take extra care for subregs of such pseudos. Note that
we cannot use reg_equiv_mem in this case because it is
not in the right mode. We'd have to add more code for quartary reloads.
We currently lack a way to express this in reloads.
This could be handled more intelligently too.
If we still need a secondary reload register, check
to see if it is being used as a scratch or intermediate
register and generate code appropriately. If we need
a scratch register, use REAL_OLDEQUIV since the form of
the insn may depend on the actual address if it is
a MEM. We'd have to add extra code to handle this case.
See if we need a scratch register to load the
intermediate register (a tertiary reload). End this sequence.
Update reload_override_in so that delete_address_reloads_1
can see the actual register usage.
Referenced by do_output_reload().
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Go through the motions to emit INSN and test if it is strictly valid. Return the emitted insn if valid, else return NULL.
We want constrain operands to treat this insn strictly in its
validity determination, i.e., the way it would after reload has
completed.
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Generate insns to for the output reload RL, which is for the insn described by CHAIN and has the number J.
If we need two reload regs, set RELOADREG to the intermediate
one, since it will be stored into OLD. We might need a secondary
register only for an input reload, so check again here. See if RELOADREG is to be used as a scratch register
or as an intermediate register. We'd have to add extra code to handle this case.
See if we need both a scratch and intermediate reload
register. We'd have to add more code for quartary reloads.
Copy primary reload reg to secondary reload reg.
(Note that these have been swapped above, then
secondary reload reg to OLD using our insn.) If REAL_OLD is a paradoxical SUBREG, remove it
and try to put the opposite SUBREG on
RELOADREG. Copy between the reload regs here and then to
OUT later. Output the last reload insn.
Don't output the last reload if OLD is not the dest of
INSN and is in the src and is clobbered by INSN. Look at all insns we emitted, just to be safe.
If this output reload doesn't come from a spill reg,
clear any memory of reloaded copies of the pseudo reg.
If this output reload comes from a spill reg,
reg_has_output_reload will make this do nothing. If this reload copies only to the secondary reload
register, the secondary reload does the actual
store. We can't tell what function the secondary reload
has and where the actual store to the pseudo is
made; leave new_spill_reg_store alone. Usually the next instruction will be the
secondary reload insn; if we can confirm
that it is, setting new_spill_reg_store to
that insn will allow an extra optimization.
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Output insns to reload values in and out of the chosen reload regs.
Dump reloads into the dump file.
Now output the instructions to copy the data into and out of the
reload registers. Do these in the order that the reloads were reported,
since reloads of base and index registers precede reloads of operands
and the operands may need the base and index registers reloaded. Now write all the insns we made for reloads in the order expected by
the allocation functions. Prior to the insn being reloaded, we write
the following reloads:
RELOAD_FOR_OTHER_ADDRESS reloads for input addresses.
RELOAD_OTHER reloads.
For each operand, any RELOAD_FOR_INPADDR_ADDRESS reloads followed
by any RELOAD_FOR_INPUT_ADDRESS reloads followed by the
RELOAD_FOR_INPUT reload for the operand.
RELOAD_FOR_OPADDR_ADDRS reloads.
RELOAD_FOR_OPERAND_ADDRESS reloads.
After the insn being reloaded, we write the following:
For each operand, any RELOAD_FOR_OUTADDR_ADDRESS reloads followed
by any RELOAD_FOR_OUTPUT_ADDRESS reload followed by the
RELOAD_FOR_OUTPUT reload, followed by any RELOAD_OTHER output
reloads for the operand. The RELOAD_OTHER output reloads are
output in descending order by reload number. For all the spill regs newly reloaded in this instruction,
record what they were reloaded from, so subsequent instructions
can inherit the reloads.
Update spill_reg_store for the reloads of this insn.
Copy the elements that were updated in the loop above. If this is a non-inherited input reload from a pseudo, we must
clear any memory of a previous store to the same pseudo. Only do
something if there will not be an output reload for the pseudo
being reloaded. I is nonneg if this reload used a register.
If rld[r].reg_rtx is 0, this is an optional reload
that we opted to ignore. For a multi register reload, we need to check if all or part
of the value lives to the end. Maybe the spill reg contains a copy of reload_out.
The reload value is an auto-modification of
some kind. For PRE_INC, POST_INC, PRE_DEC
and POST_DEC, we record an equivalence
between the reload register and the operand
on the optimistic assumption that we can make
the equivalence hold. reload_as_needed must
then either make it hold or invalidate the
equivalence.
PRE_MODIFY and POST_MODIFY addresses are reloaded
somewhat differently, and allowing them here leads
to problems. AUTO_INC
If OUT_REGNO is a hard register, it may occupy more than
one register. If it does, say what is in the
rest of the registers assuming that both registers
agree on how many words the object takes. If not,
invalidate the subsequent registers. Now do the inverse operation.
Maybe the spill reg contains a copy of reload_in. Only do
something if there will not be an output reload for
the register being reloaded. Unless we inherited this reload, show we haven't
recently done a store.
Previous stores of inherited auto_inc expressions
also have to be discarded. The following if-statement was #if 0'd in 1.34 (or before...).
It's reenabled in 1.35 because supposedly nothing else
deals with this problem. If a register gets output-reloaded from a non-spill register,
that invalidates any previous reloaded copy of it.
But forget_old_reloads_1 won't get to see it, because
it thinks only about the original insn. So invalidate it here.
Also do the same thing for RELOAD_OTHER constraints where the
output is discarded. REG_RTX is now set or clobbered by the main instruction.
As the comment above explains, forget_old_reloads_1 only
sees the original instruction, and there is no guarantee
that the original instruction also clobbered REG_RTX.
For example, if find_reloads sees that the input side of
a matched operand pair dies in this instruction, it may
use the input register as the reload register.
Calling forget_old_reloads_1 is a waste of effort if
REG_RTX is also the output register.
If we know that REG_RTX holds the value of a pseudo
register, the code after the call will record that fact. If we can find a hard register that is stored, record
the storing insn so that we may delete this insn with
delete_output_reload. If this is an optional reload, try to find the
source reg from an input reload. The place where to find a death note varies with
PRESERVE_DEATH_INFO_REGNO_P . The condition is not
necessarily checked exactly in the code that moves
notes, so just check both locations. We have to set reg_has_output_reload here, or else
forget_old_reloads_1 will clear reg_last_reload_reg
right away.
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Give an error message saying we failed to find a reload for INSN, and clear out reload R.
It's the compiler's fault.
It's the user's fault; the operand's mode and constraint
don't match. Disable this reload so we don't crash in final.
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|
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Find reload register to use for reload number ORDER.
Ask IRA to find a better pseudo-register for
spilling. Among registers with equal cost, prefer caller-saved ones, or
use REG_ALLOC_ORDER if it is defined.
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|
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Find more reload regs to satisfy the remaining need of an insn, which is given by CHAIN. Do it by ascending class number, since otherwise a reg might be spilled for a big class and might fail to count for a smaller class even though it belongs to that class.
In order to be certain of getting the registers we need,
we must sort the reloads into order of increasing register class.
Then our grabbing of reload registers will parallel the process
that provided the reload registers. Show whether this reload already has a hard reg.
Compute the order of preference for hard registers to spill.
Ignore reloads that got marked inoperative.
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|
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After find_reload_regs has been run for all insn that need reloads, and/or spill_hard_regs was called, this function is used to actually spill pseudo registers and try to reallocate them. It also sets up the spill_regs array for use by choose_reload_regs.
Build the spill_regs array for the function.
If there are some registers still to eliminate and one of the spill regs
wasn't ever used before, additional stack space may have to be
allocated to store this register. Thus, we may have changed the offset
between the stack and frame pointers, so mark that something has changed.
One might think that we need only set VAL to 1 if this is a call-used
register. However, the set of registers that must be saved by the
prologue is not identical to the call-used set. For example, the
register used by the call insn for the return PC is a call-used register,
but must be saved by the prologue. Record the current hard register the pseudo is allocated to
in pseudo_previous_regs so we avoid reallocating it to the
same hard reg in a later pass. Mark it as no longer having a hard register home.
Inform IRA about the change.
We will need to scan everything again.
Retry global register allocation if possible.
For every insn that needs reloads, set the registers used as spill
regs in pseudo_forbidden_regs for every pseudo live across the
insn. Retry allocating the pseudos spilled in IRA and the
reload. For each reg, merge the various reg sets that
indicate which hard regs can't be used, and call
ira_reassign_pseudos. Fix up the register information in the insn chain.
This involves deleting those of the spilled pseudos which did not get
a new hard register home from the live_{before,after} sets. Don't do it for IRA because IRA and the reload still can
assign hard registers to the spilled pseudos on next
reload iterations. Mark any unallocated hard regs as available for spills. That
makes inheritance work somewhat better. Value of chain->used_spill_regs from previous iteration
may be not included in the value calculated here because
of possible removing caller-saves insns (see function
delete_caller_save_insns. Let alter_reg modify the reg rtx's for the modified pseudos.
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A subroutine of reload_as_needed. If INSN has a REG_EH_REGION note, examine all of the reload insns between PREV and NEXT exclusive, and annotate all that may trap.
References find_reg_note(), reg_reloaded_call_part_clobbered, and reg_reloaded_valid.
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Forget the reloads marked in regset by previous function.
But don't do this if the reg actually serves as an output
reload reg in the current instruction.
Discard all record of any value reloaded from X, or reloaded in X from someplace else; unless X is an output reload reg of the current insn. X may be a hard reg (the reload reg) or it may be a pseudo reg that was reloaded from. When DATA is non-NULL just mark the registers in regset to be forgotten later.
note_stores does give us subregs of hard regs,
subreg_regno_offset requires a hard reg. We ignore the subreg offset when calculating the regno,
because we are using the entire underlying hard register
below. Storing into a spilled-reg invalidates its contents.
This can happen if a block-local pseudo is allocated to that reg
and it wasn't spilled because this block's total need is 0.
Then some insn might have an optional reload and use this reg. But don't do this if the reg actually serves as an output
reload reg in the current instruction. Since value of X has changed,
forget any value previously copied from it. But don't forget a copy if this is the output reload
that establishes the copy's validity.
Referenced by spill_hard_reg().
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Return 1 if the value in reload reg REGNO, as used by a reload needed for the part of the insn specified by OPNUM and TYPE, may be used to load VALUE into it. MODE is the mode in which the register is used, this is needed to determine how many hard regs to test. Other read-only reloads with the same value do not conflict unless OUT is nonzero and these other reloads have to live while output reloads live. If OUT is CONST0_RTX, this is a special case: it means that the test should not be for using register REGNO as reload register, but for copying from register REGNO into the reload register. RELOADNUM is the number of the reload we want to load this value for; a reload does not conflict with itself. When IGNORE_ADDRESS_RELOADS is set, we can not have conflicts with reloads that load an address for the very reload we are considering. The caller has to make sure that there is no conflict with the return register.
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Indicate that we no longer have known memory locations or constants. Free all data involved in tracking these.
| int function_invariant_p | ( | ) |
Return nonzero if the rtx X is invariant over the current function.
??? Actually, the places where we use this expect exactly what is tested here, and not everything that is function invariant. In particular, the frame pointer and arg pointer are special cased; pic_offset_table_rtx is not, and we must not spill these things to memory.
Referenced by iv_analysis_done().
Referenced by do_output_reload().
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static |
Emit code to perform a reload from IN (which may be a reload register) to OUT (which may also be a reload register). IN or OUT is from operand OPNUM with reload type TYPE. Returns first insn emitted.
If IN is a paradoxical SUBREG, remove it and try to put the
opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. How to do this reload can get quite tricky. Normally, we are being
asked to reload a simple operand, such as a MEM, a constant, or a pseudo
register that didn't get a hard register. In that case we can just
call emit_move_insn.
We can also be asked to reload a PLUS that adds a register or a MEM to
another register, constant or MEM. This can occur during frame pointer
elimination and while reloading addresses. This case is handled by
trying to emit a single insn to perform the add. If it is not valid,
we use a two insn sequence.
Or we can be asked to reload an unary operand that was a fragment of
an addressing mode, into a register. If it isn't recognized as-is,
we try making the unop operand and the reload-register the same:
(set reg:X (unop:X expr:Y))
-> (set reg:Y expr:Y) (set reg:X (unop:X reg:Y)).
Finally, we could be called to handle an 'o' constraint by putting
an address into a register. In that case, we first try to do this
with a named pattern of "reload_load_address". If no such pattern
exists, we just emit a SET insn and hope for the best (it will normally
be valid on machines that use 'o').
This entire process is made complex because reload will never
process the insns we generate here and so we must ensure that
they will fit their constraints and also by the fact that parts of
IN might be being reloaded separately and replaced with spill registers.
Because of this, we are, in some sense, just guessing the right approach
here. The one listed above seems to work.
??? At some point, this whole thing needs to be rethought. We need to compute the sum of a register or a MEM and another
register, constant, or MEM, and put it into the reload
register. The best possible way of doing this is if the machine
has a three-operand ADD insn that accepts the required operands.
The simplest approach is to try to generate such an insn and see if it
is recognized and matches its constraints. If so, it can be used.
It might be better not to actually emit the insn unless it is valid,
but we need to pass the insn as an operand to `recog' and
`extract_insn' and it is simpler to emit and then delete the insn if
not valid than to dummy things up. Since constraint checking is strict, commutativity won't be
checked, so we need to do that here to avoid spurious failure
if the add instruction is two-address and the second operand
of the add is the same as the reload reg, which is frequently
the case. If the insn would be A = B + A, rearrange it so
it will be A = A + B as constrain_operands expects. If that failed, we must use a conservative two-insn sequence.
Use a move to copy one operand into the reload register. Prefer
to reload a constant, MEM or pseudo since the move patterns can
handle an arbitrary operand. If OP1 is not a constant, MEM or
pseudo and OP1 is not a valid operand for an add instruction, then
reload OP1.
After reloading one of the operands into the reload register, add
the reload register to the output register.
If there is another way to do this for a specific machine, a
DEFINE_PEEPHOLE should be specified that recognizes the sequence
we emit below. If OP0 and OP1 are the same, we can use OUT for OP1.
This fixes a problem on the 32K where the stack pointer cannot
be used as an operand of an add insn. Add a REG_EQUIV note so that find_equiv_reg can find it.
If that failed, copy the address register to the reload register.
Then add the constant to the reload register. If we need a memory location to do the move, do it that way.
Get the memory to use and rewrite both registers to its mode.
First, try a plain SET.
If that failed, move the inner operand to the reload
register, and try the same unop with the inner expression
replaced with the reload register. If IN is a simple operand, use gen_move_insn.
IN may contain a LABEL_REF, if so add a REG_LABEL_OPERAND note.
Otherwise, just write (set OUT IN) and hope for the best.
Return the first insn emitted.
We can not just return get_last_insn, because there may have
been multiple instructions emitted. Also note that gen_move_insn may
emit more than one insn itself, so we can not assume that there is one
insn emitted per emit_insn_before call.
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@verbatim
The function returns TRUE if chain of reload R1 and R2 (in any order) can be evaluated without usage of intermediate register for the reload containing another reload. It is important to see gen_reload to understand what the function is trying to do. As an example, let us have reload chain
r2: const r1: <something> + const
and reload R2 got reload reg HR. The function returns true if there is a correct insn HR = HR + <something>. Otherwise, gen_reload will use intermediate register (and this is the reload reg for R1) to reload <something>.
We need this function to find a conflict for chain reloads. In our example, if HR = HR + <something> is incorrect insn, then we cannot use HR as a reload register for R2. If we do use it then we get a wrong code:
HR = const HR = <something> HR = HR + HR
Assume other cases in gen_reload are not possible for
chain reloads or do need an intermediate hard registers. Make r2 a component of r1.
If IN is a paradoxical SUBREG, remove it and try to put the
opposite SUBREG on OUT. Likewise for a paradoxical SUBREG on OUT. We want constrain operands to treat this insn strictly in
its validity determination, i.e., the way it would after
reload has completed. Restore the original value at each changed address within R1.
References n_reloads, and reg_overlap_mentioned_p().
| void grow_reg_equivs | ( | void | ) |
Grow (or allocate) the REG_EQUIVS array from its current size (which may be zero elements) to MAX_REG_NUM elements. Initialize all new fields to NULL and update REG_EQUIVS_SIZE.
Referenced by memref_referenced_p().
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Determine if the current function has an exception receiver block that reaches the exit block via non-exceptional edges
If we're not optimizing, then just err on the safe side.
First determine which blocks can reach exit via normal paths.
Place the exit block on our worklist.
Iterate: find everything reachable from what we've already seen.
Now see if there's a reachable block with an exceptional incoming
edge. No exceptional block reached exit unexceptionally.
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Output reload-insns to reload VALUE into RELOADREG. VALUE is an autoincrement or autodecrement RTX whose operand is a register or memory location; so reloading involves incrementing that location. IN is either identical to VALUE, or some cheaper place to reload from. INC_AMOUNT is the number to increment or decrement by (always positive). This cannot be deduced from VALUE.
REG or MEM to be copied and incremented.
Nonzero if increment after copying.
No hard register is equivalent to this register after
inc/dec operation. If REG_LAST_RELOAD_REG were nonzero,
we could inc/dec that register as well (maybe even using it for
the source), but I'm not sure it's worth worrying about. If this is post-increment, first copy the location to the reload reg.
See if we can directly increment INCLOC. Use a method similar to
that in gen_reload. If this is a pre-increment and we have incremented the value
where it lives, copy the incremented value to RELOADREG to
be used as an address. If couldn't do the increment directly, must increment in RELOADREG.
The way we do this depends on whether this is pre- or post-increment.
For pre-increment, copy INCLOC to the reload register, increment it
there, then save back. Postincrement.
Because this might be a jump insn or a compare, and because RELOADREG
may not be available after the insn in an input reload, we must do
the incrementation before the insn being reloaded for.
We have already copied IN to RELOADREG. Increment the copy in
RELOADREG, save that back, then decrement RELOADREG so it has
the original value.
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A reload copies values of MODE from register SRC to register DEST. Return true if it can be treated for inheritance purposes like a group of reloads, each one reloading a single hard register. The caller has already checked that (reg:MODE SRC) and (reg:MODE DEST) occupy the same number of hard registers.
References gen_rtx_REG(), get_secondary_mem(), and reg_or_subregno().
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Initialize the table of registers to eliminate. Pre-condition: global flag frame_pointer_needed has been set before calling this function.
Count the number of eliminable registers and build the FROM and TO
REG rtx's. Note that code in gen_rtx_REG will cause, e.g.,
gen_rtx_REG (Pmode, STACK_POINTER_REGNUM) to equal stack_pointer_rtx.
We depend on this.
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Find all the pseudo registers that didn't get hard regs but do have known equivalent constants or memory slots. These include parameters (known equivalent to parameter slots) and cse'd or loop-moved constant memory addresses. Record constant equivalents in reg_equiv_constant so they will be substituted by find_reloads. Record memory equivalents in reg_mem_equiv so they can be substituted eventually by altering the REG-rtx's.
Allocate the tables used to store offset information at labels.
Look for REG_EQUIV notes; record what each pseudo is equivalent to. If DO_SUBREGS is true, also find all paradoxical subregs and find largest such for each pseudo. FIRST is the head of the insn list.
We may introduce USEs that we want to remove at the end, so
we'll mark them with QImode. Make sure there are no
previously-marked insns left by say regmove. If flag_pic and we have constant, verify it's legitimate.
It can happen that a REG_EQUIV note contains a MEM
that is not a legitimate memory operand. As later
stages of reload assume that all addresses found
in the reg_equiv_* arrays were originally legitimate,
we ignore such REG_EQUIV notes. Always unshare the equivalence, so we can
substitute into this insn without touching the
equivalence. This is PLUS of frame pointer and a constant,
and might be shared. Unshare it.
| void init_reload | ( | void | ) |
Initialize the reload pass. This is called at the beginning of compilation and may be called again if the target is reinitialized.
Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
Set spill_indirect_levels to the number of levels such addressing is
permitted, zero if it is not permitted at all. See if indirect addressing is valid for (MEM (SYMBOL_REF ...)).
See if reg+reg is a valid (and offsettable) address.
This way, we make sure that reg+reg is an offsettable address.
Initialize obstack for our rtl allocation.
| void mark_home_live | ( | ) |
Mark the slots in regs_ever_live for the hard regs used by pseudo-reg number REGNO.
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Mark the slots in regs_ever_live for the hard regs used by pseudo-reg number REGNO, accessed in MODE.
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Given X, a SET or CLOBBER of DEST, if DEST is the target of a register replacement we currently believe is valid, mark it as not eliminable if X modifies DEST in any way other than by adding a constant integer to it. If DEST is the frame pointer, we do nothing because we assume that all assignments to the hard frame pointer are nonlocal gotos and are being done at a time when they are valid and do not disturb anything else. Some machines want to eliminate a fake argument pointer with either the frame or stack pointer. Assignments to the hard frame pointer must not prevent this elimination. Called via note_stores from reload before starting its passes to scan the insns of the function.
A SUBREG of a hard register here is just changing its mode. We should
not see a SUBREG of an eliminable hard register, but check just in
case.
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Mark reg REGNO as in use for a reload of the sort spec'd by OPNUM and TYPE. MODE is used to indicate how many consecutive regs are actually used.
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Yet another special case. Unfortunately, reg-stack forces people to write incorrect clobbers in asm statements. These clobbers must not cause the register to appear in bad_spill_regs, otherwise we'll call fatal_insn later. We clear the corresponding regnos in the live register sets to avoid this. The whole thing is rather sick, I'm afraid.
First, make a mask of all stack regs that are clobbered.
Get the operand values and constraints out of the insn.
For every operand, see what registers are allowed.
For every alternative, we compute the class of registers allowed
for reloading in CLS, and merge its contents into the reg set
ALLOWED. End of one alternative - mark the regs in the current
class, and reset the class. Those of the registers which are clobbered, but allowed by the
constraints, must be usable as reload registers. So clear them
out of the life information.
References copy_reloads(), delete_insn(), eliminate_regs_in_insn(), find_reloads(), insn_chain::insn, insns_need_reload, ira_conflicts_p, ira_mark_memory_move_deletion(), n_reloads, insn_chain::n_reloads, insn_chain::need_elim, insn_chain::need_operand_change, insn_chain::need_reload, insn_chain::next, insn_chain::next_need_reload, num_eliminable_invariants, insn_chain::prev, reg_renumber, reload_insn_firstobj, reload_obstack, rtx_equal_p(), set_label_offsets(), spill_reg_order, unused_insn_chains, and update_eliminable_offsets().
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Allocate an empty insn_chain structure.
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Called through for_each_rtx, this function examines every reg that occurs in PX and adjusts the costs for its elimination which are gathered by IRA. DATA is the insn in which PX occurs. We do not recurse into MEM expressions.
References plus_constant(), elim_table::previous_offset, elim_table::ref_outside_mem, and elim_table::to_rtx.
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Calculate the SPILL_COST and SPILL_ADD_COST arrays and determine the contents of BAD_SPILL_REGS for the insn described by CHAIN.
Count number of uses of each hard reg by pseudo regs allocated to it
and then order them by decreasing use. First exclude hard registers
that are live in or across this insn. Now find out which pseudos are allocated to it, and update
hard_reg_n_uses.
| bool reload | ( | ) |
Main entry point for the reload pass. FIRST is the first insn of the function being compiled. GLOBAL nonzero means we were called from global_alloc and should attempt to reallocate any pseudoregs that we displace from hard regs we will use for reloads. If GLOBAL is zero, we do not have enough information to do that, so any pseudo reg that is spilled must go to the stack. Return value is TRUE if reload likely left dead insns in the stream and a DCE pass should be run to elimiante them. Else the return value is FALSE.
Make sure even insns with volatile mem refs are recognizable.
Make sure that the last insn in the chain
is not something that needs reloading. Enable find_equiv_reg to distinguish insns made by reload.
Initialize the secondary memory table.
We don't have a stack slot for any spill reg yet.
Initialize the save area information for caller-save, in case some
are needed. Compute which hard registers are now in use
as homes for pseudo registers.
This is done here rather than (eg) in global_alloc
because this point is reached even if not optimizing. A function that has a nonlocal label that can reach the exit
block via non-exceptional paths must save all call-saved
registers. Find all the pseudo registers that didn't get hard regs
but do have known equivalent constants or memory slots.
These include parameters (known equivalent to parameter slots)
and cse'd or loop-moved constant memory addresses.
Record constant equivalents in reg_equiv_constant
so they will be substituted by find_reloads.
Record memory equivalents in reg_mem_equiv so they can
be substituted eventually by altering the REG-rtx's. Alter each pseudo-reg rtx to contain its hard reg number. Assign
stack slots to the pseudos that lack hard regs or equivalents.
Do not touch virtual registers. Ask IRA to order pseudo-registers for better stack slot
sharing. If we have some registers we think can be eliminated, scan all insns to
see if there is an insn that sets one of these registers to something
other than itself plus a constant. If so, the register cannot be
eliminated. Doing this scan here eliminates an extra pass through the
main reload loop in the most common case where register elimination
cannot be done. Initialize to -1, which means take the first spill register.
Spill any hard regs that we know we can't eliminate.
There can be multiple ways to eliminate a register;
they should be listed adjacently.
Elimination for any register fails only if all possible ways fail. From now on, we may need to generate moves differently. We may also
allow modifications of insns which cause them to not be recognized.
Any such modifications will be cleaned up during reload itself. This loop scans the entire function each go-round
and repeats until one repetition spills no additional hard regs. For each pseudo register that has an equivalent location defined,
try to eliminate any eliminable registers (such as the frame pointer)
assuming initial offsets for the replacement register, which
is the normal case.
If the resulting location is directly addressable, substitute
the MEM we just got directly for the old REG.
If it is not addressable but is a constant or the sum of a hard reg
and constant, it is probably not addressable because the constant is
out of range, in that case record the address; we will generate
hairy code to compute the address in a register each time it is
needed. Similarly if it is a hard register, but one that is not
valid as an address register.
If the location is not addressable, but does not have one of the
above forms, assign a stack slot. We have to do this to avoid the
potential of producing lots of reloads if, e.g., a location involves
a pseudo that didn't get a hard register and has an equivalent memory
location that also involves a pseudo that didn't get a hard register.
Perhaps at some point we will improve reload_when_needed handling
so this problem goes away. But that's very hairy. Make a new stack slot. Then indicate that something
changed so we go back and recompute offsets for
eliminable registers because the allocation of memory
below might change some offset. reg_equiv_{mem,address}
will be set up for this pseudo on the next pass around
the loop. If we allocated another stack slot, redo elimination bookkeeping.
If we have a stack frame, we must align it now. The
stack size may be a part of the offset computation for
register elimination. So if this changes the stack size,
then repeat the elimination bookkeeping. We don't
realign when there is no stack, as that will cause a
stack frame when none is needed should
STARTING_FRAME_OFFSET not be already aligned to
STACK_BOUNDARY. That might have allocated new insn_chain structures.
Don't do it for IRA. We need this info because we don't
change live_throughout and dead_or_set for chains when IRA
is used. If we allocated any new memory locations, make another pass
since it might have changed elimination offsets. Even if the frame size remained the same, we might still have
changed elimination offsets, e.g. if find_reloads called
force_const_mem requiring the back end to allocate a constant
pool base register that needs to be saved on the stack. Regardless of the state of spills, if we previously had
a register that we thought we could eliminate, but now can
not eliminate, we must run another pass.
Consider pseudos which have an entry in reg_equiv_* which
reference an eliminable register. We must make another pass
to update reg_equiv_* so that we do not substitute in the
old value from when we thought the elimination could be
performed. If global-alloc was run, notify it of any register eliminations we have
done. If a pseudo has no hard reg, delete the insns that made the equivalence.
If that insn didn't set the register (i.e., it copied the register to
memory), just delete that insn instead of the equivalencing insn plus
anything now dead. If we call delete_dead_insn on that insn, we may
delete the insn that actually sets the register if the register dies
there and that is incorrect. If we already deleted the insn or if it may trap, we can't
delete it. The latter case shouldn't happen, but can
if an insn has a variable address, gets a REG_EH_REGION
note added to it, and then gets converted into a load
from a constant address. Use the reload registers where necessary
by generating move instructions to move the must-be-register
values into or out of the reload registers. If we were able to eliminate the frame pointer, show that it is no
longer live at the start of any basic block. If it ls live by
virtue of being in a pseudo, that pseudo will be marked live
and hence the frame pointer will be known to be live via that
pseudo. Come here (with failure set nonzero) if we can't get enough spill
regs. Now eliminate all pseudo regs by modifying them into
their equivalent memory references.
The REG-rtx's for the pseudos are modified in place,
so all insns that used to refer to them now refer to memory.
For a reg that has a reg_equiv_address, all those insns
were changed by reloading so that no insns refer to it any longer;
but the DECL_RTL of a variable decl may refer to it,
and if so this causes the debugging info to mention the variable. We don't want complex addressing modes in debug insns
if simpler ones will do, so delegitimize equivalences
in debug insns. Make sure the next ref is for a different instruction,
so that we're not affected by the rescan. We must set reload_completed now since the cleanup_subreg_operands call
below will re-recognize each insn and reload may have generated insns
which are only valid during and after reload. Make a pass over all the insns and delete all USEs which we inserted
only to tag a REG_EQUAL note on them. Remove all REG_DEAD and REG_UNUSED
notes. Delete all CLOBBER insns, except those that refer to the return
value and the special mem:BLK CLOBBERs added to prevent the scheduler
from misarranging variable-array code, and simplify (subreg (reg))
operands. Strip and regenerate REG_INC notes that may have been moved
around. We mark with QImode USEs introduced by reload itself.
Some CLOBBERs may survive until here and still reference unassigned
pseudos with const equivalent, which may in turn cause ICE in later
passes if the reference remains in place. Discard obvious no-ops, even without -O. This optimization
is fast and doesn't interfere with debugging. Simplify (subreg (reg)) if it appears as an operand.
Clean up invalid ASMs so that they don't confuse later passes.
See PR 21299. If we are doing generic stack checking, give a warning if this
function's frame size is larger than we expect. Indicate that we no longer have known memory locations or constants.
Free all the insn_chain structures at once.
We've possibly turned single trapping insn into multiple ones.
Replacing pseudos with their memory equivalents might have
created shared rtx. Subsequent passes would get confused
by this, so unshare everything here. init_emit has set the alignment of the hard frame pointer
to STACK_BOUNDARY. It is very likely no longer valid if
the hard frame pointer was used for register allocation.
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Check if *RELOAD_REG is suitable as a scratch register for the reload pattern with insn_code ICODE, or alternatively, if alt_reload_reg is nonzero, if that is suitable. On success, change *RELOAD_REG to the adjusted register, and return true. Otherwise, return false.
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Check if *RELOAD_REG is suitable as an intermediate or scratch register of class NEW_CLASS with mode NEW_MODE. Or alternatively, if alt_reload_reg is nonzero, if that is suitable. On success, change *RELOAD_REG to the adjusted register, and return true. Otherwise, return false.
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Reload pseudo-registers into hard regs around each insn as needed. Additional register load insns are output before the insn that needs it and perhaps store insns after insns that modify the reloaded pseudo reg. reg_last_reload_reg and reg_reloaded_contents keep track of which registers are already available in reload registers. We update these for the reloads that we perform, as the insns are scanned.
Generate a marker insn that we will move around.
If we pass a label, copy the offsets from the label information
into the current offsets of each elimination. If this is a USE and CLOBBER of a MEM, ensure that any
references to eliminable registers have been removed. If we need to do register elimination processing, do so.
This might delete the insn, in which case we are done. If need_elim is nonzero but need_reload is zero, one might think
that we could simply set n_reloads to 0. However, find_reloads
could have done some manipulation of the insn (such as swapping
commutative operands), and these manipulations are lost during
the first pass for every insn that needs register elimination.
So the actions of find_reloads must be redone here. First find the pseudo regs that must be reloaded for this insn.
This info is returned in the tables reload_... (see reload.h).
Also modify the body of INSN by substituting RELOAD
rtx's for those pseudo regs. ??? PREV can get deleted by reload inheritance.
Work around this by emitting a marker note. Now compute which reload regs to reload them into. Perhaps
reusing reload regs from previous insns, or else output
load insns to reload them. Maybe output store insns too.
Record the choices of reload reg in reload_reg_rtx. Generate the insns to reload operands into or out of
their reload regs. Substitute the chosen reload regs from reload_reg_rtx
into the insn's body (or perhaps into the bodies of other
load and store insn that we just made for reloading
and that we moved the structure into). Adjust the exception region notes for loads and stores.
Adjust the location of REG_ARGS_SIZE.
If this was an ASM, make sure that all the reload insns
we have generated are valid. If not, give an error
and delete them. Any previously reloaded spilled pseudo reg, stored in this insn,
is no longer validly lying around to save a future reload.
Note that this does not detect pseudos that were reloaded
for this insn in order to be stored in
(obeying register constraints). That is correct; such reload
registers ARE still valid. There may have been CLOBBER insns placed after INSN. So scan
between INSN and NEXT and use them to forget old reloads. Likewise for regs altered by auto-increment in this insn.
REG_INC notes have been changed by reloading:
find_reloads_address_1 records substitutions for them,
which have been performed by subst_reloads above. PRE_INC / PRE_DEC will have the reload register ending up
with the same value as the stack slot, but that doesn't
hold true for POST_INC / POST_DEC. Either we have to
convert the memory access to a true POST_INC / POST_DEC,
or we can't use the reload register for inheritance. Make sure it is the inc/dec pseudo, and not
some other (e.g. output operand) pseudo. We really want to ignore REG_INC notes here, so
use PATTERN (p) as argument to reg_set_p . We must also verify that the constraints
are met after the replacement. Make sure
extract_insn is only called for an insn
where the replacements were found to be
valid so far. If the constraints were not met, then
undo the replacement, else confirm it. Mark this as having an output reload so that the
REG_INC processing code below won't invalidate
the reload for inheritance. Make sure it is the inc/dec pseudo, and not
some other (e.g. output operand) pseudo. If for some reasons, we didn't set up
reg_last_reload_reg in this insn,
invalidate inheritance from previous
insns for the incremented/decremented
register. Such registers will be not in
reg_has_output_reload. Invalidate it
also if the corresponding element in
reg_reloaded_insn is also
invalidated. If a pseudo that got a hard register is auto-incremented,
we must purge records of copying it into pseudos without
hard registers. See if this pseudo reg was reloaded in this insn.
If so, its last-reload info is still valid
because it is based on this insn's reload. A reload reg's contents are unknown after a label.
Don't assume a reload reg is still good after a call insn
if it is a call-used reg, or if it contains a value that will
be partially clobbered by the call. If this is a call to a setjmp-type function, we must not
reuse any reload reg contents across the call; that will
just be clobbered by other uses of the register in later
code, before the longjmp. Clean up.
References nr, reg_is_output_reload, and reg_reloaded_valid.
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Comparison function for qsort to decide which of two reloads should be handled first. *P1 and *P2 are the reload numbers.
Consider required reloads before optional ones.
Count all solitary classes before non-solitary ones.
Aside from solitaires, consider all multi-reg groups first.
Consider reloads in order of increasing reg-class number.
If reloads are equally urgent, sort by reload number,
so that the results of qsort leave nothing to chance.
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Subroutine of free_for_value_p, used to check a single register. START_REGNO is the starting regno of the full reload register (possibly comprising multiple hard registers) that we are considering.
Set if we see an input reload that must not share its reload register
with any new earlyclobber, but might otherwise share the reload
register with an output or input-output reload. We use some pseudo 'time' value to check if the lifetimes of the
new register use would overlap with the one of a previous reload
that is not read-only or uses a different value.
The 'time' used doesn't have to be linear in any shape or form, just
monotonic.
Some reload types use different 'buckets' for each operand.
So there are MAX_RECOG_OPERANDS different time values for each
such reload type.
We compute TIME1 as the time when the register for the prospective
new reload ceases to be live, and TIME2 for each existing
reload as the time when that the reload register of that reload
becomes live.
Where there is little to be gained by exact lifetime calculations,
we just make conservative assumptions, i.e. a longer lifetime;
this is done in the 'default:' cases. RELOAD_FOR_OTHER_ADDRESS conflicts with RELOAD_OTHER reloads.
For each input, we may have a sequence of RELOAD_FOR_INPADDR_ADDRESS,
RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT. By adding 0 / 1 / 2 ,
respectively, to the time values for these, we get distinct time
values. To get distinct time values for each operand, we have to
multiply opnum by at least three. We round that up to four because
multiply by four is often cheaper. All RELOAD_FOR_INPUT reloads remain live till the instruction
executes (inclusive). opnum * 4 + 4
<= (MAX_RECOG_OPERANDS - 1) * 4 + 4 == MAX_RECOG_OPERANDS * 4 RELOAD_FOR_OPERAND_ADDRESS reloads are live even while the insn
is executed. If the other reload loads the same input value, that
will not cause a conflict only if it's loading it into
the same register. find_reloads makes sure that a
RELOAD_FOR_{INP,OP,OUT}ADDR_ADDRESS reload is only used
by at most one - the first -
RELOAD_FOR_{INPUT,OPERAND,OUTPUT}_ADDRESS . If the
address reload is inherited, the address address reload
goes away, so we can ignore this conflict. Unless the RELOAD_FOR_INPUT is an auto_inc expression.
Then the address address is still needed to store
back the new address. Likewise, if a RELOAD_FOR_INPUT can inherit a value, its
RELOAD_FOR_INPUT_ADDRESS / RELOAD_FOR_INPADDR_ADDRESS
reloads go away. Unless we are reloading an auto_inc expression.
rld[i].opnum * 4 + 4 <= (MAX_RECOG_OPERAND - 1) * 4 + 4
== MAX_RECOG_OPERAND * 4 All RELOAD_FOR_OUTPUT reloads become live just after the
instruction is executed. The first RELOAD_FOR_OUTADDR_ADDRESS reload conflicts with
the RELOAD_FOR_OUTPUT reloads, so assign it the same time
value. If there is no conflict in the input part, handle this
like an output reload. Earlyclobbered outputs must conflict with inputs.
RELOAD_OTHER might be live beyond instruction execution,
but this is not obvious when we set time2 = 1. So check
here if there might be a problem with the new reload
clobbering the register used by the RELOAD_OTHER. Earlyclobbered outputs must conflict with inputs.
Referenced by substitute().
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1 if reg REGNO is free as a reload reg for a reload of the sort specified by OPNUM and TYPE.
In use for a RELOAD_OTHER means it's not available for anything.
In use for anything means we can't use it for RELOAD_OTHER.
If it is used for some other input, can't use it.
If it is used in a later operand's address, can't use it.
Can't use a register if it is used for an input address for this
operand or used as an input in an earlier one. Can't use a register if it is used for an input address
for this operand or used as an input in an earlier
one. Can't use a register if it is used for an output address for this
operand or used as an output in this or a later operand. Note
that multiple output operands are emitted in reverse order, so
the conflicting ones are those with lower indices. Can't use a register if it is used for an output address
for this operand or used as an output in this or a
later operand. Note that multiple output operands are
emitted in reverse order, so the conflicting ones are
those with lower indices. This cannot share a register with RELOAD_FOR_INSN reloads, other
outputs, or an operand address for this or an earlier output.
Note that multiple output operands are emitted in reverse order,
so the conflicting ones are those with higher indices.
|
static |
Return 1 if the value in reload reg REGNO, as used by the reload with the number RELOADNUM, is still available in REGNO at the end of the insn. We can assume that the reload reg was already tested for availability at the time it is needed, and we should not check this again, in case the reg has already been marked in use.
See if there is a reload with the same type for this operand, using
the same register. This case is not handled by the code below. Since a RELOAD_OTHER reload claims the reg for the entire insn,
its value must reach the end. If this use is for part of the insn,
its value reaches if no subsequent part uses the same register.
Just like the above function, don't try to do this with lots
of fallthroughs. Here we check for everything else, since these don't conflict
with anything else and everything comes later. Similar, except that we check only for this and subsequent inputs
and the address of only subsequent inputs and we do not need
to check for RELOAD_OTHER objects since they are known not to
conflict. Reload register of reload with type RELOAD_FOR_INPADDR_ADDRESS
could be killed if the register is also used by reload with type
RELOAD_FOR_INPUT_ADDRESS, so check it. Similar to input address, except we start at the next operand for
both input and input address and we do not check for
RELOAD_FOR_OPERAND_ADDRESS and RELOAD_FOR_INSN since these
would conflict. ... fall through ...
Check outputs and their addresses.
These conflict with other outputs with RELOAD_OTHER. So
we need only check for output addresses. ... fall through ...
We already know these can't conflict with a later output. So the
only thing to check are later output addresses.
Note that multiple output operands are emitted in reverse order,
so the conflicting ones are those with lower indices. Reload register of reload with type RELOAD_FOR_OUTADDR_ADDRESS
could be killed if the register is also used by reload with type
RELOAD_FOR_OUTPUT_ADDRESS, so check it.
|
static |
Like reload_reg_reaches_end_p, but check that the condition holds for every register in REG.
|
static |
|
static |
Return 1 if the reloads denoted by R1 and R2 cannot share a register. Return 0 otherwise. This function uses the same algorithm as reload_reg_free_p above.
RELOAD_OTHER conflicts with everything.
Otherwise, check conflicts differently for each type.
|
static |
Returns whether R1 and R2 are uniquely chained: the value of one
is used by the other, and that value is not used by any other
reload for this insn. This is used to partially undo the decision
made in find_reloads when in the case of multiple
RELOAD_FOR_OPERAND_ADDRESS reloads it converts all
RELOAD_FOR_OPADDR_ADDR reloads into RELOAD_FOR_OPERAND_ADDRESS
reloads. This code tries to avoid the conflict created by that
change. It might be cleaner to explicitly keep track of which
RELOAD_FOR_OPADDR_ADDR reload is associated with which
RELOAD_FOR_OPERAND_ADDRESS reload, rather than to try to detect
this after the fact. We only check input reloads.
Avoid anything with output reloads.
"chained" means one reload is a component of the other reload,
not the same as the other reload. The following loop assumes that r1 is the reload that feeds r2.
Look for input reloads that aren't our two
If our reload is mentioned at all, it isn't a simple chain.
References earlyclobber_operand_p(), and rld.
|
static |
Replace all pseudos found in LOC with their corresponding equivalences.
Process each of our operands recursively.
References bb_has_abnormal_pred(), edge_def::flags, basic_block_def::flags, free(), basic_block_def::preds, edge_def::src, and worklist.
|
static |
If X is not a subreg, return it unmodified. If it is a subreg, look up whether we made a replacement for the SUBREG_REG. Return either the replacement or the SUBREG_REG.
References spill_reg_order.
|
static |
|
static |
Find all paradoxical subregs within X and update reg_max_ref_width.
References add_reg_note(), and reg_is_output_reload.
|
static |
Try to satisfy the needs for each insn.
|
static |
Subroutine of set_initial_label_offsets called via for_each_eh_label.
|
static |
Reset all offsets on eliminable registers to their initial values.
References copy_rtx(), and num_eliminable_invariants.
|
static |
Initialize the known label offsets. Set a known offset for each forced label to be at the initial offset of each elimination. We do this because we assume that all computed jumps occur from a location where each elimination is at its initial offset. For all other labels, show that we don't know the offsets.
Referenced by alter_reg(), and maybe_fix_stack_asms().
|
static |
This function handles the tracking of elimination offsets around branches. X is a piece of RTL being scanned. INSN is the insn that it came from, if any. INITIAL_P is nonzero if we are to set the offset to be the initial offset and zero if we are setting the offset of the label to be the current offset.
... fall through ...
If we know nothing about this label, set the desired offsets. Note
that this sets the offset at a label to be the offset before a label
if we don't know anything about the label. This is not correct for
the label after a BARRIER, but is the best guess we can make. If
we guessed wrong, we will suppress an elimination that might have
been possible had we been able to guess correctly. Otherwise, if this is the definition of a label and it is
preceded by a BARRIER, set our offsets to the known offset of
that label. If neither of the above cases is true, compare each offset
with those previously recorded and suppress any eliminations
where the offsets disagree. ... fall through ...
Any labels mentioned in REG_LABEL_OPERAND notes can be branched
to indirectly and hence must have all eliminations at their
initial offsets. Each of the labels in the parallel or address vector must be
at their initial offsets. We want the first field for PARALLEL
and ADDR_VEC and the second field for ADDR_DIFF_VEC. We only care about setting PC. If the source is not RETURN,
IF_THEN_ELSE, or a label, disable any eliminations not at
their initial offsets. Similarly if any arm of the IF_THEN_ELSE
isn't one of those possibilities. For branches to a label,
call ourselves recursively.
Note that this can disable elimination unnecessarily when we have
a non-local goto since it will look like a non-constant jump to
someplace in the current function. This isn't a significant
problem since such jumps will normally be when all elimination
pairs are back to their initial offsets. If we reach here, all eliminations must be at their initial
offset because we are doing a jump to a variable address.
References alter_reg(), elim_table::can_eliminate, copy_rtx(), current_function_decl, eliminate_regs_1(), form_sum(), elim_table::from_rtx, plus_constant(), elim_table::previous_offset, reg_renumber, and elim_table::to_rtx.
|
static |
Referenced by alter_reg().
|
static |
Set all elimination offsets to the known values for the code label given by INSN.
|
static |
|
static |
I is the index in SPILL_REG_RTX of the reload register we are to allocate for reload R. If it's valid, get an rtx for it. Return nonzero if successful.
regno is 'set but not used' if HARD_REGNO_MODE_OK doesn't use its first
parameter. Detect when the reload reg can't hold the reload mode.
This used to be one `if', but Sequent compiler can't handle that. If rld[r].in has VOIDmode, it means we will load it
in whatever mode the reload reg has: to wit, rld[r].mode.
We have already tested that for validity. Aside from that, we need to test that the expressions
to reload from or into have modes which are valid for this
reload register. Otherwise the reload insns would be invalid. The reg is OK.
Mark as in use for this insn the reload regs we use
for this.
|
static |
|
static |
Handle the failure to find a register to spill. INSN should be one of the insns which needed this particular spill reg.
References mode_for_size().
|
static |
|
static |
Kick all pseudos out of hard register REGNO. If CANT_ELIMINATE is nonzero, it means that we are doing this spill because we found we can't eliminate some register. In the case, no pseudos are allowed to be in the register, even if they are only in a block that doesn't require spill registers, unlike the case when we are spilling this hard reg to produce another spill register. Return nonzero if any pseudos needed to be kicked out.
Spill every pseudo reg that was allocated to this reg
or to something that overlaps this reg.
References eliminate_regs(), eliminate_regs_in_insn(), forget_old_reloads_1(), insn_chain::need_elim, note_stores(), num_eliminable_invariants, and update_eliminable_offsets().
|
static |
*OP_PTR and *OTHER_PTR are two operands to a conceptual reload. If *OP_PTR is a paradoxical subreg, try to remove that subreg and apply the corresponding narrowing subreg to *OTHER_PTR. Return true if the operands were changed, false otherwise.
If the lowpart operation turned a hard register into a subreg,
rather than simplifying it to another hard register, then the
mode change cannot be properly represented. For example, OTHER
might be valid in its current mode, but not in the new one.
|
static |
The recursive function change all occurrences of WHAT in *WHERE to REPL.
Record the location of the changed rtx.
References reload_reg_free_for_value_p().
|
static |
Loop through all elimination pairs. Recalculate the number not at initial offset. Compute the maximum offset (minimum offset if the stack does not grow downward) for each elimination pair.
References elim_table::can_eliminate, elim_table::from, elim_table::from_rtx, gen_rtx_REG(), elim_table::to, and elim_table::to_rtx.
Referenced by maybe_fix_stack_asms(), and spill_hard_reg().
|
static |
|
static |
See if anything that happened changes which eliminations are valid. For example, on the SPARC, whether or not the frame pointer can be eliminated can depend on what registers have been used. We need not check some conditions again (such as flag_omit_frame_pointer) since they can't have changed.
Look for the case where we have discovered that we can't replace
register A with register B and that means that we will now be
trying to replace register A with register C. This means we can
no longer replace register C with register B and we need to disable
such an elimination, if it exists. This occurs often with A == ap,
B == sp, and C == fp. Find the current elimination for ep->from, if there is a
new one. See if there is an elimination of NEW_TO -> EP->TO. If so,
disable it. See if any registers that we thought we could eliminate the previous
time are no longer eliminable. If so, something has changed and we
must spill the register. Also, recompute the number of eliminable
registers and see if the frame pointer is needed; it is if there is
no elimination of the frame pointer that we can perform. If we didn't need a frame pointer last time, but we do now, spill
the hard frame pointer.
|
static |
Verify that the initial elimination offsets did not change since the last call to set_initial_elim_offsets. This is used to catch cases where something illegal happened during reload_as_needed that could cause incorrect code to be generated if we did not check for it.
|
static |
This reg set indicates registers that can't be used as spill registers for the currently processed insn. These are the hard registers which are live during the insn, but not allocated to pseudos, as well as fixed registers.
|
static |
These are the hard registers that can't be used as spill register for any insn. This includes registers used for user variables and registers that we can't eliminate. A register that appears in this set also can't be used to retry register allocation.
| int caller_save_needed |
Flag set by local-alloc or global-alloc if anything is live in a call-clobbered reg across calls.
|
static |
Record which pseudos changed their allocation in finish_spills.
| struct target_reload default_target_reload |
@verbatim
Reload pseudo regs into hard regs for insns that require hard regs. Copyright (C) 1987-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
This file contains the reload pass of the compiler, which is run after register allocation has been done. It checks that each insn is valid (operands required to be in registers really are in registers of the proper class) and fixes up invalid ones by copying values temporarily into registers for the insns that need them. The results of register allocation are described by the vector reg_renumber; the insns still contain pseudo regs, but reg_renumber can be used to find which hard reg, if any, a pseudo reg is in. The technique we always use is to free up a few hard regs that are called ``reload regs'', and for each place where a pseudo reg must be in a hard reg, copy it temporarily into one of the reload regs. Reload regs are allocated locally for every instruction that needs reloads. When there are pseudos which are allocated to a register that has been chosen as a reload reg, such pseudos must be ``spilled''. This means that they go to other hard regs, or to stack slots if no other available hard regs can be found. Spilling can invalidate more insns, requiring additional need for reloads, so we must keep checking until the process stabilizes. For machines with different classes of registers, we must keep track of the register class needed for each reload, and make sure that we allocate enough reload registers of each class. The file reload.c contains the code that checks one insn for validity and reports the reloads that it needs. This file is in charge of scanning the entire rtl code, accumulating the reload needs, spilling, assigning reload registers to use for fixing up each insn, and generating the new insns to copy values into the reload registers.
|
static |
Global variables used by reload and its subroutines.
The current basic block while in calculate_elim_costs_all_insns.
|
static |
Nonzero means we couldn't get enough spill regs.
|
static |
For each label, we record the offset of each elimination. If we reach a label by more than one path and an offset differs, we cannot do the elimination. This information is indexed by the difference of the number of the label and the first label number. We can't offset the pointer itself as this can cause problems on machines with segmented memory. The first table is an array of flags that records whether we have yet encountered a label and the second table is an array of arrays, one entry in the latter array for each elimination.
Referenced by alter_reg().
|
static |
Map of hard regno to pseudo regno currently occupying the hard reg.
|
static |
|
static |
|
static |
These arrays are filled by emit_reload_insns and its subroutines.
|
static |
List of all insns needing reloads.
Referenced by maybe_fix_stack_asms().
|
static |
Index of last register assigned as a spill register. We allocate in a round-robin fashion.
|
static |
Number of spill-regs so far; number of valid elements of spill_regs.
|
static |
TRUE if we potentially left dead insns in the insn stream and want to run DCE immediately after reload, FALSE otherwise.
|
static |
Values to be put in spill_reg_store are put here first. Instructions must only be placed here if the associated reload register reaches the end of the instruction's reload sequence.
|
static |
Count the number of registers that we may be able to eliminate.
|
static |
And the number of registers that are equivalent to a constant that can be eliminated to frame_pointer / arg_pointer + constant.
Referenced by maybe_fix_stack_asms(), set_initial_elim_offsets(), and spill_hard_reg().
|
static |
Number of labels in the current function.
| int num_not_at_initial_offset |
Record the number of pending eliminations that have an offset not equal to their initial offset. If nonzero, we use a new copy of each replacement result in any insns encountered.
|
static |
Referenced by alter_reg().
|
static |
Referenced by alter_reg().
|
static |
|
static |
|
static |
|
static |
|
static |
|
static |
|
static |
|
static |
|
static |
This vector of reg sets indicates, for each pseudo, which hard registers may not be used for retrying global allocation because they are used as spill registers during one of the insns in which the pseudo is live.
Referenced by elimination_target_reg_p().
|
static |
This vector of reg sets indicates, for each pseudo, which hard registers may not be used for retrying global allocation because the register was formerly spilled from one of them. If we allowed reallocating a pseudo to a register that it was already allocated to, reload might not terminate.
|
static |
Used for communication between order_regs_for_reload and count_pseudo. Used to avoid counting one pseudo twice.
|
static |
|
static |
| vec<reg_equivs_t, va_gc>* reg_equivs |
|
static |
Elt N nonzero if reg_last_reload_reg[N] has been set in this insn for an output reload that stores into reg N.
|
static |
Indicates which hard regs are reload-registers for an output reload in the current insn.
Referenced by reload_as_needed(), and scan_paradoxical_subregs().
|
static |
During reload_as_needed, element N contains a REG rtx for the hard reg into which reg N has been reloaded (perhaps for a previous insn).
|
static |
Widest width in which each pseudo reg is referred to (via subreg).
|
static |
Vector to remember old contents of reg_renumber before spilling.
|
static |
Indicate whether the register's current value is one that is not safe to retain across a call, even for registers that are normally call-saved. This is only meaningful for members of reg_reloaded_valid.
Referenced by fixup_eh_region_note().
|
static |
During reload_as_needed, element N contains the last pseudo regno reloaded into hard register N. If that pseudo reg occupied more than one register, reg_reloaded_contents points to that pseudo for each spill register in use; all of these must remain set for an inheritance to occur.
|
static |
Indicate if the register was dead at the end of the reload. This is only valid if reg_reloaded_contents is set and valid.
|
static |
|
static |
During reload_as_needed, element N contains the insn for which hard register N was last used. Its contents are significant only when reg_reloaded_valid is set for this register.
|
static |
Indicate if reg_reloaded_insn / reg_reloaded_contents is valid.
Referenced by fixup_eh_region_note(), and reload_as_needed().
|
static |
Records which hard regs are used in any way, either as explicit use or by being allocated to a pseudo during any point of the current insn.
| int reload_first_uid |
First uid used by insns created by reload in this function. Used in find_equiv_reg.
|
static |
The point after all insn_chain structures. Used to quickly deallocate memory allocated in copy_reloads during calculate_needs_all_insns.
| int reload_in_progress = 0 |
Set to 1 while reload_as_needed is operating. Required by some machines to handle any generated moves differently.
Referenced by canonicalize_change_group(), constrain_operands(), and set_storage_via_setmem().
|
static |
For an inherited reload, this is the insn the reload was inherited from, if we know it. Otherwise, this is 0.
|
static |
Indexed by reload number, 1 if incoming value inherited from previous insns.
| struct insn_chain* reload_insn_chain |
List of insn_chain instructions, one for every insn that reload needs to examine.
Referenced by saved_hard_reg_compare_func().
|
static |
This points before all local rtl generated by register elimination. Used to quickly free all memory after processing one insn.
Referenced by maybe_fix_stack_asms().
|
static |
This obstack is used for allocation of rtl during register elimination. The allocated storage can be freed once find_reloads has processed the insn.
Referenced by maybe_fix_stack_asms().
|
static |
Vector of reload-numbers showing the order in which the reloads should be processed.
|
static |
If nonzero, this is a place to get the value of the reload, rather than using reload_in.
|
static |
Index X is the value of rld[X].reg_rtx, adjusted for the input mode.
|
static |
Index X is the value of rld[X].reg_rtx, adjusted for the output mode.
|
static |
The following HARD_REG_SETs indicate when each hard register is used for a reload of various parts of the current insn.
If reg is unavailable for all reloads.
|
static |
If reg is in use as a reload reg for a RELOAD_OTHER reload.
|
static |
If reg is in use as a reload reg for any sort of reload.
|
static |
If reg is use as an inherited reload. We just mark the first register in the group.
|
static |
If reg is in use for a RELOAD_FOR_INPADDR_ADDRESS reload for operand I.
|
static |
If reg is in use for a RELOAD_FOR_INPUT reload for operand I.
|
static |
If reg is in use for a RELOAD_FOR_INPUT_ADDRESS reload for operand I.
|
static |
If reg is in use for a RELOAD_FOR_INSN reload.
|
static |
If reg is in use for a RELOAD_FOR_OPERAND_ADDRESS reload.
|
static |
If reg is in use for a RELOAD_FOR_OPADDR_ADDR reload.
|
static |
If reg is in use for a RELOAD_FOR_OTHER_ADDRESS reload.
|
static |
If reg is in use for a RELOAD_FOR_OUTADDR_ADDRESS reload for operand I.
|
static |
If reg is in use for a RELOAD_FOR_OUTPUT reload for operand I.
|
static |
If reg is in use for a RELOAD_FOR_OUTPUT_ADDRESS reload for operand I.
|
static |
For each reload, the hard register number of the register used, or -1 if we did not need a register for this reload.
|
static |
Points to the beginning of the reload_obstack. All insn_chain structures are allocated first.
|
static |
Set during calculate_needs if an insn needs register elimination.
|
static |
Set during calculate_needs if an insn needs an operand changed.
|
static |
Set by alter_regs if we spilled a register to the stack.
|
static |
When spilling multiple hard registers, we use SPILL_COST for the first spilled hard reg and SPILL_ADD_COST for subsequent regs. SPILL_ADD_COST only the first hard reg for a multi-reg pseudo.
|
static |
The cost of spilling each hard reg.
|
static |
This table is the inverse mapping of spill_regs: indexed by hard reg number, it contains the position of that reg in spill_regs, or -1 for something that is not in spill_regs. ?!? This is no longer accurate.
Referenced by maybe_fix_stack_asms(), and replaced_subreg().
|
static |
In parallel with spill_regs, contains REG rtx's for those regs. Holds the last rtx used for any given reg, or 0 if it has never been used for spilling yet. This rtx is reused, provided it has the proper mode.
|
static |
In parallel with spill_regs, contains nonzero for a spill reg that was stored after the last time it was used. The precise value is the insn generated to do the store.
|
static |
This is the register that was stored with spill_reg_store. This is a copy of reload_out / reload_out_reg when the value was stored; if reload_out is a MEM, spill_reg_stored_to will be set to reload_out_reg.
|
static |
Describes order of use of registers for reloading of spilled pseudo-registers. `n_spills' is the number of elements that are actually valid; new ones are added at the end. Both spill_regs and spill_reg_order are used on two occasions: once during find_reload_regs, where they keep track of the spill registers for a single insn, but also during reload_as_needed where they show all the registers ever used by reload. For the latter case, the information is calculated during finish_spills.
|
static |
Record the stack slot for each spilled hard register.
|
static |
Width allocated so far for that stack slot.
Referenced by delete_caller_save_insns().
|
static |
Record which pseudos needed to be spilled.
Referenced by remove_pseudos().
|
static |
Temporary array of pseudo-register number.
| struct target_reload* this_target_reload = &default_target_reload |
|
static |
List of insn chains that are currently unused.
Referenced by maybe_fix_stack_asms().
|
static |
All hard regs that have been used as spill registers for any insn are marked in this set.
|
static |
This is used to keep track of the spill regs used in one insn.
1.8.1.1