GCC Middle and Back End API Reference
rtl.h File Reference

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Data Structures

struct  addr_diff_vec_flags
struct  mem_attrs
struct  reg_attrs
union  rtunion_def
struct  block_symbol
struct  object_block
struct  rtx_def
union  rtx_def::u
struct  rtvec_def
struct  full_rtx_costs
struct  address_info
struct  replace_label_data
struct  subreg_info
struct  target_rtl
struct  rtl_hooks


typedef struct mem_attrs mem_attrs
typedef struct reg_attrs reg_attrs
typedef union rtunion_def rtunion
typedef struct replace_label_data replace_label_data
typedef int(* rtx_function )(rtx *, void *)
typedef int(* for_each_inc_dec_fn )(rtx mem, rtx op, rtx dest, rtx src, rtx srcoff, void *arg)
typedef int(* rtx_equal_p_callback_function )(const_rtx *, const_rtx *, rtx *, rtx *)
typedef int(* hash_rtx_callback_function )(const_rtx, enum machine_mode, rtx *, enum machine_mode *)


enum  rtx_code { LAST_AND_UNUSED_RTX_CODE }
enum  rtx_class {
enum  reg_note { REG_NOTE_MAX }
enum  insn_note { NOTE_INSN_MAX }
enum  global_rtl_index {
enum  libcall_type {


void rtl_check_failed_bounds (const_rtx, int, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_type1 (const_rtx, int, int, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_type2 (const_rtx, int, int, int, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_code1 (const_rtx, enum rtx_code, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_code2 (const_rtx, enum rtx_code, enum rtx_code, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_code_mode (const_rtx, enum rtx_code, enum machine_mode, bool, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_block_symbol (const char *, int, const char *) ATTRIBUTE_NORETURN
void rtvec_check_failed_bounds (const_rtvec, int, const char *, int, const char *) ATTRIBUTE_NORETURN
void rtl_check_failed_flag (const char *, const_rtx, const char *, int, const char *) ATTRIBUTE_NORETURN
static unsigned int rhs_regno ()
static void init_costs_to_max ()
static void init_costs_to_zero ()
static bool costs_lt_p (struct full_rtx_costs *a, struct full_rtx_costs *b, bool speed)
static void costs_add_n_insns ()
void init_rtlanal (void)
int rtx_cost (rtx, enum rtx_code, int, bool)
int address_cost (rtx, enum machine_mode, addr_space_t, bool)
void get_full_rtx_cost (rtx, enum rtx_code, int, struct full_rtx_costs *)
unsigned int subreg_lsb (const_rtx)
unsigned int subreg_lsb_1 (enum machine_mode, enum machine_mode, unsigned int)
unsigned int subreg_regno_offset (unsigned int, enum machine_mode, unsigned int, enum machine_mode)
bool subreg_offset_representable_p (unsigned int, enum machine_mode, unsigned int, enum machine_mode)
unsigned int subreg_regno (const_rtx)
int simplify_subreg_regno (unsigned int, enum machine_mode, unsigned int, enum machine_mode)
unsigned int subreg_nregs (const_rtx)
unsigned int subreg_nregs_with_regno (unsigned int, const_rtx)
unsigned HOST_WIDE_INT nonzero_bits (const_rtx, enum machine_mode)
unsigned int num_sign_bit_copies (const_rtx, enum machine_mode)
bool constant_pool_constant_p (rtx)
bool truncated_to_mode (enum machine_mode, const_rtx)
int low_bitmask_len (enum machine_mode, unsigned HOST_WIDE_INT)
void split_double (rtx, rtx *, rtx *)
rtxstrip_address_mutations (rtx *, enum rtx_code *=0)
void decompose_address (struct address_info *, rtx *, enum machine_mode, addr_space_t, enum rtx_code)
void decompose_lea_address (struct address_info *, rtx *)
void decompose_mem_address (struct address_info *, rtx)
void update_address (struct address_info *)
HOST_WIDE_INT get_index_scale (const struct address_info *)
enum rtx_code get_index_code (const struct address_info *)
static int set_rtx_cost ()
static void get_full_set_rtx_cost ()
static int set_src_cost ()
static void get_full_set_src_cost ()
HOST_WIDE_INT trunc_int_for_mode (HOST_WIDE_INT, enum machine_mode)
rtx plus_constant (enum machine_mode, rtx, HOST_WIDE_INT)
rtx rtx_alloc_stat (RTX_CODE MEM_STAT_DECL)
rtvec rtvec_alloc (int)
rtvec shallow_copy_rtvec (rtvec)
bool shared_const_p (const_rtx)
rtx copy_rtx (rtx)
void dump_rtx_statistics (void)
rtx copy_rtx_if_shared (rtx)
unsigned int rtx_size (const_rtx)
rtx shallow_copy_rtx_stat (const_rtx MEM_STAT_DECL)
int rtx_equal_p (const_rtx, const_rtx)
hashval_t iterative_hash_rtx (const_rtx, hashval_t)
rtvec gen_rtvec_v (int, rtx *)
rtx gen_reg_rtx (enum machine_mode)
rtx gen_rtx_REG_offset (rtx, enum machine_mode, unsigned int, int)
rtx gen_reg_rtx_offset (rtx, enum machine_mode, int)
rtx gen_reg_rtx_and_attrs (rtx)
rtx gen_label_rtx (void)
rtx gen_lowpart_common (enum machine_mode, rtx)
rtx gen_lowpart_if_possible (enum machine_mode, rtx)
rtx gen_highpart (enum machine_mode, rtx)
rtx gen_highpart_mode (enum machine_mode, enum machine_mode, rtx)
rtx operand_subword (rtx, unsigned int, int, enum machine_mode)
rtx operand_subword_force (rtx, unsigned int, enum machine_mode)
bool paradoxical_subreg_p (const_rtx)
int subreg_lowpart_p (const_rtx)
unsigned int subreg_lowpart_offset (enum machine_mode, enum machine_mode)
unsigned int subreg_highpart_offset (enum machine_mode, enum machine_mode)
int byte_lowpart_offset (enum machine_mode, enum machine_mode)
rtx make_safe_from (rtx, rtx)
rtx convert_memory_address_addr_space (enum machine_mode, rtx, addr_space_t)
const char * get_insn_name (int)
rtx get_last_insn_anywhere (void)
rtx get_first_nonnote_insn (void)
rtx get_last_nonnote_insn (void)
void start_sequence (void)
void push_to_sequence (rtx)
void push_to_sequence2 (rtx, rtx)
void end_sequence (void)
double_int rtx_to_double_int (const_rtx)
rtx immed_double_int_const (double_int, enum machine_mode)
rtx immed_double_const (HOST_WIDE_INT, HOST_WIDE_INT, enum machine_mode)
rtx lowpart_subreg (enum machine_mode, rtx, enum machine_mode)
rtx force_const_mem (enum machine_mode, rtx)
rtx get_pool_constant (rtx)
rtx get_pool_constant_mark (rtx, bool *)
enum machine_mode get_pool_mode (const_rtx)
rtx simplify_subtraction (rtx)
void decide_function_section (tree)
rtx assign_stack_local (enum machine_mode, HOST_WIDE_INT, int)
rtx assign_stack_local_1 (enum machine_mode, HOST_WIDE_INT, int, int)
rtx assign_stack_temp (enum machine_mode, HOST_WIDE_INT)
rtx assign_stack_temp_for_type (enum machine_mode, HOST_WIDE_INT, tree)
rtx assign_temp (tree, int, int)
rtx emit_insn_before (rtx, rtx)
rtx emit_insn_before_noloc (rtx, rtx, basic_block)
rtx emit_insn_before_setloc (rtx, rtx, int)
rtx emit_jump_insn_before (rtx, rtx)
rtx emit_jump_insn_before_noloc (rtx, rtx)
rtx emit_jump_insn_before_setloc (rtx, rtx, int)
rtx emit_call_insn_before (rtx, rtx)
rtx emit_call_insn_before_noloc (rtx, rtx)
rtx emit_call_insn_before_setloc (rtx, rtx, int)
rtx emit_debug_insn_before (rtx, rtx)
rtx emit_debug_insn_before_noloc (rtx, rtx)
rtx emit_debug_insn_before_setloc (rtx, rtx, int)
rtx emit_barrier_before (rtx)
rtx emit_label_before (rtx, rtx)
rtx emit_note_before (enum insn_note, rtx)
rtx emit_insn_after (rtx, rtx)
rtx emit_insn_after_noloc (rtx, rtx, basic_block)
rtx emit_insn_after_setloc (rtx, rtx, int)
rtx emit_jump_insn_after (rtx, rtx)
rtx emit_jump_insn_after_noloc (rtx, rtx)
rtx emit_jump_insn_after_setloc (rtx, rtx, int)
rtx emit_call_insn_after (rtx, rtx)
rtx emit_call_insn_after_noloc (rtx, rtx)
rtx emit_call_insn_after_setloc (rtx, rtx, int)
rtx emit_debug_insn_after (rtx, rtx)
rtx emit_debug_insn_after_noloc (rtx, rtx)
rtx emit_debug_insn_after_setloc (rtx, rtx, int)
rtx emit_barrier_after (rtx)
rtx emit_label_after (rtx, rtx)
rtx emit_note_after (enum insn_note, rtx)
rtx emit_insn (rtx)
rtx emit_debug_insn (rtx)
rtx emit_jump_insn (rtx)
rtx emit_call_insn (rtx)
rtx emit_label (rtx)
rtx emit_jump_table_data (rtx)
rtx emit_barrier (void)
rtx emit_note (enum insn_note)
rtx emit_note_copy (rtx)
rtx gen_clobber (rtx)
rtx emit_clobber (rtx)
rtx gen_use (rtx)
rtx emit_use (rtx)
rtx make_insn_raw (rtx)
void add_function_usage_to (rtx, rtx)
rtx last_call_insn (void)
rtx previous_insn (rtx)
rtx next_insn (rtx)
rtx prev_nonnote_insn (rtx)
rtx prev_nonnote_insn_bb (rtx)
rtx next_nonnote_insn (rtx)
rtx next_nonnote_insn_bb (rtx)
rtx prev_nondebug_insn (rtx)
rtx next_nondebug_insn (rtx)
rtx prev_nonnote_nondebug_insn (rtx)
rtx next_nonnote_nondebug_insn (rtx)
rtx prev_real_insn (rtx)
rtx next_real_insn (rtx)
rtx prev_active_insn (rtx)
rtx next_active_insn (rtx)
int active_insn_p (const_rtx)
rtx next_cc0_user (rtx)
rtx prev_cc0_setter (rtx)
int insn_line (const_rtx)
const char * insn_file (const_rtx)
tree insn_scope (const_rtx)
enum rtx_code reverse_condition (enum rtx_code)
enum rtx_code reverse_condition_maybe_unordered (enum rtx_code)
enum rtx_code swap_condition (enum rtx_code)
enum rtx_code unsigned_condition (enum rtx_code)
enum rtx_code signed_condition (enum rtx_code)
void mark_jump_label (rtx, rtx, int)
rtx delete_related_insns (rtx)
rtxfind_constant_term_loc (rtx *)
rtx try_split (rtx, rtx, int)
rtx split_insns (rtx, rtx)
rtx simplify_const_unary_operation (enum rtx_code, enum machine_mode, rtx, enum machine_mode)
rtx simplify_unary_operation (enum rtx_code, enum machine_mode, rtx, enum machine_mode)
rtx simplify_const_binary_operation (enum rtx_code, enum machine_mode, rtx, rtx)
rtx simplify_binary_operation (enum rtx_code, enum machine_mode, rtx, rtx)
rtx simplify_ternary_operation (enum rtx_code, enum machine_mode, enum machine_mode, rtx, rtx, rtx)
rtx simplify_const_relational_operation (enum rtx_code, enum machine_mode, rtx, rtx)
rtx simplify_relational_operation (enum rtx_code, enum machine_mode, enum machine_mode, rtx, rtx)
rtx simplify_gen_binary (enum rtx_code, enum machine_mode, rtx, rtx)
rtx simplify_gen_unary (enum rtx_code, enum machine_mode, rtx, enum machine_mode)
rtx simplify_gen_ternary (enum rtx_code, enum machine_mode, enum machine_mode, rtx, rtx, rtx)
rtx simplify_gen_relational (enum rtx_code, enum machine_mode, enum machine_mode, rtx, rtx)
rtx simplify_subreg (enum machine_mode, rtx, enum machine_mode, unsigned int)
rtx simplify_gen_subreg (enum machine_mode, rtx, enum machine_mode, unsigned int)
rtx simplify_replace_fn_rtx (rtx, const_rtx, rtx(*fn)(rtx, const_rtx, void *), void *)
rtx simplify_replace_rtx (rtx, const_rtx, rtx)
rtx simplify_rtx (const_rtx)
rtx avoid_constant_pool_reference (rtx)
rtx delegitimize_mem_from_attrs (rtx)
bool mode_signbit_p (enum machine_mode, const_rtx)
bool val_signbit_p (enum machine_mode, unsigned HOST_WIDE_INT)
bool val_signbit_known_set_p (enum machine_mode, unsigned HOST_WIDE_INT)
bool val_signbit_known_clear_p (enum machine_mode, unsigned HOST_WIDE_INT)
enum machine_mode choose_hard_reg_mode (unsigned int, unsigned int, bool)
rtx set_unique_reg_note (rtx, enum reg_note, rtx)
rtx set_dst_reg_note (rtx, enum reg_note, rtx, rtx)
void set_insn_deleted (rtx)
enum machine_mode get_address_mode (rtx mem)
int rtx_addr_can_trap_p (const_rtx)
bool nonzero_address_p (const_rtx)
int rtx_unstable_p (const_rtx)
bool rtx_varies_p (const_rtx, bool)
bool rtx_addr_varies_p (const_rtx, bool)
rtx get_call_rtx_from (rtx)
HOST_WIDE_INT get_integer_term (const_rtx)
rtx get_related_value (const_rtx)
bool offset_within_block_p (const_rtx, HOST_WIDE_INT)
void split_const (rtx, rtx *, rtx *)
bool unsigned_reg_p (rtx)
int reg_mentioned_p (const_rtx, const_rtx)
int count_occurrences (const_rtx, const_rtx, int)
int reg_referenced_p (const_rtx, const_rtx)
int reg_used_between_p (const_rtx, const_rtx, const_rtx)
int reg_set_between_p (const_rtx, const_rtx, const_rtx)
int commutative_operand_precedence (rtx)
bool swap_commutative_operands_p (rtx, rtx)
int modified_between_p (const_rtx, const_rtx, const_rtx)
int no_labels_between_p (const_rtx, const_rtx)
int modified_in_p (const_rtx, const_rtx)
int reg_set_p (const_rtx, const_rtx)
rtx single_set_2 (const_rtx, const_rtx)
int multiple_sets (const_rtx)
int set_noop_p (const_rtx)
int noop_move_p (const_rtx)
rtx find_last_value (rtx, rtx *, rtx, int)
int refers_to_regno_p (unsigned int, unsigned int, const_rtx, rtx *)
int reg_overlap_mentioned_p (const_rtx, const_rtx)
const_rtx set_of (const_rtx, const_rtx)
void record_hard_reg_sets (rtx, const_rtx, void *)
void record_hard_reg_uses (rtx *, void *)
void find_all_hard_reg_sets (const_rtx, HARD_REG_SET *)
void note_stores (const_rtx, void(*)(rtx, const_rtx, void *), void *)
void note_uses (rtx *, void(*)(rtx *, void *), void *)
int dead_or_set_p (const_rtx, const_rtx)
int dead_or_set_regno_p (const_rtx, unsigned int)
rtx find_reg_note (const_rtx, enum reg_note, const_rtx)
rtx find_regno_note (const_rtx, enum reg_note, unsigned int)
rtx find_reg_equal_equiv_note (const_rtx)
rtx find_constant_src (const_rtx)
int find_reg_fusage (const_rtx, enum rtx_code, const_rtx)
int find_regno_fusage (const_rtx, enum rtx_code, unsigned int)
rtx alloc_reg_note (enum reg_note, rtx, rtx)
void add_reg_note (rtx, enum reg_note, rtx)
void add_int_reg_note (rtx, enum reg_note, int)
void add_shallow_copy_of_reg_note (rtx, rtx)
void remove_note (rtx, const_rtx)
void remove_reg_equal_equiv_notes (rtx)
void remove_reg_equal_equiv_notes_for_regno (unsigned int)
int side_effects_p (const_rtx)
int volatile_refs_p (const_rtx)
int volatile_insn_p (const_rtx)
int may_trap_p_1 (const_rtx, unsigned)
int may_trap_p (const_rtx)
int may_trap_or_fault_p (const_rtx)
bool can_throw_internal (const_rtx)
bool can_throw_external (const_rtx)
bool insn_could_throw_p (const_rtx)
bool insn_nothrow_p (const_rtx)
bool can_nonlocal_goto (const_rtx)
void copy_reg_eh_region_note_forward (rtx, rtx, rtx)
void copy_reg_eh_region_note_backward (rtx, rtx, rtx)
int inequality_comparisons_p (const_rtx)
rtx replace_rtx (rtx, rtx, rtx)
int replace_label (rtx *, void *)
int rtx_referenced_p (rtx, rtx)
bool tablejump_p (const_rtx, rtx *, rtx *)
int computed_jump_p (const_rtx)
int for_each_rtx (rtx *, rtx_function, void *)
int for_each_inc_dec (rtx *, for_each_inc_dec_fn, void *arg)
int rtx_equal_p_cb (const_rtx, const_rtx, rtx_equal_p_callback_function)
unsigned hash_rtx_cb (const_rtx, enum machine_mode, int *, int *, bool, hash_rtx_callback_function)
rtx regno_use_in (unsigned int, rtx)
int auto_inc_p (const_rtx)
int in_expr_list_p (const_rtx, const_rtx)
void remove_node_from_expr_list (const_rtx, rtx *)
int loc_mentioned_in_p (rtx *, const_rtx)
rtx find_first_parameter_load (rtx, rtx)
bool keep_with_call_p (const_rtx)
bool label_is_jump_target_p (const_rtx, const_rtx)
int insn_rtx_cost (rtx, bool)
rtx canonicalize_condition (rtx, rtx, int, rtx *, rtx, int, int)
rtx get_condition (rtx, rtx *, int, int)
void subreg_get_info (unsigned int, enum machine_mode, unsigned int, enum machine_mode, struct subreg_info *)
void free_EXPR_LIST_list (rtx *)
void free_INSN_LIST_list (rtx *)
void free_EXPR_LIST_node (rtx)
void free_INSN_LIST_node (rtx)
rtx alloc_INSN_LIST (rtx, rtx)
rtx copy_INSN_LIST (rtx)
rtx concat_INSN_LIST (rtx, rtx)
rtx alloc_EXPR_LIST (int, rtx, rtx)
void remove_free_INSN_LIST_elem (rtx, rtx *)
rtx remove_list_elem (rtx, rtx *)
rtx remove_free_INSN_LIST_node (rtx *)
rtx remove_free_EXPR_LIST_node (rtx *)
bool resize_reg_info (void)
void free_reg_info (void)
void init_subregs_of_mode (void)
void finish_subregs_of_mode (void)
rtx extract_asm_operands (rtx)
int asm_noperands (const_rtx)
const char * decode_asm_operands (rtx, rtx *, rtx **, const char **, enum machine_mode *, location_t *)
enum reg_class reg_preferred_class (int)
enum reg_class reg_alternate_class (int)
enum reg_class reg_allocno_class (int)
void setup_reg_classes (int, enum reg_class, enum reg_class, enum reg_class)
void split_all_insns (void)
unsigned int split_all_insns_noflow (void)
static struct mem_attrsget_mem_attrs ()
rtx gen_rtx_CONST_INT (enum machine_mode, HOST_WIDE_INT)
rtx gen_rtx_CONST_VECTOR (enum machine_mode, rtvec)
rtx gen_raw_REG (enum machine_mode, int)
rtx gen_rtx_REG (enum machine_mode, unsigned)
rtx gen_rtx_SUBREG (enum machine_mode, rtx, int)
rtx gen_rtx_MEM (enum machine_mode, rtx)
rtx output_constant_def (tree, int)
rtx lookup_constant_def (tree)
int rtx_to_tree_code (enum rtx_code)
int delete_trivially_dead_insns (rtx, int)
int exp_equiv_p (const_rtx, const_rtx, int, bool)
unsigned hash_rtx (const_rtx x, enum machine_mode, int *, int *, bool)
bool check_for_inc_dec (rtx insn)
int comparison_dominates_p (enum rtx_code, enum rtx_code)
bool jump_to_label_p (rtx)
int condjump_p (const_rtx)
int any_condjump_p (const_rtx)
int any_uncondjump_p (const_rtx)
rtx pc_set (const_rtx)
rtx condjump_label (const_rtx)
int simplejump_p (const_rtx)
int returnjump_p (rtx)
int eh_returnjump_p (rtx)
int onlyjump_p (const_rtx)
int only_sets_cc0_p (const_rtx)
int sets_cc0_p (const_rtx)
int invert_jump_1 (rtx, rtx)
int invert_jump (rtx, rtx, int)
int rtx_renumbered_equal_p (const_rtx, const_rtx)
int true_regnum (const_rtx)
unsigned int reg_or_subregno (const_rtx)
int redirect_jump_1 (rtx, rtx)
void redirect_jump_2 (rtx, rtx, rtx, int, int)
int redirect_jump (rtx, rtx, int)
void rebuild_jump_labels (rtx)
void rebuild_jump_labels_chain (rtx)
rtx reversed_comparison (const_rtx, enum machine_mode)
enum rtx_code reversed_comparison_code (const_rtx, const_rtx)
enum rtx_code reversed_comparison_code_parts (enum rtx_code, const_rtx, const_rtx, const_rtx)
void delete_for_peephole (rtx, rtx)
int condjump_in_parallel_p (const_rtx)
int max_reg_num (void)
int max_label_num (void)
int get_first_label_num (void)
void maybe_set_first_label_num (rtx)
void delete_insns_since (rtx)
void mark_reg_pointer (rtx, int)
void mark_user_reg (rtx)
void reset_used_flags (rtx)
void set_used_flags (rtx)
void reorder_insns (rtx, rtx, rtx)
void reorder_insns_nobb (rtx, rtx, rtx)
int get_max_insn_count (void)
int in_sequence_p (void)
void init_emit (void)
void init_emit_regs (void)
void init_emit_once (void)
void push_topmost_sequence (void)
void pop_topmost_sequence (void)
void set_new_first_and_last_insn (rtx, rtx)
unsigned int unshare_all_rtl (void)
void unshare_all_rtl_again (rtx)
void unshare_all_rtl_in_chain (rtx)
void verify_rtl_sharing (void)
void add_insn (rtx)
void add_insn_before (rtx, rtx, basic_block)
void add_insn_after (rtx, rtx, basic_block)
void remove_insn (rtx)
rtx emit (rtx)
void delete_insn (rtx)
rtx entry_of_function (void)
void emit_insn_at_entry (rtx)
void delete_insn_chain (rtx, rtx, bool)
rtx unlink_insn_chain (rtx, rtx)
void delete_insn_and_edges (rtx)
rtx gen_lowpart_SUBREG (enum machine_mode, rtx)
rtx gen_const_mem (enum machine_mode, rtx)
rtx gen_frame_mem (enum machine_mode, rtx)
rtx gen_tmp_stack_mem (enum machine_mode, rtx)
bool validate_subreg (enum machine_mode, enum machine_mode, const_rtx, unsigned int)
unsigned int extended_count (const_rtx, enum machine_mode, int)
rtx remove_death (unsigned int, rtx)
void dump_combine_stats (FILE *)
void dump_combine_total_stats (FILE *)
rtx make_compound_operation (rtx, enum rtx_code)
void delete_dead_jumptables (void)
void schedule_insns (void)
void schedule_ebbs (void)
void sel_sched_fix_param (const char *param, const char *val)
void debug (const rtx_def &ref)
void debug (const rtx_def *ptr)
void debug_rtx (const_rtx)
void debug_rtx_list (const_rtx, int)
void debug_rtx_range (const_rtx, const_rtx)
const_rtx debug_rtx_find (const_rtx, int)
void print_mem_expr (FILE *, const_tree)
void print_rtl (FILE *, const_rtx)
void print_simple_rtl (FILE *, const_rtx)
int print_rtl_single (FILE *, const_rtx)
int print_rtl_single_with_indent (FILE *, const_rtx, int)
void print_inline_rtx (FILE *, const_rtx, int)
void dump_value_slim (FILE *, const_rtx, int)
void dump_insn_slim (FILE *, const_rtx)
void dump_rtl_slim (FILE *, const_rtx, const_rtx, int, int)
void print_value (pretty_printer *, const_rtx, int)
void print_pattern (pretty_printer *, const_rtx, int)
void print_insn (pretty_printer *, const_rtx, int)
void rtl_dump_bb_for_graph (pretty_printer *, basic_block)
const char * str_pattern_slim (const_rtx)
void reposition_prologue_and_epilogue_notes (void)
int prologue_epilogue_contains (const_rtx)
int sibcall_epilogue_contains (const_rtx)
void update_temp_slot_address (rtx, rtx)
void maybe_copy_prologue_epilogue_insn (rtx, rtx)
void set_return_jump_label (rtx)
void expand_null_return (void)
void expand_naked_return (void)
void emit_jump (rtx)
rtx move_by_pieces (rtx, rtx, unsigned HOST_WIDE_INT, unsigned int, int)
HOST_WIDE_INT find_args_size_adjust (rtx)
int fixup_args_size_notes (rtx, rtx, int)
void print_rtl_with_bb (FILE *, const_rtx, int)
rtx duplicate_insn_chain (rtx, rtx)
void init_expmed (void)
void expand_inc (rtx, rtx)
void expand_dec (rtx, rtx)
void init_lower_subreg (void)
bool can_copy_p (enum machine_mode)
bool can_assign_to_reg_without_clobbers_p (rtx)
rtx fis_get_condition (rtx)
void mark_elimination (int, int)
int reg_classes_intersect_p (reg_class_t, reg_class_t)
int reg_class_subset_p (reg_class_t, reg_class_t)
void globalize_reg (tree, int)
void init_reg_modes_target (void)
void init_regs (void)
void reinit_regs (void)
void init_fake_stack_mems (void)
void save_register_info (void)
void init_reg_sets (void)
void regclass (rtx, int)
void reg_scan (rtx, unsigned int)
void fix_register (const char *, int, int)
bool invalid_mode_change_p (unsigned int, enum reg_class)
int function_invariant_p (const_rtx)
void emit_library_call (rtx, enum libcall_type, enum machine_mode, int,...)
rtx emit_library_call_value (rtx, rtx, enum libcall_type, enum machine_mode, int,...)
void init_varasm_once (void)
rtx make_debug_expr_from_rtl (const_rtx)
bool read_rtx (const char *, rtx *)
rtx canon_rtx (rtx)
int true_dependence (const_rtx, enum machine_mode, const_rtx)
rtx get_addr (rtx)
int canon_true_dependence (const_rtx, enum machine_mode, rtx, const_rtx, rtx)
int read_dependence (const_rtx, const_rtx)
int anti_dependence (const_rtx, const_rtx)
int canon_anti_dependence (const_rtx, bool, const_rtx, enum machine_mode, rtx)
int output_dependence (const_rtx, const_rtx)
int may_alias_p (const_rtx, const_rtx)
void init_alias_target (void)
void init_alias_analysis (void)
void end_alias_analysis (void)
void vt_equate_reg_base_value (const_rtx, const_rtx)
bool memory_modified_in_insn_p (const_rtx, const_rtx)
bool memory_must_be_modified_in_insn_p (const_rtx, const_rtx)
bool may_be_sp_based_p (rtx)
rtx gen_hard_reg_clobber (enum machine_mode, unsigned int)
rtx get_reg_known_value (unsigned int)
bool get_reg_known_equiv_p (unsigned int)
rtx get_reg_base_value (unsigned int)
int stack_regs_mentioned (const_rtx insn)
void invert_br_probabilities (rtx)
bool expensive_function_p (int)
unsigned int variable_tracking_main (void)
void get_mode_bounds (enum machine_mode, int, enum machine_mode, rtx *, rtx *)
rtx reversed_condition (rtx)
rtx compare_and_jump_seq (rtx, rtx, enum rtx_code, rtx, int, rtx)
rtx canon_condition (rtx)
void simplify_using_condition (rtx, rtx *, bitmap)
unsigned int compute_alignments (void)
void update_alignments (vec< rtx > &)
int asm_str_count (const char *templ)
void insn_locations_init (void)
void insn_locations_finalize (void)
void set_curr_insn_location (location_t)
location_t curr_insn_location (void)
bool optimize_insn_for_size_p (void)
bool optimize_insn_for_speed_p (void)
void _fatal_insn_not_found (const_rtx, const char *, int, const char *) ATTRIBUTE_NORETURN
void _fatal_insn (const char *, const_rtx, const char *, int, const char *) ATTRIBUTE_NORETURN


const unsigned char rtx_length [NUM_RTX_CODE]
const char *const rtx_name [NUM_RTX_CODE]
const char *const rtx_format [NUM_RTX_CODE]
enum rtx_class rtx_class [NUM_RTX_CODE]
const unsigned char rtx_code_size [NUM_RTX_CODE]
const unsigned char rtx_next [NUM_RTX_CODE]
const char *const reg_note_name []
const char *const note_insn_name [NOTE_INSN_MAX]
int generating_concat_p
int currently_expanding_to_rtl
location_t prologue_location
location_t epilogue_location
int split_branch_probability
rtx const_int_rtx [MAX_SAVED_CONST_INT *2+1]
rtx const_true_rtx
rtx const_tiny_rtx [4][(int) MAX_MACHINE_MODE]
rtx pc_rtx
rtx cc0_rtx
rtx ret_rtx
rtx simple_return_rtx
struct target_rtl default_target_rtl
struct target_rtlthis_target_rtl
int reload_completed
int epilogue_completed
int reload_in_progress
int lra_in_progress
int regstack_completed
int cse_not_expected
const char * print_rtx_head
HARD_REG_SET eliminable_regset
rtx stack_limit_rtx
struct rtl_hooks rtl_hooks
struct rtl_hooks general_rtl_hooks

Typedef Documentation

typedef int(* for_each_inc_dec_fn)(rtx mem, rtx op, rtx dest, rtx src, rtx srcoff, void *arg)
   Callback for for_each_inc_dec, to process the autoinc operation OP
   within MEM that sets DEST to SRC + SRCOFF, or SRC if SRCOFF is
   NULL.  The callback is passed the same opaque ARG passed to
   for_each_inc_dec.  Return zero to continue looking for other
   autoinc operations, -1 to skip OP's operands, and any other value
   to interrupt the traversal and return that value to the caller of
typedef int(* hash_rtx_callback_function)(const_rtx, enum machine_mode, rtx *, enum machine_mode *)
typedef struct mem_attrs mem_attrs
   Structure used to describe the attributes of a MEM.  These are hashed
   so MEMs that the same attributes share a data structure.  This means
   they cannot be modified in place.  
typedef struct reg_attrs reg_attrs
   Structure used to describe the attributes of a REG in similar way as
   mem_attrs does for MEM above.  Note that the OFFSET field is calculated
   in the same way as for mem_attrs, rather than in the same way as a
   SUBREG_BYTE.  For example, if a big-endian target stores a byte
   object in the low part of a 4-byte register, the OFFSET field
   will be -3 rather than 0.  
   Structure used for passing data to REPLACE_LABEL.  
typedef union rtunion_def rtunion
typedef int(* rtx_equal_p_callback_function)(const_rtx *, const_rtx *, rtx *, rtx *)
typedef int(* rtx_function)(rtx *, void *)

Enumeration Type Documentation

   Index labels for global_rtl.  
   For register elimination to work properly these hard_frame_pointer_rtx,
   frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
   the same register.  
   For register elimination to work properly these hard_frame_pointer_rtx,
   frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
   the same register.  
   For register elimination to work properly these hard_frame_pointer_rtx,
   frame_pointer_rtx, and arg_pointer_rtx must be the same if they refer to
   the same register.  
enum insn_note
   Codes that appear in the NOTE_KIND field for kinds of notes
   that are not line numbers.  These codes are all negative.

   Notice that we do not try to use zero here for any of
   the special note codes because sometimes the source line
   actually can be zero!  This happens (for example) when we
   are generating code for the per-translation-unit constructor
   and destructor routines for some C++ translation unit.  
enum label_kind
   Labels carry a two-bit field composed of the ->jump and ->call
   bits.  This field indicates whether the label is an alternate
   entry point, and if so, what kind.  
   In calls.c 
enum reg_note
enum rtx_class
   Register Transfer Language EXPRESSIONS CODE CLASSES 
     We check bit 0-1 of some rtx class codes in the predicates below.  
     Bit 0 = comparison if 0, arithmetic is 1
     Bit 1 = 1 if commutative.  
     Must follow the four preceding values.  
     Bit 0 = 1 if constant.  
enum rtx_code

Function Documentation

void _fatal_insn ( const char *  ,
const_rtx  ,
const char *  ,
int  ,
const char *   
     The above incremented error_count, but isn't an error that we want to
     count, so reset it here.  
void _fatal_insn_not_found ( const_rtx  ,
const char *  ,
int  ,
const char *   
int active_insn_p ( const_rtx  )
void add_function_usage_to ( rtx  ,
void add_insn ( rtx  )
void add_insn_after ( rtx  ,
rtx  ,
void add_insn_before ( rtx  ,
rtx  ,
void add_int_reg_note ( rtx  ,
enum  reg_note,

Referenced by next_real_insn().

void add_shallow_copy_of_reg_note ( rtx  ,
int address_cost ( rtx  ,
enum  machine_mode,
addr_space_t  ,
rtx alloc_EXPR_LIST ( int  ,
rtx  ,
rtx alloc_INSN_LIST ( rtx  ,
rtx alloc_reg_note ( enum  reg_note,
rtx  ,

Referenced by use_crosses_set_p().

int anti_dependence ( const_rtx  ,
int any_condjump_p ( const_rtx  )
int any_uncondjump_p ( const_rtx  )
int asm_noperands ( const_rtx  )
int asm_str_count ( const char *  templ)
rtx assign_stack_local ( enum  machine_mode,
   In function.c  
rtx assign_stack_local_1 ( enum machine_mode  mode,
int  align,
int  kind 
   Allocate a stack slot of SIZE bytes and return a MEM rtx for it
   with machine mode MODE.

   ALIGN controls the amount of alignment for the address of the slot:
   0 means according to MODE,
   -1 means use BIGGEST_ALIGNMENT and round size to multiple of that,
   -2 means use BITS_PER_UNIT,
   positive specifies alignment boundary in bits.

   KIND has ASLK_REDUCE_ALIGN bit set if it is OK to reduce
   alignment and ASLK_RECORD_PAD bit set if we should remember
   extra space we allocated for alignment purposes.  When we are
   called from assign_stack_temp_for_type, it is not set so we don't
   track the same stack slot in two independent lists.

   We do not round to stack_boundary here.  
     Ignore alignment if it exceeds MAX_SUPPORTED_STACK_ALIGNMENT.  
                 If stack is realigned and stack alignment value
                 hasn't been finalized, it is OK not to increase
                 stack_alignment_estimated.  The bigger alignment
                 requirement is recorded in stack_alignment_needed
                     It is OK to reduce the alignment as long as the
                     requested size is 0 or the estimated stack
                     alignment >= mode alignment.  
     On a big-endian machine, if we are allocating more space than we will use,
     use the least significant bytes of those that are allocated.  
     If we have already instantiated virtual registers, return the actual
     address relative to the frame pointer.  
rtx assign_stack_temp ( enum  machine_mode,
rtx assign_stack_temp_for_type ( enum machine_mode  mode,
tree  type 
   Allocate a temporary stack slot and record it for possible later

   MODE is the machine mode to be given to the returned rtx.

   SIZE is the size in units of the space required.  We do no rounding here
   since assign_stack_local will do any required rounding.

   TYPE is the type that will be used for the stack slot.  
     If SIZE is -1 it means that somebody tried to allocate a temporary
     of a variable size.  
     Try to find an available, already-allocated temporary of the proper
     mode which meets the size and alignment requirements.  Choose the
     smallest one with the closest alignment.

     If assign_stack_temp is called outside of the tree->rtl expansion,
     we cannot reuse the stack slots (that may still refer to
     Make our best, if any, the one to use.  
         If there are enough aligned bytes left over, make them into a new
         temp_slot so that the extra bytes don't get wasted.  Do this only
         for BLKmode slots, so that we can be sure of the alignment.  
     If we still didn't find one, make a new temporary.  
         We are passing an explicit alignment request to assign_stack_local.
         One side effect of that is assign_stack_local will not round SIZE
         to ensure the frame offset remains suitably aligned.

         So for requests which depended on the rounding of SIZE, we go ahead
         and round it now.  We also make sure ALIGNMENT is at least
         The following slot size computation is necessary because we don't
         know the actual size of the temporary slot until assign_stack_local
         has performed all the frame alignment and size rounding for the
         requested temporary.  Note that extra space added for alignment
         can be either above or below this stack slot depending on which
         way the frame grows.  We include the extra space if and only if it
         is above this slot.  
         Now define the fields used by combine_temp_slots.  
     Create a new MEM rtx to avoid clobbering MEM flags of old slots.  
     If we know the alias set for the memory that will be used, use
     it.  If there's no TYPE, then we don't know anything about the
     alias set for the memory.  
     If a type is specified, set the relevant flags.  
rtx assign_temp ( tree  type_or_decl,
int  memory_required,
int  dont_promote 
   Assign a temporary.
   If TYPE_OR_DECL is a decl, then we are doing it on behalf of the decl
   and so that should be used in error messages.  In either case, we
   allocate of the given type.
   MEMORY_REQUIRED is 1 if the result must be addressable stack memory;
   it is 0 if a register is OK.
   DONT_PROMOTE is 1 if we should not promote values in register
   to wider modes.  
         Zero sized arrays are GNU C extension.  Set size to 1 to avoid
         problems with allocating the stack space.  
         Unfortunately, we don't yet know how to allocate variable-sized
         temporaries.  However, sometimes we can find a fixed upper limit on
         the size, so try that instead.  
         The size of the temporary may be too large to fit into an integer.  
         ??? Not sure this should happen except for user silliness, so limit
         this to things that aren't compiler-generated temporaries.  The
         rest of the time we'll die in assign_stack_temp_for_type.  

References temp_slot::base_offset, cut_slot_from_list(), temp_slot::full_size, temp_slot::next, temp_slot::size, and temp_slot::slot.

Referenced by convert_tree_comp_to_rtx(), expand_value_return(), and initialize_argument_information().

int auto_inc_p ( const_rtx  )
rtx avoid_constant_pool_reference ( rtx  )
int byte_lowpart_offset ( enum machine_mode  outer_mode,
enum machine_mode  inner_mode 
   Return the number of bytes between the start of an OUTER_MODE
   in-memory value and the start of an INNER_MODE in-memory value,
   given that the former is a lowpart of the latter.  It may be a
   paradoxical lowpart, in which case the offset will be negative
   on big-endian targets.  

Referenced by set_reg_attrs_from_value().

bool can_assign_to_reg_without_clobbers_p ( rtx  )
bool can_copy_p ( enum  machine_mode)
   In gcse.c 
bool can_nonlocal_goto ( const_rtx  )
bool can_throw_external ( const_rtx  )
bool can_throw_internal ( const_rtx  )
int canon_anti_dependence ( const_rtx  mem,
bool  mem_canonicalized,
const_rtx  x,
enum machine_mode  x_mode,
rtx  x_addr 
   Likewise, but we already have a canonicalized MEM, and X_ADDR for X.
   Also, consider X in X_MODE (which might be from an enclosing
   If MEM_CANONICALIZED is true, MEM is canonicalized.  

Referenced by cselib_invalidate_regno().

rtx canon_condition ( rtx  )
   In loop-iv.c  
rtx canon_rtx ( rtx  )
   In alias.c 
int canon_true_dependence ( const_rtx  mem,
enum machine_mode  mem_mode,
rtx  mem_addr,
const_rtx  x,
rtx  x_addr 
   Canonical true dependence: X is read after store in MEM takes place.
   Variant of true_dependence which assumes MEM has already been
   canonicalized (hence we no longer do that here).
   The mem_addr argument has been added, since true_dependence_1 computed
   this value prior to canonicalizing.  
rtx canonicalize_condition ( rtx  insn,
rtx  cond,
int  reverse,
rtx earliest,
rtx  want_reg,
int  allow_cc_mode,
int  valid_at_insn_p 
   Given an insn and condition, return a canonical description of
   the test being made.  
   Given an insn INSN and condition COND, return the condition in a
   canonical form to simplify testing by callers.  Specifically:

   (1) The code will always be a comparison operation (EQ, NE, GT, etc.).
   (2) Both operands will be machine operands; (cc0) will have been replaced.
   (3) If an operand is a constant, it will be the second operand.
   (4) (LE x const) will be replaced with (LT x <const+1>) and similarly
       for GE, GEU, and LEU.

   If the condition cannot be understood, or is an inequality floating-point
   comparison which needs to be reversed, 0 will be returned.

   If REVERSE is nonzero, then reverse the condition prior to canonizing it.

   If EARLIEST is nonzero, it is a pointer to a place where the earliest
   insn used in locating the condition was found.  If a replacement test
   of the condition is desired, it should be placed in front of that
   insn and we will be sure that the inputs are still valid.

   If WANT_REG is nonzero, we wish the condition to be relative to that
   register, if possible.  Therefore, do not canonicalize the condition
   further.  If ALLOW_CC_MODE is nonzero, allow the condition returned
   to be a compare to a CC mode register.

   If VALID_AT_INSN_P, the condition must be valid at both *EARLIEST
   and at INSN.  
     If we are comparing a register with zero, see if the register is set
     in the previous insn to a COMPARE or a comparison operation.  Perform
     the same tests as a function of STORE_FLAG_VALUE as find_comparison_args
     in cse.c  
         Set nonzero when we find something of interest.  
         If comparison with cc0, import actual comparison from compare
         If this is a COMPARE, pick up the two things being compared.  
         Go back to the previous insn.  Stop if it is not an INSN.  We also
         stop if it isn't a single set or if it has a REG_INC note because
         we don't want to bother dealing with it.  
             In cfglayout mode, there do not have to be labels at the
             beginning of a block, or jumps at the end, so the previous
             conditions would not stop us when we reach bb boundary.  
         If this is setting OP0, get what it sets it to if it looks
             ??? We may not combine comparisons done in a CCmode with
             comparisons not done in a CCmode.  This is to aid targets
             like Alpha that have an IEEE compliant EQ instruction, and
             a non-IEEE compliant BEQ instruction.  The use of CCmode is
             actually artificial, simply to prevent the combination, but
             should not affect other platforms.

             However, we must allow VOIDmode comparisons to match either
             CCmode or non-CCmode comparison, because some ports have
             modeless comparisons inside branch patterns.

             ??? This mode check should perhaps look more like the mode check
             in simplify_comparison in combine.  
           If this sets OP0, but not directly, we have to give up.  
             If the caller is expecting the condition to be valid at INSN,
             make sure X doesn't change before INSN.  
     If constant is first, put it last.  
     If OP0 is the result of a comparison, we weren't able to find what
     was really being compared, so fail.  
     Canonicalize any ordered comparison with integers involving equality
     if we can do computations in the relevant mode and we do not
           When cross-compiling, const_val might be sign-extended from
     Never return CC0; return zero instead.  
bool check_for_inc_dec ( rtx  insn)
   In dse.c 
enum machine_mode choose_hard_reg_mode ( unsigned int  regno,
unsigned int  nregs,
bool  call_saved 
   In reginfo.c  
   Return a machine mode that is legitimate for hard reg REGNO and large
   enough to save nregs.  If we can't find one, return VOIDmode.
   If CALL_SAVED is true, only consider modes that are call saved.  
     We first look for the largest integer mode that can be validly
     held in REGNO.  If none, we look for the largest floating-point mode.
     If we still didn't find a valid mode, try CCmode.  
     Iterate over all of the CCmodes.  
     We can't find a mode valid for this register.  

Referenced by expand_builtin_dwarf_sp_column().

int commutative_operand_precedence ( rtx  )
rtx compare_and_jump_seq ( rtx  op0,
rtx  op1,
enum rtx_code  comp,
rtx  label,
int  prob,
rtx  cinsn 
   Prepare a sequence comparing OP0 with OP1 using COMP and jumping to LABEL if
   true, with probability PROB.  If CINSN is not NULL, it is the insn to copy
   in order to create a jump.  
         A hack -- there seems to be no easy generic way how to make a
         conditional jump from a ccmode comparison.  
int comparison_dominates_p ( enum  rtx_code,
enum  rtx_code 
   In jump.c 
unsigned int compute_alignments ( void  )
   In final.c  
   Compute branch alignments based on frequency information in the
     If not optimizing or optimizing for size, don't assign any alignments.  
         There are two purposes to align block with no fallthru incoming edge:
         1) to avoid fetch stalls when branch destination is near cache boundary
         2) to improve cache efficiency in case the previous block is not executed
            (so it does not need to be in the cache).

         We to catch first case, we align frequently executed blocks.
         To catch the second, we align blocks that are executed more frequently
         than the predecessor and the predecessor is likely to not be executed
         when function is called.  
         In case block is frequent and reached mostly by non-fallthru edge,
         align it.  It is most likely a first block of loop.  

References edge_def::flags.

int computed_jump_p ( const_rtx  )
rtx concat_INSN_LIST ( rtx  ,
int condjump_in_parallel_p ( const_rtx  )
rtx condjump_label ( const_rtx  )
int condjump_p ( const_rtx  )
bool constant_pool_constant_p ( rtx  )
rtx convert_memory_address_addr_space ( enum machine_mode  to_mode,
rtx  x,
addr_space_t  as 
   Given X, a memory address in address space AS' pointer mode, convert it to
   an address in the address space's address mode, or vice versa (TO_MODE says
   which way).  We take advantage of the fact that pointers are not allowed to
   overflow by commuting arithmetic operations over conversions so that address
   arithmetic insns can be used.  
     If X already has the right mode, just return it.  
     Here we handle some special cases.  If none of them apply, fall through
     to the default case.  
         FIXME: For addition, we used to permute the conversion and
         addition operation only if one operand is a constant and
         converting the constant does not change it or if one operand
         is a constant and we are using a ptr_extend instruction
         (POINTERS_EXTEND_UNSIGNED < 0) even if the resulting address
         may overflow/underflow.  We relax the condition to include
         zero-extend (POINTERS_EXTEND_UNSIGNED > 0) since the other
         parts of the compiler depend on it.  See PR 49721.

         We can always safely permute them if we are making the address

References convert_memory_address_addr_space(), and simplify_unary_operation().

Referenced by addr_expr_of_non_mem_decl_p_1(), and convert_memory_address_addr_space().

rtx copy_INSN_LIST ( rtx  )
void copy_reg_eh_region_note_backward ( rtx  ,
rtx  ,
void copy_reg_eh_region_note_forward ( rtx  ,
rtx  ,
rtx copy_rtx ( rtx  )
rtx copy_rtx_if_shared ( rtx  )
   In emit-rtl.c 
static void costs_add_n_insns ( )
   Increase both members of the full_rtx_costs structure C by the
   cost of N insns.  

Referenced by move2add_use_add3_insn().

static bool costs_lt_p ( struct full_rtx_costs a,
struct full_rtx_costs b,
bool  speed 
   Compare two full_rtx_costs structures A and B, returning true
   if A < B when optimizing for speed.  

Referenced by move2add_use_add3_insn().

int count_occurrences ( const_rtx  ,
const_rtx  ,
location_t curr_insn_location ( void  )
   Get current location.  

Referenced by find_auto_inc(), and mark_label_nuses().

int dead_or_set_p ( const_rtx  ,

Referenced by try_combine(), and use_crosses_set_p().

int dead_or_set_regno_p ( const_rtx  ,
unsigned  int 

Referenced by note_uses(), and use_crosses_set_p().

void debug ( const rtx_def ref)
void debug ( const rtx_def ptr)
void debug_rtx ( const_rtx  )
const_rtx debug_rtx_find ( const_rtx  ,
void debug_rtx_list ( const_rtx  ,
void debug_rtx_range ( const_rtx  ,
void decide_function_section ( tree  )
const char* decode_asm_operands ( rtx  body,
rtx operands,
rtx **  operand_locs,
const char **  constraints,
enum machine_mode *  modes,
location_t loc 
   Assuming BODY is an insn body that uses ASM_OPERANDS,
   copy its operands (both input and output) into the vector OPERANDS,
   the locations of the operands within the insn into the vector OPERAND_LOCS,
   and the constraints for the operands into CONSTRAINTS.
   Write the modes of the operands into MODES.
   Return the assembler-template.

   we don't store that info.  
         Zero output asm: BODY is (asm_operands ...).  
         Single output asm: BODY is (set OUTPUT (asm_operands ...)).  
         The output is in the SET.
         Its constraint is in the ASM_OPERANDS itself.  
               At least one output, plus some CLOBBERs.  The outputs are in
               the SETs.  Their constraints are in the ASM_OPERANDS itself.  

References address_operand(), asm_operand_ok(), len, memory_operand(), and offsettable_nonstrict_memref_p().

void decompose_address ( struct address_info info,
rtx loc,
enum machine_mode  mode,
addr_space_t  as,
enum rtx_code  outer_code 
   Describe address *LOC in *INFO.  MODE is the mode of the addressed value,
   or VOIDmode if not known.  AS is the address space associated with LOC.
   OUTER_CODE is MEM if *LOC is a MEM address and ADDRESS otherwise.  

Referenced by lsb_bitfield_op_p().

void decompose_lea_address ( struct address_info ,

Referenced by valid_address_p().

void decompose_mem_address ( struct address_info ,

Referenced by valid_address_p().

rtx delegitimize_mem_from_attrs ( rtx  )
void delete_dead_jumptables ( void  )
   In cfgcleanup.c  
   Delete any jump tables never referenced.  We can't delete them at the
   time of removing tablejump insn as they are referenced by the preceding
   insns computing the destination, so we delay deleting and garbagecollect
   them once life information is computed.  
     A dead jump table does not belong to any basic block.  Scan insns
     between two adjacent basic blocks.  
void delete_for_peephole ( rtx  ,
void delete_insn ( rtx  )
void delete_insn_and_edges ( rtx  )
void delete_insn_chain ( rtx  ,
rtx  ,
void delete_insns_since ( rtx  )
rtx delete_related_insns ( rtx  )
   In jump.c 
int delete_trivially_dead_insns ( rtx  ,
   In cse.c 
void dump_combine_stats ( FILE *  )
void dump_combine_total_stats ( FILE *  )
void dump_insn_slim ( FILE *  ,

Referenced by lra_inheritance().

void dump_rtl_slim ( FILE *  f,
const_rtx  first,
const_rtx  last,
int  count,
int  flags 
   Same as above, but stop at LAST or when COUNT == 0.
   If COUNT < 0 it will stop only at LAST or NULL rtx.  

References pp_write_text_as_dot_label_to_stream(), pp_write_text_to_stream(), and print_insn_with_notes().

Referenced by lra_get_insn_regs().

void dump_rtx_statistics ( void  )
void dump_value_slim ( FILE *  ,
const_rtx  ,
   Functions in sched-vis.c.  FIXME: Ideally these functions would
   not be in sched-vis.c but in rtl.c, because they are not only used
   by the scheduler anymore but for all "slim" RTL dumping.  

Referenced by valid_address_p().

rtx duplicate_insn_chain ( rtx  ,
int eh_returnjump_p ( rtx  )
rtx emit ( rtx  )
rtx emit_barrier ( void  )
   Make an insn of code BARRIER
   and add it to the end of the doubly-linked list.  

Referenced by emit_debug_insn(), expand_float(), and std_expand_builtin_va_start().

rtx emit_barrier_after ( rtx  )
rtx emit_barrier_before ( rtx  )
rtx emit_call_insn ( rtx  )
rtx emit_call_insn_after ( rtx  ,
rtx emit_call_insn_after_noloc ( rtx  ,
rtx emit_call_insn_after_setloc ( rtx  ,
rtx  ,
rtx emit_call_insn_before ( rtx  ,
rtx emit_call_insn_before_noloc ( rtx  ,
rtx emit_call_insn_before_setloc ( rtx  ,
rtx  ,
rtx emit_clobber ( rtx  )
rtx emit_debug_insn ( rtx  )
rtx emit_debug_insn_after ( rtx  ,
rtx emit_debug_insn_after_noloc ( rtx  ,
rtx emit_debug_insn_after_setloc ( rtx  ,
rtx  ,
rtx emit_debug_insn_before ( rtx  ,
rtx emit_debug_insn_before_noloc ( rtx  ,
rtx emit_debug_insn_before_setloc ( rtx  ,
rtx  ,
rtx emit_insn ( rtx  )
rtx emit_insn_after ( rtx  ,
rtx emit_insn_after_noloc ( rtx  ,
rtx  ,
rtx emit_insn_after_setloc ( rtx  ,
rtx  ,
void emit_insn_at_entry ( rtx  )
rtx emit_insn_before ( rtx  ,
   In emit-rtl.c 
rtx emit_insn_before_noloc ( rtx  ,
rtx  ,
rtx emit_insn_before_setloc ( rtx  ,
rtx  ,
void emit_jump ( rtx  )
rtx emit_jump_insn ( rtx  )
rtx emit_jump_insn_after ( rtx  ,
rtx emit_jump_insn_after_noloc ( rtx  ,
rtx emit_jump_insn_after_setloc ( rtx  ,
rtx  ,
rtx emit_jump_insn_before ( rtx  ,
rtx emit_jump_insn_before_noloc ( rtx  ,
rtx emit_jump_insn_before_setloc ( rtx  ,
rtx  ,
rtx emit_jump_table_data ( rtx  )
rtx emit_label ( rtx  )
rtx emit_label_after ( rtx  ,
rtx emit_label_before ( rtx  ,
void emit_library_call ( rtx  orgfun,
enum libcall_type  fn_type,
enum machine_mode  outmode,
int  nargs,
   Output a library call to function FUN (a SYMBOL_REF rtx)
   (emitting the queue unless NO_QUEUE is nonzero),
   for a value of mode OUTMODE,
   with NARGS different arguments, passed as alternating rtx values
   and machine_modes to convert them to.

   FN_TYPE should be LCT_NORMAL for `normal' calls, LCT_CONST for
   `const' calls, LCT_PURE for `pure' calls, or other LCT_ value for
   other types of library calls.  

Referenced by maybe_emit_sync_lock_test_and_set().

rtx emit_library_call_value ( rtx  orgfun,
rtx  value,
enum libcall_type  fn_type,
enum machine_mode  outmode,
int  nargs,
   Like emit_library_call except that an extra argument, VALUE,
   comes second and says where to store the result.
   (If VALUE is zero, this function chooses a convenient way
   to return the value.

   This function returns an rtx for where the value is to be found.
   If VALUE is nonzero, VALUE is returned.  
rtx emit_note ( enum  insn_note)
rtx emit_note_after ( enum  insn_note,
rtx emit_note_before ( enum  insn_note,
rtx emit_note_copy ( rtx  )
rtx emit_use ( rtx  )
void end_alias_analysis ( void  )

Referenced by pre_insert_copies().

void end_sequence ( void  )
   After emitting to a sequence, restore previous saved state.

   To get the contents of the sequence just made, you must call
   `get_insns' *before* calling here.

   If the compiler might have deferred popping arguments while
   generating this sequence, and this sequence will not be immediately
   inserted into the instruction stream, use do_pending_stack_adjust
   before calling get_insns.  That will ensure that the deferred
   pops are inserted into this sequence, and not into some random
   location in the instruction stream.  See INHIBIT_DEFER_POP for more
   information about deferred popping of arguments.  

Referenced by add_test(), convert_regs_entry(), emit_insn_before_setloc(), expand_atomic_load(), expand_builtin_sincos(), expand_ffs(), gmalloc(), init_set_costs(), move_insn_for_shrink_wrap(), noce_emit_store_flag(), noce_try_abs(), noce_try_addcc(), record_insns(), result_vector(), sjlj_assign_call_site_values(), split_iv(), and undo_transformations().

rtx entry_of_function ( void  )
   Return RTX to emit after when we want to emit code on the entry of function.  

Referenced by result_vector().

int exp_equiv_p ( const_rtx  ,
const_rtx  ,
int  ,
void expand_dec ( rtx  ,
void expand_inc ( rtx  ,
void expand_naked_return ( void  )
   Generate RTL to return directly from the current function.
   (That is, we bypass any return value.)  

References copy_blkmode_to_reg(), expand_null_return(), and expand_value_return().

void expand_null_return ( void  )
   In stmt.c 
   Generate RTL to return from the current function, with no value.
   (That is, we do not do anything about returning any value.)  
     If this function was declared to return a value, but we
     didn't, clobber the return registers so that they are not
     propagated live to the rest of the function.  

Referenced by expand_naked_return().

bool expensive_function_p ( int  )
unsigned int extended_count ( const_rtx  ,
enum  machine_mode,
   In combine.c  
rtx extract_asm_operands ( rtx  )
void find_all_hard_reg_sets ( const_rtx  ,
HOST_WIDE_INT find_args_size_adjust ( rtx  )
rtx find_constant_src ( const_rtx  )
rtx* find_constant_term_loc ( rtx )
   In recog.c  
rtx find_first_parameter_load ( rtx  ,
rtx find_last_value ( rtx  ,
rtx ,
rtx  ,
int find_reg_fusage ( const_rtx  ,
enum  rtx_code,
int find_regno_fusage ( const_rtx  ,
enum  rtx_code,
unsigned  int 
void finish_subregs_of_mode ( void  )
rtx fis_get_condition ( rtx  )
void fix_register ( const char *  ,
int  ,
int fixup_args_size_notes ( rtx  ,
rtx  ,
int for_each_inc_dec ( rtx x,
for_each_inc_dec_fn  fn,
void *  arg 
   Traverse *X looking for MEMs, and for autoinc operations within
   them.  For each such autoinc operation found, call FN, passing it
   the innermost enclosing MEM, the operation itself, the RTX modified
   by the operation, two RTXs (the second may be NULL) that, once
   added, represent the value to be held by the modified RTX
   afterwards, and ARG.  FN is to return -1 to skip looking for other
   autoinc operations within the visited operation, 0 to continue the
   traversal, or any other value to have it returned to the caller of
rtx force_const_mem ( enum  machine_mode,
   In varasm.c  

Referenced by emit_move_ccmode().

void free_EXPR_LIST_list ( rtx )
void free_EXPR_LIST_node ( rtx  )
void free_INSN_LIST_list ( rtx )
void free_INSN_LIST_node ( rtx  )
void free_reg_info ( void  )
   Free up register info memory.  
   Free up the space allocated by allocate_reg_info.  
int function_invariant_p ( const_rtx  )
   In reload1.c 
rtx gen_clobber ( rtx  )
rtx gen_const_mem ( enum  machine_mode,
rtx gen_frame_mem ( enum  machine_mode,
rtx gen_hard_reg_clobber ( enum  machine_mode,
unsigned  int 
rtx gen_highpart ( enum  machine_mode,
   In emit-rtl.c 
rtx gen_highpart_mode ( enum  machine_mode,
enum  machine_mode,
rtx gen_label_rtx ( void  )
   Return a newly created CODE_LABEL rtx with a unique label number.  

References len, SET, and verify_rtx_sharing().

Referenced by do_jump_by_parts_zero_rtx(), expand_float(), have_sub2_insn(), set_stack_check_libfunc(), and update_block().

rtx gen_lowpart_common ( enum  machine_mode,
rtx gen_lowpart_if_possible ( enum  machine_mode,
   In cse.c 
rtx gen_lowpart_SUBREG ( enum  machine_mode,
rtx gen_raw_REG ( enum  machine_mode,
rtx gen_reg_rtx ( enum  machine_mode)
rtx gen_reg_rtx_and_attrs ( rtx  )
rtx gen_reg_rtx_offset ( rtx  ,
enum  machine_mode,
rtvec gen_rtvec_v ( int  ,
   In emit-rtl.c 
rtx gen_rtx_CONST_INT ( enum  machine_mode,
   There are some RTL codes that require special attention; the
   generation functions included above do the raw handling.  If you
   add to this list, modify special_rtx in gengenrtl.c as well.  
rtx gen_rtx_CONST_VECTOR ( enum  machine_mode,
rtx gen_rtx_MEM ( enum  machine_mode,
rtx gen_rtx_REG ( enum  machine_mode,
rtx gen_rtx_REG_offset ( rtx  reg,
enum machine_mode  mode,
unsigned int  regno,
int  offset 
   Generate a register with same attributes as REG, but with OFFSET
   added to the REG_OFFSET.  
rtx gen_rtx_SUBREG ( enum  machine_mode,
rtx  ,
rtx gen_tmp_stack_mem ( enum  machine_mode,
rtx gen_use ( rtx  )
rtx get_addr ( rtx  )
rtx get_call_rtx_from ( rtx  )

Referenced by merge_dir(), and reverse_op().

rtx get_condition ( rtx  ,
rtx ,
int  ,
   Given a JUMP_INSN, return a canonical description of the test
   being made.  
int get_first_label_num ( void  )
   Return first label number used in this function (if any were used).  
rtx get_first_nonnote_insn ( void  )
   Return the first nonnote insn emitted in current sequence or current
   function.  This routine looks inside SEQUENCEs.  
void get_full_rtx_cost ( rtx  x,
enum rtx_code  outer,
int  opno,
struct full_rtx_costs c 
   Fill in the structure C with information about both speed and size rtx
   costs for X, which is operand OPNO in an expression with code OUTER.  

Referenced by init_costs_to_zero().

static void get_full_set_rtx_cost ( )
   Like set_rtx_cost, but return both the speed and size costs in C.  

Referenced by move2add_use_add3_insn(), and move2add_valid_value_p().

static void get_full_set_src_cost ( )
   Like set_src_cost, but return both the speed and size costs in C.  

Referenced by move2add_use_add3_insn().

enum rtx_code get_index_code ( const struct address_info )
HOST_WIDE_INT get_index_scale ( const struct address_info )
const char* get_insn_name ( int  )
HOST_WIDE_INT get_integer_term ( const_rtx  )
rtx get_last_insn_anywhere ( void  )
   Emission of insns (adding them to the doubly-linked list).  
   Return the last insn emitted, even if it is in a sequence now pushed.  
rtx get_last_nonnote_insn ( void  )
   Return the last nonnote insn emitted in current sequence or current
   function.  This routine looks inside SEQUENCEs.  
int get_max_insn_count ( void  )
   Return the number of actual (non-debug) insns emitted in this
     The table size must be stable across -g, to avoid codegen
     differences due to debug insns, and not be affected by
     -fmin-insn-uid, to avoid excessive table size and to simplify
     debugging of -fcompare-debug failures.  

Referenced by canon_list_insert(), and compute_hash_table_work().

static struct mem_attrs* get_mem_attrs ( )
   Return the attributes of a MEM rtx.  

Referenced by set_mem_alias_set(), set_mem_align(), and set_mem_attributes().

void get_mode_bounds ( enum machine_mode  mode,
int  sign,
enum machine_mode  target_mode,
rtx mmin,
rtx mmax 
   In stor-layout.c.  
   Gets minimal and maximal values for MODE (signed or unsigned depending on
   SIGN).  The returned constants are made to be usable in TARGET_MODE.  

Referenced by simplify_relational_operation_1().

rtx get_pool_constant ( rtx  )
rtx get_pool_constant_mark ( rtx  ,
bool *   
enum machine_mode get_pool_mode ( const_rtx  )

Referenced by get_integer_term().

rtx get_reg_base_value ( unsigned  int)
bool get_reg_known_equiv_p ( unsigned  int)
rtx get_reg_known_value ( unsigned  int)
rtx get_related_value ( const_rtx  )
void globalize_reg ( tree  ,
unsigned hash_rtx ( const_rtx  x,
enum machine_mode  mode,
int *  do_not_record_p,
int *  hash_arg_in_memory_p,
bool  have_reg_qty 
   Hash an rtx.  We are careful to make sure the value is never negative.
   Equivalent registers hash identically.
   MODE is used in hashing for CONST_INTs only;
   otherwise the mode of X is used.

   Store 1 in DO_NOT_RECORD_P if any subexpression is volatile.

   If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains
   a MEM rtx which does not have the MEM_READONLY_P flag set.

   Note that cse_insn knows that the hash code of a MEM expression
   is just (int) MEM plus the hash code of the address.  

References exp_equiv_p().

Referenced by invariant_for_use().

unsigned hash_rtx_cb ( const_rtx  x,
enum machine_mode  mode,
int *  do_not_record_p,
int *  hash_arg_in_memory_p,
bool  have_reg_qty,
hash_rtx_callback_function  cb 
   Same as hash_rtx, but call CB on each rtx if it is not NULL.
   When the callback returns true, we continue with the new rtx.  
     Used to turn recursion into iteration.  We can't rely on GCC's
     tail-recursion elimination since we need to keep accumulating values
     in HASH.  
     Invoke the callback first.  
               On some machines, we can't record any non-fixed hard register,
               because extending its life will cause reload problems.  We
               consider ap, fp, sp, gp to be fixed for this purpose.

               We also consider CCmode registers to be fixed for this purpose;
               failure to do so leads to failure to simplify 0<100 type of

               On all machines, we can't record any global registers.
               Nor should we record any register that is in a small
               class, as defined by TARGET_CLASS_LIKELY_SPILLED_P.  
       We handle SUBREG of a REG specially because the underlying
       reg changes its hash value with every value change; we don't
       want to have to forget unrelated subregs when one subreg changes.  
         This is like the general case, except that it only counts
         the integers representing the constant.  
         Assume there is only one rtx object for any given label.  
         We don't hash on the address of the CODE_LABEL to avoid bootstrap
         differences and differences between each stage's debugging dumps.  
           Don't hash on the symbol's address to avoid bootstrap differences.
           Different hash values may cause expressions to be recorded in
           different orders and thus different registers to be used in the
           final assembler.  This also avoids differences in the dump files
           between various stages.  
         We don't record if marked volatile or if BLKmode since we don't
         know the size of the move.  
         Now that we have already found this special case,
         might as well speed it up as much as possible.  
         A USE that mentions non-volatile memory needs special
         handling since the MEM may be BLKmode which normally
         prevents an entry from being made.  Pure calls are
         marked by a USE which mentions BLKmode memory.
         See calls.c:emit_call_1.  
             Now that we have already found this special case,
             might as well speed it up as much as possible.  
             We don't want to take the filename and line into account.  
             If we are about to do the last recursive call
             needed at this level, change it into iteration.
             This function  is called enough to be worth it.  

Referenced by invalidate_for_call().

rtx immed_double_const ( HOST_WIDE_INT  ,
enum  machine_mode 
rtx immed_double_int_const ( double_int  ,
enum  machine_mode 
int in_expr_list_p ( const_rtx  ,
int in_sequence_p ( void  )
   Return 1 if currently emitting into a sequence.  

References mem_attrs::align, mem_attrs::size, and mem_attrs::size_known_p.

int inequality_comparisons_p ( const_rtx  )
void init_alias_analysis ( void  )
   Initialize the aliasing machinery.  Initialize the REG_KNOWN_VALUE
     If we have memory allocated from the previous run, use it.  
     The basic idea is that each pass through this loop will use the
     "constant" information from the previous pass to propagate alias
     information through another level of assignments.

     The propagation is done on the CFG in reverse post-order, to propagate
     things forward as far as possible in each iteration.

     This could get expensive if the assignment chains are long.  Maybe
     we should throttle the number of iterations, possibly based on
     the optimization level or flag_expensive_optimizations.

     We could propagate more information in the first pass by making use
     of DF_REG_DEF_COUNT to determine immediately that the alias information
     for a pseudo is "constant".

     A program with an uninitialized variable can cause an infinite loop
     here.  Instead of doing a full dataflow analysis to detect such problems
     we just cap the number of iterations for the loop.

     The state of the arrays for the set chain in question does not matter
     since the program has undefined behavior.  
         Assume nothing will change this iteration of the loop.  
         We want to assign the same IDs each iteration of this loop, so
         start counting from one each iteration of the loop.  
         We're at the start of the function each iteration through the
         loop, so we're copying arguments.  
         Wipe the potential alias information clean for this pass.  
         Wipe the reg_seen array clean.  
         Initialize the alias information for this pass.  
         Walk the insns adding values to the new_reg_base_value array.  
                     The prologue/epilogue insns are not threaded onto the
                     insn chain until after reload has completed.  Thus,
                     there is no sense wasting time checking if INSN is in
                     the prologue/epilogue until after reload has completed.  
                     If this insn has a noalias note, process it,  Otherwise,
                     scan for sets.  A simple set will have no side effects
                     which could change the base value of any other register.  
         Now propagate values from new_reg_base_value to reg_base_value.  
     Fill in the remaining entries.  
     Clean up.  

Referenced by memref_referenced_p(), and pre_insert_copies().

void init_alias_target ( void  )
       Check whether this register can hold an incoming pointer
       argument.  FUNCTION_ARG_REGNO_P tests outgoing register
       numbers, so translate if necessary due to register windows.  
static void init_costs_to_max ( )
   Initialize a full_rtx_costs structure C to the maximum cost.  

References rtx_cost(), and SET.

Referenced by move2add_valid_value_p().

static void init_costs_to_zero ( )
   Initialize a full_rtx_costs structure C to zero cost.  

References get_full_rtx_cost(), and SET.

Referenced by move2add_valid_value_p().

void init_emit ( void  )
   Initialize data structures and variables in this file
   before generating rtl for each function.  
     Init the tables that describe all the pseudo regs.  
     Put copies of all the hard registers into regno_reg_rtx.  
     Put copies of all the virtual register rtx into regno_reg_rtx.  
     Indicate that the virtual registers and stack locations are
     all pointers.  

Referenced by blocks_nreverse().

void init_emit_once ( void  )
   Create some permanent unique rtl objects shared between all functions.  
     Initialize the CONST_INT, CONST_DOUBLE, CONST_FIXED, and memory attribute
     hash tables.  
     Compute the word and byte modes.  
     This is to initialize {init|mark|free}_machine_status before the first
     call to push_function_context_to.  This is needed by the Chill front
     end which calls push_function_context_to before the first call to
     Create the unique rtx's for certain rtx codes and operand values.  
     Don't use gen_rtx_CONST_INT here since gen_rtx_CONST_INT in this case
     tries to use these variables.  
         We store the value 1.  
         We store the value 1.  


void init_emit_regs ( void  )
   Initialise global register information required by all functions.  
     Reset register attributes 
     We need reg_raw_mode, so initialize the modes now.  
     Assign register numbers to the globally defined register rtx.  
     Initialize RTL for commonly used hard registers.  These are
     copied into regno_reg_rtx as we begin to compile each function.  
void init_expmed ( void  )
   In expmed.c 
     Avoid using hard regs in ways which may be unsupported.  
void init_fake_stack_mems ( void  )
   Initialize some fake stack-frame MEM references for use in
void init_lower_subreg ( void  )
   In lower-subreg.c 
   Do one-per-target initialisation.  This involves determining
   which operations on the machine are profitable.  If none are found,
   then the pass just returns when called.  
void init_reg_modes_target ( void  )

Compute the table of register modes. These values are used to record death information for individual registers (as opposed to a multi-register mode). This function might be invoked more than once, if the target has support for changing register usage conventions on a per-function basis.

         If we couldn't find a valid mode, just use the previous mode
         if it is suitable, otherwise fall back on word_mode.  
void init_reg_sets ( void  )
   Function called only once per target_globals to initialize the
   target_hard_regs structure.  Once this is done, various switches
   may override.  
     First copy the register information from the initial int form into
     the regsets.  
         Note that we hard-code 32 here, not HOST_BITS_PER_INT.  
     Sanity check: make sure the target macros FIXED_REGISTERS and
     CALL_USED_REGISTERS had the right number of initializers.  

Referenced by save_target_globals().

void init_regs ( void  )

Finish initializing the register sets and initialize the register modes. This function might be invoked more than once, if the target has support for changing register usage conventions on a per-function basis.

     This finishes what was started by init_reg_sets, but couldn't be done
     until after register usage was specified.  
void init_rtlanal ( void  )
   Initialize non_rtx_starting_operands, which is used to speed up
void init_subregs_of_mode ( void  )
void init_varasm_once ( void  )
   In varasm.c 
bool insn_could_throw_p ( const_rtx  )
const char* insn_file ( const_rtx  )
int insn_line ( const_rtx  )
   In emit-rtl.c  
void insn_locations_finalize ( void  )
   At the end of emit stage, clear current location.  
void insn_locations_init ( void  )
   Allocate insn location datastructure.  
bool insn_nothrow_p ( const_rtx  )
int insn_rtx_cost ( rtx  ,

Referenced by cheap_bb_rtx_cost_p().

tree insn_scope ( const_rtx  )
bool invalid_mode_change_p ( unsigned int  regno,
enum reg_class  rclass 
   Return 1 if REGNO has had an invalid mode change in CLASS from FROM

Referenced by scan_one_insn().

void invert_br_probabilities ( rtx  )
   In predict.c 
int invert_jump ( rtx  ,
rtx  ,
int invert_jump_1 ( rtx  ,
hashval_t iterative_hash_rtx ( const_rtx  ,
bool jump_to_label_p ( rtx  )
bool keep_with_call_p ( const_rtx  )
bool label_is_jump_target_p ( const_rtx  ,
rtx last_call_insn ( void  )
   Return the last CALL_INSN in the current list, or 0 if there is none.
   This routine does not look inside SEQUENCEs.  
int loc_mentioned_in_p ( rtx ,

Referenced by df_word_lr_add_problem().

rtx lookup_constant_def ( tree  )
int low_bitmask_len ( enum  machine_mode,
unsigned  HOST_WIDE_INT 
rtx lowpart_subreg ( enum machine_mode  outer_mode,
rtx  expr,
enum machine_mode  inner_mode 
   In loop-iv.c  
   Generates a subreg to get the least significant part of EXPR (in mode
rtx make_compound_operation ( rtx  ,
enum  rtx_code 
rtx make_debug_expr_from_rtl ( const_rtx  )
rtx make_insn_raw ( rtx  )
rtx make_safe_from ( rtx  ,
void mark_elimination ( int  ,
void mark_jump_label ( rtx  ,
rtx  ,
void mark_reg_pointer ( rtx  ,
void mark_user_reg ( rtx  )
int max_label_num ( void  )
   Return 1 + the largest label number used so far in the current function.  

Referenced by update_alignments().

int may_alias_p ( const_rtx  ,
bool may_be_sp_based_p ( rtx  )
int may_trap_or_fault_p ( const_rtx  )
int may_trap_p_1 ( const_rtx  ,
void maybe_copy_prologue_epilogue_insn ( rtx  ,
void maybe_set_first_label_num ( rtx  )
bool memory_modified_in_insn_p ( const_rtx  ,
bool memory_must_be_modified_in_insn_p ( const_rtx  ,
bool mode_signbit_p ( enum  machine_mode,
int modified_between_p ( const_rtx  ,
const_rtx  ,
rtx move_by_pieces ( rtx  to,
rtx  from,
unsigned HOST_WIDE_INT  len,
unsigned int  align,
int  endp 
   In expr.c 
   Generate several move instructions to copy LEN bytes from block FROM to
   block TO.  (These are MEM rtx's with BLKmode).

   If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
   used to push FROM to the stack.

   ALIGN is maximum stack alignment we can assume.

   If ENDP is 0 return to, if ENDP is 1 return memory at the end ala
   mempcpy, and if ENDP is 2 return memory the end minus one byte ala
     If copying requires more than two move insns,
     copy addresses to registers (to make displacements shorter)
     and use post-increment if available.  
         Find the mode of the largest move...
         MODE might not be used depending on the definitions of the
         USE_* macros below.  
     First move what we can in the largest integer mode, then go to
     successively smaller modes.  
     The code above should have handled everything.  

References move_by_pieces_d::autinc_from, copy_to_mode_reg(), move_by_pieces_d::explicit_inc_from, move_by_pieces_d::from_addr, and plus_constant().

Referenced by fixup_args_size_notes(), and move_by_pieces_1().

int multiple_sets ( const_rtx  )
rtx next_active_insn ( rtx  )
rtx next_cc0_user ( rtx  )
rtx next_insn ( rtx  )
rtx next_nondebug_insn ( rtx  )
rtx next_nonnote_insn ( rtx  )
rtx next_nonnote_insn_bb ( rtx  )
rtx next_nonnote_nondebug_insn ( rtx  )
rtx next_real_insn ( rtx  )
int no_labels_between_p ( const_rtx  ,
bool nonzero_address_p ( const_rtx  )
unsigned HOST_WIDE_INT nonzero_bits ( const_rtx  ,
enum  machine_mode 
int noop_move_p ( const_rtx  )
void note_stores ( const_rtx  x,
void(*)(rtx, const_rtx, void *)  fun,
void *  data 
   Call FUN on each register or MEM that is stored into or clobbered by X.
   (X would be the pattern of an insn).  DATA is an arbitrary pointer,
   ignored by note_stores, but passed to FUN.

   FUN receives three arguments:
   1. the REG, MEM, CC0 or PC being stored in or clobbered,
   2. the SET or CLOBBER rtx that does the store,
   3. the pointer DATA provided to note_stores.

  If the item being stored in or clobbered is a SUBREG of a hard register,
  the SUBREG will be passed.  
         If we have a PARALLEL, SET_DEST is a list of EXPR_LIST expressions,
         each of whose first operand is a register.  

Referenced by df_simulate_one_insn_forwards(), expand_copysign(), get_stored_val(), mark_insn_hard_regno_birth(), mark_mem_store(), mark_nonreg_stores_1(), memref_used_between_p(), notice_stack_pointer_modification(), prepare_shrink_wrap(), reg_overlap_mentioned_p(), save_call_clobbered_regs(), set_paradoxical_subreg(), and spill_hard_reg().

void note_uses ( rtx pbody,
void(*)(rtx *, void *)  fun,
void *  data 
   Like notes_stores, but call FUN for each expression that is being
   referenced in PBODY, a pointer to the PATTERN of an insn.  We only call
   FUN for each expression, not any interior subexpressions.  FUN receives a
   pointer to the expression and the DATA passed to this function.

   Note that this is not quite the same test as that done in reg_referenced_p
   since that considers something as being referenced if it is being
   partially set, while we do not.  
           For sets we replace everything in source plus registers in memory
           expression in store and operands of a ZERO_EXTRACT.  
         All the other possibilities never store.  

References dead_or_set_regno_p().

Referenced by find_implicit_sets(), mark_mem_use_1(), prepare_shrink_wrap(), and sd_delete_dep().

unsigned int num_sign_bit_copies ( const_rtx  ,
enum  machine_mode 
bool offset_within_block_p ( const_rtx  ,
int only_sets_cc0_p ( const_rtx  )
int onlyjump_p ( const_rtx  )
rtx operand_subword ( rtx  ,
unsigned  int,
int  ,
enum  machine_mode 
rtx operand_subword_force ( rtx  ,
unsigned  int,
enum  machine_mode 
   In emit-rtl.c 
bool optimize_insn_for_size_p ( void  )
   Return TRUE when BB should be optimized for size.  

References optimize_loop_for_speed_p().

bool optimize_insn_for_speed_p ( void  )
   Return TRUE when BB should be optimized for speed.  

References loop::inner, loop::next, and optimize_loop_for_speed_p().

Referenced by emit_cstore(), expand_mult(), expand_mult_highpart_adjust(), expand_widening_mult(), and no_conflict_move_test().

rtx output_constant_def ( tree  ,
int output_dependence ( const_rtx  ,
bool paradoxical_subreg_p ( const_rtx  )
rtx pc_set ( const_rtx  )
rtx plus_constant ( enum  machine_mode,
rtx  ,
void pop_topmost_sequence ( void  )
   After emitting to the outer-level insn chain, update the outer-level
   insn chain, and restore the previous saved state.  

Referenced by result_vector().

rtx prev_active_insn ( rtx  )
rtx prev_cc0_setter ( rtx  )
rtx prev_nondebug_insn ( rtx  )
rtx prev_nonnote_insn ( rtx  )
rtx prev_nonnote_insn_bb ( rtx  )
rtx prev_nonnote_nondebug_insn ( rtx  )
rtx prev_real_insn ( rtx  )
rtx previous_insn ( rtx  )
void print_inline_rtx ( FILE *  ,
const_rtx  ,
void print_insn ( pretty_printer ,
const_rtx  ,
void print_mem_expr ( FILE *  ,
void print_pattern ( pretty_printer ,
const_rtx  ,
void print_rtl ( FILE *  ,
int print_rtl_single ( FILE *  ,
int print_rtl_single_with_indent ( FILE *  ,
const_rtx  ,
void print_rtl_with_bb ( FILE *  ,
const_rtx  ,
   In cfgrtl.c 
void print_simple_rtl ( FILE *  ,
void print_value ( pretty_printer ,
const_rtx  ,

Referenced by print_value().

int prologue_epilogue_contains ( const_rtx  )
void push_to_sequence ( rtx  )
void push_to_sequence2 ( rtx  ,
void push_topmost_sequence ( void  )
   Set up the outer-level insn chain
   as the current sequence, saving the previously current one.  

Referenced by result_vector().

int read_dependence ( const_rtx  ,
bool read_rtx ( const char *  ,
   In read-rtl.c 
void rebuild_jump_labels ( rtx  )
void rebuild_jump_labels_chain ( rtx  )
void record_hard_reg_sets ( rtx  ,
const_rtx  ,
void *   

Referenced by prepare_shrink_wrap().

void record_hard_reg_uses ( rtx ,
void *   
int redirect_jump ( rtx  ,
rtx  ,
int redirect_jump_1 ( rtx  ,
void redirect_jump_2 ( rtx  jump,
rtx  olabel,
rtx  nlabel,
int  delete_unused,
int  invert 
   Fix up JUMP_LABEL and label ref counts after OLABEL has been replaced with
   If DELETE_UNUSED is positive, delete related insn to OLABEL if its ref
   count has dropped to zero.  
     Negative DELETE_UNUSED used to be used to signalize behavior on
     moving FUNCTION_END note.  Just sanity check that no user still worry
     about this.  
     Update labels in any REG_EQUAL note.  
         Undefined labels will remain outside the insn stream.  

Referenced by redirect_exp_1().

int refers_to_regno_p ( unsigned int  regno,
unsigned int  endregno,
const_rtx  x,
rtx loc 
   Return nonzero if register in range [REGNO, ENDREGNO)
   appears either explicitly or implicitly in X
   other than being stored into.

   References contained within the substructure at LOC do not count.
   LOC may be zero, meaning don't ignore anything.  
     The contents of a REG_NONNEG note is always zero, so we must come here
     upon repeat in case the last REG_NOTE is a REG_NONNEG note.  
         If we modifying the stack, frame, or argument pointer, it will
         clobber a virtual register.  In fact, we could be more precise,
         but it isn't worth it.  
         If this is a SUBREG of a hard reg, we can see exactly which
         registers are being modified.  Otherwise, handle normally.  
             Note setting a SUBREG counts as referring to the REG it is in for
             a pseudo but not for hard registers since we can
             treat each word individually.  
     X does not match, so try its subexpressions.  

Referenced by use_crosses_set_p().

enum reg_class reg_allocno_class ( int  )
enum reg_class reg_alternate_class ( int  )
int reg_class_subset_p ( reg_class_t  ,
int reg_classes_intersect_p ( reg_class_t  ,
   In reginfo.c 
unsigned int reg_or_subregno ( const_rtx  )
enum reg_class reg_preferred_class ( int  )
void reg_scan ( rtx  ,
unsigned  int 
int reg_set_between_p ( const_rtx  ,
const_rtx  ,
int reg_set_p ( const_rtx  ,
int reg_used_between_p ( const_rtx  ,
const_rtx  ,

Referenced by expand_copysign_bit().

void regclass ( rtx  ,
rtx regno_use_in ( unsigned  int,
void reinit_regs ( void  )
   The same as previous function plus initializing IRA.  
     caller_save needs to be re-initialized.  
rtx remove_death ( unsigned  int,
rtx remove_free_EXPR_LIST_node ( rtx )
void remove_free_INSN_LIST_elem ( rtx  ,
rtx remove_free_INSN_LIST_node ( rtx )
void remove_insn ( rtx  )
rtx remove_list_elem ( rtx  ,
void remove_node_from_expr_list ( const_rtx  ,
void remove_reg_equal_equiv_notes ( rtx  )
void remove_reg_equal_equiv_notes_for_regno ( unsigned  int)
void reorder_insns ( rtx  ,
rtx  ,
void reorder_insns_nobb ( rtx  ,
rtx  ,
int replace_label ( rtx ,
void *   
rtx replace_rtx ( rtx  ,
rtx  ,
void reposition_prologue_and_epilogue_notes ( void  )
   In function.c 
   Reposition the prologue-end and epilogue-begin notes after
   instruction scheduling.  
     Since the hash table is created on demand, the fact that it is
     non-null is a signal that it is non-empty.  
         Scan from the beginning until we reach the last prologue insn.  
         ??? While we do have the CFG intact, there are two problems:
         (1) The prologue can contain loops (typically probing the stack),
             which means that the end of the prologue isn't in the first bb.
         (2) Sometimes the PROLOGUE_END note gets pushed into the next bb.  
                 Scan forward looking for the PROLOGUE_END note.  It should
                 be right at the beginning of the block, possibly with other
                 insn notes that got moved there.  
             Avoid placing note between CODE_LABEL and BASIC_BLOCK note.  
             Scan from the beginning until we reach the first epilogue insn. 
                 If the function has a single basic block, and no real
                 epilogue insns (e.g. sibcall with no cleanup), the
                 epilogue note can get scheduled before the prologue
                 note.  If we have frame related prologue insns, having
                 them scanned during the epilogue will result in a crash.
                 In this case re-order the epilogue note to just before
                 the last insn in the block.  
void reset_used_flags ( rtx  )
bool resize_reg_info ( void  )
   Resize reg info.  
   Resize reg info. The new elements will be initialized.  Return TRUE
   if new pseudos were added since the last call.  

Referenced by split_live_ranges_for_shrink_wrap().

int returnjump_p ( rtx  )
enum rtx_code reverse_condition ( enum  rtx_code)
   In jump.c 
enum rtx_code reverse_condition_maybe_unordered ( enum  rtx_code)
rtx reversed_comparison ( const_rtx  ,
enum  machine_mode 
enum rtx_code reversed_comparison_code ( const_rtx  ,
enum rtx_code reversed_comparison_code_parts ( enum rtx_code  code,
const_rtx  arg0,
const_rtx  arg1,
const_rtx  insn 
   Given a comparison (CODE ARG0 ARG1), inside an insn, INSN, return a code
   of reversed comparison if it is possible to do so.  Otherwise return UNKNOWN.
   UNKNOWN may be returned in case we are having CC_MODE compare and we don't
   know whether it's source is floating point or integer comparison.  Machine
   description should define REVERSIBLE_CC_MODE and REVERSE_CONDITION macros
   to help this function avoid overhead in these cases.  
     If this is not actually a comparison, we can't reverse it.  
     First see if machine description supplies us way to reverse the
     comparison.  Give it priority over everything else to allow
     machine description to do tricks.  
     Try a few special cases based on the comparison code.  
         It is always safe to reverse EQ and NE, even for the floating
         point.  Similarly the unsigned comparisons are never used for
         floating point so we can reverse them in the default way.  
         In case we already see unordered comparison, we can be sure to
         be dealing with floating point so we don't need any more tests.  
         We don't have safe way to reverse these yet.  
         Try to search for the comparison to determine the real mode.
         This code is expensive, but with sane machine description it
         will be never used, since REVERSIBLE_CC_MODE will return true
         in all cases.  
         These CONST_CAST's are okay because prev_nonnote_insn just
         returns its argument and we assign it to a const_rtx
                 We can get past reg-reg moves.  This may be useful for model
                 of i387 comparisons that first move flag registers around.  
             If register is clobbered in some ununderstandable way,
             give up.  
     Test for an integer condition, or a floating-point comparison
     in which NaNs can be ignored.  

Referenced by emit_cmp_and_jump_insn_1(), and subst().

rtx reversed_condition ( rtx  )
   In loop-unswitch.c  
static unsigned int rhs_regno ( )
   Force the REGNO macro to only be used on the lhs.  
void rtl_check_failed_block_symbol ( const char *  ,
int  ,
const char *   
void rtl_check_failed_bounds ( const_rtx  ,
int  ,
const char *  ,
int  ,
const char *   
void rtl_check_failed_code1 ( const_rtx  ,
enum  rtx_code,
const char *  ,
int  ,
const char *   
void rtl_check_failed_code2 ( const_rtx  ,
enum  rtx_code,
enum  rtx_code,
const char *  ,
int  ,
const char *   
void rtl_check_failed_code_mode ( const_rtx  ,
enum  rtx_code,
enum  machine_mode,
bool  ,
const char *  ,
int  ,
const char *   
void rtl_check_failed_flag ( const char *  ,
const_rtx  ,
const char *  ,
int  ,
const char *   
void rtl_check_failed_type1 ( const_rtx  ,
int  ,
int  ,
const char *  ,
int  ,
const char *   
void rtl_check_failed_type2 ( const_rtx  ,
int  ,
int  ,
int  ,
const char *  ,
int  ,
const char *   
void rtl_dump_bb_for_graph ( pretty_printer ,
rtvec rtvec_alloc ( int  )
void rtvec_check_failed_bounds ( const_rtvec  r,
int  n,
const char *  file,
int  line,
const char *  func 
   XXX Maybe print the vector?  
int rtx_addr_can_trap_p ( const_rtx  )
bool rtx_addr_varies_p ( const_rtx  ,
rtx rtx_alloc_stat ( RTX_CODE  MEM_STAT_DECL)
   In rtl.c 
int rtx_cost ( rtx  ,
enum  rtx_code,
int  ,
int rtx_equal_p ( const_rtx  ,
int rtx_equal_p_cb ( const_rtx  ,
const_rtx  ,
int rtx_referenced_p ( rtx  ,
int rtx_renumbered_equal_p ( const_rtx  ,
unsigned int rtx_size ( const_rtx  )
   In rtl.c 
double_int rtx_to_double_int ( const_rtx  )
int rtx_to_tree_code ( enum  rtx_code)
   Translates rtx code to tree code, for those codes needed by
   REAL_ARITHMETIC.  The function returns an int because the caller may not
   know what `enum tree_code' means.  
int rtx_unstable_p ( const_rtx  )

Referenced by rtx_unstable_p().

bool rtx_varies_p ( const_rtx  ,

Referenced by rtx_varies_p().

void save_register_info ( void  )
   Save the register information.  
     Sanity check:  make sure the target macros FIXED_REGISTERS and
     CALL_USED_REGISTERS had the right number of initializers.  
     Likewise for call_really_used_regs.  
     And similarly for reg_names.  

References memcpy().

void schedule_ebbs ( void  )
   In sched-ebb.c.  
   The main entry point in this file.  
     Taking care of this degenerate case makes the rest of
     this code simpler.  
     Schedule every region in the subroutine.  
void schedule_insns ( void  )
   In sched-rgn.c.  
   The one entry point in this file.  
     Taking care of this degenerate case makes the rest of
     this code simpler.  
     Schedule every region in the subroutine.  
     Clean up.  

References execute(), gate_handle_sched2(), make_pass_sched2(), rest_of_handle_sched2(), and RTL_PASS.

void sel_sched_fix_param ( const char *  param,
const char *  val 
   In sel-sched-dump.c.  
void set_curr_insn_location ( location_t  )
rtx set_dst_reg_note ( rtx  ,
enum  reg_note,
rtx  ,
void set_insn_deleted ( rtx  )
void set_new_first_and_last_insn ( rtx  ,
int set_noop_p ( const_rtx  )

Referenced by cse_prescan_path(), and multiple_sets().

const_rtx set_of ( const_rtx  ,
void set_return_jump_label ( rtx  )
static int set_rtx_cost ( )
   Return the cost of SET X.  SPEED_P is true if optimizing for speed
   rather than size.  

Referenced by find_defs(), and get_loop_level().

static int set_src_cost ( )
   Return the cost of moving X into a register, relative to the cost
   of a register move.  SPEED_P is true if optimizing for speed rather
   than size.  

Referenced by alloc_use_cost_map(), init_expmed_one_conv(), reload_combine_closest_single_use(), and simplify_set().

rtx set_unique_reg_note ( rtx  ,
enum  reg_note,
   In emit-rtl.c  
void set_used_flags ( rtx  )
int sets_cc0_p ( const_rtx  )
void setup_reg_classes ( int  regno,
enum reg_class  prefclass,
enum reg_class  altclass,
enum reg_class  allocnoclass 
   Set up preferred, alternate, and allocno classes for REGNO as
rtvec shallow_copy_rtvec ( rtvec  )
rtx shallow_copy_rtx_stat ( const_rtx  MEM_STAT_DECL)
bool shared_const_p ( const_rtx  )
int sibcall_epilogue_contains ( const_rtx  )
enum rtx_code signed_condition ( enum  rtx_code)
int simplejump_p ( const_rtx  )
rtx simplify_binary_operation ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op0,
rtx  op1 
   Simplify a binary operation CODE with result mode MODE, operating on OP0
   and OP1.  Return 0 if no simplification is possible.

   Don't use this for relational operations such as EQ or LT.
   Use simplify_relational_operation instead.  
     Relational operations don't work here.  We must know the mode
     of the operands in order to do the comparison correctly.
     Assuming a full word can give incorrect results.
     Consider comparing 128 with -128 in QImode.  
     Make sure the constant is second.  

Referenced by simplify_relational_operation_1().

rtx simplify_const_binary_operation ( enum  rtx_code,
enum  machine_mode,
rtx  ,
                     Inf + -Inf = NaN plus exception.  
                     Inf - Inf = NaN plus exception.  
                     Inf / Inf = NaN plus exception.  
               Inf * 0 = NaN plus exception.  
             Don't constant fold this floating point operation if
             the result has overflowed and flag_trapping_math.  
               Overflow plus exception.  
             Don't constant fold this floating point operation if the
             result may dependent upon the run-time rounding mode and
             flag_rounding_math is set, or if GCC's software emulation
             is unable to accurately represent the result.  
     We can fold some multi-word operations.  
             A - B == A + (-B).  
             Fall through....  
         Get the integer argument values in two forms:
         zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S.  
         Compute the value of the arithmetic.  
             Truncate the shift if SHIFT_COUNT_TRUNCATED, otherwise make sure
             the value is in range.  We can't return any old value for
             out-of-range arguments because either the middle-end (via
             shift_truncation_mask) or the back-end might be relying on
             target-specific knowledge.  Nor can we rely on
             shift_truncation_mask, since the shift might not be part of an
             ashlM3, lshrM3 or ashrM3 instruction.  
             Sign-extend the result for arithmetic right shifts.  
             Do nothing here.  
             ??? There are simplifications that can be done.  

References double_int::alshift(), HOST_WIDE_INT, double_int::lrotate(), double_int::rrotate(), and double_int::rshift().

rtx simplify_const_relational_operation ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op0,
rtx  op1 
   Check if the given comparison (done in the given MODE) is actually a
   tautology or a contradiction.
   If no simplification is possible, this function returns zero.
   Otherwise, it returns either const_true_rtx or const0_rtx.  
     If op0 is a compare, extract the comparison arguments from it.  
     We can't simplify MODE_CC values since we don't know what the
     actual comparison is.  
     Make sure the constant is second.  
     For integer comparisons of A and B maybe we can simplify A - B and can
     then simplify a comparison of that with zero.  If A and B are both either
     a register or a CONST_INT, this can't help; testing for these cases will
     prevent infinite recursion here and speed things up.

     We can only do this for EQ and NE comparisons as otherwise we may
     lose or introduce overflow which we cannot disregard as undefined as
     we do not know the signedness of the operation on either the left or
     the right hand side of the comparison.  
         We cannot do this if tem is a nonzero address.  
     For modes without NaNs, if the two operands are equal, we know the
     result except if they have side-effects.  Even with NaNs we know
     the result of unordered comparisons and, if signaling NaNs are
     irrelevant, also the result of LT/GT/LTGT.  
     If the operands are floating-point constants, see if we can fold
     the result.  
         Comparisons are unordered iff at least one of the values is NaN.  
     Otherwise, see if the operands are both integers.  
         Get the two words comprising each integer constant.  
         If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
         we have to sign or zero-extend the values.  
     Optimize comparisons with upper and lower bounds.  
         Get a reduced range if the sign bit is zero.  
           x >= y is always true for y <= mmin, always false for y > mmax.  
           x <= y is always true for y >= mmax, always false for y < mmin.  
             x == y is always false for y out of range.  
           x > y is always false for y >= mmax, always true for y < mmin.  
           x < y is always false for y <= mmin, always true for y > mmax.  
             x != y is always true for y out of range.  
     Optimize integer comparisons with zero.  
         Some addresses are known to be nonzero.  We don't know
         their sign, but equality comparisons are known.  
         See if the first operand is an IOR with a constant.  If so, we
         may be able to determine the result of this comparison.  
     Optimize comparison of ABS with zero.  
             Optimize abs(x) < 0.0.  
             Optimize abs(x) >= 0.0.  
             Optimize ! (abs(x) < 0.0).  

Referenced by simplify_relational_operation_1().

rtx simplify_const_unary_operation ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op,
enum machine_mode  op_mode 
   In simplify-rtx.c  
   Try to compute the value of a unary operation CODE whose output mode is to
   be MODE with input operand OP whose mode was originally OP_MODE.
   Return zero if the value cannot be computed.  
     The order of these tests is critical so that, for example, we don't
     check the wrong mode (input vs. output) for a conversion operation,
     such as FIX.  At some point, this should be simplified.  
           We should never get a negative number.  
                 Even if the value at zero is undefined, we have to come
                 up with some replacement.  Seems good enough.  
             When zero-extending a CONST_INT, we need to know its
             original mode.  
                 If we were really extending the mode,
                 we would have to distinguish between zero-extension
                 and sign-extension.  
                 If we were really extending the mode,
                 we would have to distinguish between zero-extension
                 and sign-extension.  
     We can do some operations on integer CONST_DOUBLEs.  Also allow
     for a DImode operation on a CONST_INT.  
             This is just a change-of-mode, so do nothing.  
             All this does is change the mode, unless changing
             mode class.  
         Although the overflow semantics of RTL's FIX and UNSIGNED_FIX
         operators are intentionally left unspecified (to ease implementation
         by target backends), for consistency, this routine implements the
         same semantics for constant folding as used by the middle-end.  
         This was formerly used only for non-IEEE float.
         eggert@twinsun.com says it is safe for IEEE also.  
             Test against the signed upper bound.  
             Test against the signed lower bound.  
             Test against the unsigned upper bound.  

References ctz_hwi(), ffs_hwi(), floor_log2(), HOST_BITS_PER_WIDE_INT, HOST_WIDE_INT, and val_signbit_known_set_p().

rtx simplify_gen_binary ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op0,
rtx  op1 
   Make a binary operation by properly ordering the operands and
   seeing if the expression folds.  
     If this simplifies, do it.  
     Put complex operands first and constants second if commutative.  

Referenced by iv_mult(), make_extraction(), noce_try_sign_mask(), simplify_and_const_int_1(), simplify_byte_swapping_operation(), simplify_truncation(), and simplify_unary_operation_1().

rtx simplify_gen_relational ( enum rtx_code  code,
enum machine_mode  mode,
enum machine_mode  cmp_mode,
rtx  op0,
rtx  op1 
   Likewise, for relational operations.
   CMP_MODE specifies mode comparison is done in.  

Referenced by subst().

rtx simplify_gen_subreg ( enum machine_mode  outermode,
rtx  op,
enum machine_mode  innermode,
unsigned int  byte 
   Make a SUBREG operation or equivalent if it folds.  

Referenced by clear_storage_libcall_fn(), expand_debug_parm_decl(), set_storage_via_libcall(), and set_storage_via_setmem().

rtx simplify_gen_ternary ( enum rtx_code  code,
enum machine_mode  mode,
enum machine_mode  op0_mode,
rtx  op0,
rtx  op1,
rtx  op2 
   Likewise for ternary operations.  
     If this simplifies, use it.  
rtx simplify_gen_unary ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op,
enum machine_mode  op_mode 
   Make a unary operation by first seeing if it folds and otherwise making
   the specified operation.  
     If this simplifies, use it.  

Referenced by expand_debug_parm_decl(), iv_extend(), make_compound_operation(), make_extraction(), simplify_byte_swapping_operation(), simplify_replace_rtx(), simplify_truncation(), simplify_unary_operation_1(), simplify_while_replacing(), split_iv(), and subst().

rtx simplify_relational_operation ( enum rtx_code  code,
enum machine_mode  mode,
enum machine_mode  cmp_mode,
rtx  op0,
rtx  op1 
   Like simplify_binary_operation except used for relational operators.
   MODE is the mode of the result. If MODE is VOIDmode, both operands must
   not also be VOIDmode.

   CMP_MODE specifies in which mode the comparison is done in, so it is
   the mode of the operands.  If CMP_MODE is VOIDmode, it is taken from
   the operands or, if both are VOIDmode, the operands are compared in
   "infinite precision".  
     For the following tests, ensure const0_rtx is op1.  
     If op0 is a compare, extract the comparison arguments from it.  
rtx simplify_replace_fn_rtx ( rtx  x,
const_rtx  old_rtx,
rtx(*)(rtx, const_rtx, void *)  fn,
void *  data 
   If FN is NULL, replace all occurrences of OLD_RTX in X with copy_rtx (DATA)
   and simplify the result.  If FN is non-NULL, call this callback on each
   X, if it returns non-NULL, replace X with its return value and simplify the
             (lo_sum (high x) x) -> x  
rtx simplify_rtx ( const_rtx  )
rtx simplify_subreg ( enum machine_mode  outermode,
rtx  op,
enum machine_mode  innermode,
unsigned int  byte 
   Return 0 if no simplifications are possible.  
     Little bit of sanity checking.  
     Changing mode twice with SUBREG => just change it once,
     or not at all if changing back op starting mode.  
         The SUBREG_BYTE represents offset, as if the value were stored
         in memory.  Irritating exception is paradoxical subreg, where
         we define SUBREG_BYTE to be 0.  On big endian machines, this
         value should be negative.  For a moment, undo this exception.  
         See whether resulting subreg will be paradoxical.  
             In nonparadoxical subregs we can't handle negative offsets.  
             Bail out in case resulting subreg would be incorrect.  
             In paradoxical subreg, see if we are still looking on lower part.
             If so, our SUBREG_BYTE will be 0.  
         Recurse for further possible simplifications.  
     SUBREG of a hard register => just change the register number
     and/or mode.  If the hard register is not valid in that mode,
     suppress this simplification.  If the hard register is the stack,
     frame, or argument pointer, leave this as a SUBREG.  
             Adjust offset for paradoxical subregs.  
             Propagate original regno.  We don't have any way to specify
             the offset inside original regno, so do so only for lowpart.
             The information is used only by alias analysis that can not
             grog partial register anyway.  
     If we have a SUBREG of a register that we are replacing and we are
     replacing it with a MEM, make a new MEM and try replacing the
     SUBREG with it.  Don't do this if the MEM has a mode-dependent address
     or if we would be widening it.  
         Allow splitting of volatile memory references in case we don't
         have instruction to move the whole thing.  
     Handle complex values represented as CONCAT
     of real and imaginary part.  
     A SUBREG resulting from a zero extension may fold to zero if
     it extracts higher bits that the ZERO_EXTEND's source bits.  

Referenced by add_stores(), extract_split_bit_field(), make_extraction(), and set_storage_via_setmem().

int simplify_subreg_regno ( unsigned int  xregno,
enum machine_mode  xmode,
unsigned int  offset,
enum machine_mode  ymode 
   Return the number of a YMODE register to which

       (subreg:YMODE (reg:XMODE XREGNO) OFFSET)

   can be simplified.  Return -1 if the subreg can't be simplified.

   XREGNO is a hard register number.  
     Give the backend a chance to disallow the mode change.  
         We can use mode change in LRA for some transformations.  
     We shouldn't simplify stack-related registers.  
         We should convert hard stack register in LRA if it is
     Try to get the register offset.  
     Make sure that the offsetted register value is in range.  
     See whether (reg:YMODE YREGNO) is valid.

     ??? We allow invalid registers if (reg:XMODE XREGNO) is also invalid.
     This is a kludge to work around how complex FP arguments are passed
     on IA-64 and should be fixed.  See PR target/49226.  

Referenced by resolve_reg_notes().

rtx simplify_subtraction ( rtx  )
rtx simplify_ternary_operation ( enum rtx_code  code,
enum machine_mode  mode,
enum machine_mode  op0_mode,
rtx  op0,
rtx  op1,
rtx  op2 
   Simplify CODE, an operation with result mode MODE and three operands,
   OP0, OP1, and OP2.  OP0_MODE was the mode of OP0 before it became
   a constant.  Return 0 if no simplifications is possible.  
     VOIDmode means "infinite" precision.  
         Simplify negations around the multiplication.  
         -a * -b + c  =>  a * b + c.  
         Canonicalize the two multiplication operands.  
         a * -b + c  =>  -b * a + c.  
             Extracting a bit-field from a constant 
                 First zero-extend.  
                 If desired, propagate sign bit.  
         Convert c ? a : a into "a".  
         Convert a != b ? a : b into "a".  
         Convert a == b ? a : b into "b".  
             Look for happy constants in op1 and op2.  
             See if any simplifications were possible.  
             Replace (vec_merge (vec_merge a b m) c n) with (vec_merge b c n)
             if no element from a appears in the result.  
rtx simplify_unary_operation ( enum rtx_code  code,
enum machine_mode  mode,
rtx  op,
enum machine_mode  op_mode 
   Try to simplify a unary operation CODE whose output mode is to be
   MODE with input operand OP whose mode was originally OP_MODE.
   Return zero if no simplification can be made.  

Referenced by convert_memory_address_addr_space(), find_comparison_args(), and may_trap_p().

void simplify_using_condition ( rtx  ,
rtx ,
rtx single_set_2 ( const_rtx  ,
void split_all_insns ( void  )
   Split all insns in the function.  If UPD_LIFE, update life info after.  
             Can't use `next_real_insn' because that might go across
             CODE_LABELS and short-out basic blocks.  
                 Don't split no-op move insns.  These should silently
                 disappear later in final.  Splitting such insns would
                 break the code that handles LIBCALL blocks.  
                     Nops get in the way while scheduling, so delete them
                     now if register allocation has already been done.  It
                     is too risky to try to do this before register
                     allocation, and there are unlikely to be very many
                     nops then anyways.  

References global_regs, live, peep2_insn_data::live_before, and peep2_buf_position().

unsigned int split_all_insns_noflow ( void  )
   Same as split_all_insns, but do not expect CFG to be available.
   Used by machine dependent reorg passes.  
             Don't split no-op move insns.  These should silently
             disappear later in final.  Splitting such insns would
             break the code that handles LIBCALL blocks.  
                 Nops get in the way while scheduling, so delete them
                 now if register allocation has already been done.  It
                 is too risky to try to do this before register
                 allocation, and there are unlikely to be very many
                 nops then anyways.

                 ??? Should we use delete_insn when the CFG isn't valid?  
void split_const ( rtx  ,
rtx ,
void split_double ( rtx  ,
rtx ,
rtx split_insns ( rtx  ,
   In unknown file  
int stack_regs_mentioned ( const_rtx  insn)
void start_sequence ( void  )
   Begin emitting insns to a sequence.  If this sequence will contain
   something that might cause the compiler to pop arguments to function
   calls (because those pops have previously been deferred; see
   INHIBIT_DEFER_POP for more details), use do_pending_stack_adjust
   before calling this function.  That will ensure that the deferred
   pops are not accidentally emitted in the middle of this sequence.  

Referenced by convert_regs_entry(), convert_tree_comp_to_rtx(), emit_insn_before_setloc(), end_ifcvt_sequence(), expand_abs(), expand_atomic_load(), expand_builtin_sincos(), expand_ffs(), gmalloc(), init_set_costs(), move_insn_for_shrink_wrap(), noce_emit_store_flag(), noce_try_addcc(), record_insns(), result_vector(), sjlj_assign_call_site_values(), split_edge_and_insert(), split_iv(), and undo_transformations().

const char* str_pattern_slim ( const_rtx  )
rtx* strip_address_mutations ( rtx ,
enum rtx_code = 0 
void subreg_get_info ( unsigned int  xregno,
enum machine_mode  xmode,
unsigned int  offset,
enum machine_mode  ymode,
struct subreg_info info 
   Fill in information about a subreg of a hard register.
   xregno - A regno of an inner hard subreg_reg (or what will become one).
   xmode  - The mode of xregno.
   offset - The byte offset.
   ymode  - The mode of a top level SUBREG (or what may become one).
   info   - Pointer to structure to fill in.  
     If there are holes in a non-scalar mode in registers, we expect
     that it is made up of its units concatenated together.  
         You can only ask for a SUBREG of a value with holes in the middle
         if you don't cross the holes.  (Such a SUBREG should be done by
         picking a different register class, or doing it in memory if
         necessary.)  An example of a value with holes is XCmode on 32-bit
         x86 with -m128bit-long-double; it's represented in 6 32-bit registers,
         3 for each part, but in memory it's two 128-bit parts.
         Padding is assumed to be at the end (not necessarily the 'high part')
         of each unit.  
     Paradoxical subregs are otherwise valid.  
         If this is a big endian paradoxical subreg, which uses more
         actual hard registers than the original register, we must
         return a negative offset so that we find the proper highpart
         of the register.  
     If registers store different numbers of bits in the different
     modes, we cannot generally form this subreg.  
     Lowpart subregs are otherwise valid.  
     This should always pass, otherwise we don't know how to verify
     the constraint.  These conditions may be relaxed but
     subreg_regno_offset would need to be redesigned.  
     The XMODE value can be seen as a vector of NREGS_XMODE
     values.  The subreg must represent a lowpart of given field.
     Compute what field it is.  
     Size of ymode must not be greater than the size of xmode.  

Referenced by invert_exp_1(), and invert_jump_1().

unsigned int subreg_highpart_offset ( enum  machine_mode,
enum  machine_mode 
unsigned int subreg_lowpart_offset ( enum  machine_mode,
enum  machine_mode 
int subreg_lowpart_p ( const_rtx  )
unsigned int subreg_lsb ( const_rtx  )
unsigned int subreg_lsb_1 ( enum machine_mode  outer_mode,
enum machine_mode  inner_mode,
unsigned int  subreg_byte 
   Helper function for subreg_lsb.  Given a subreg's OUTER_MODE, INNER_MODE,
   and SUBREG_BYTE, return the bit offset where the subreg begins
   (counting from the least significant bit of the operand).  
     A paradoxical subreg begins at bit position 0.  
       If the subreg crosses a word boundary ensure that
       it also begins and ends on a word boundary.  
unsigned int subreg_nregs ( const_rtx  )
unsigned int subreg_nregs_with_regno ( unsigned  int,
bool subreg_offset_representable_p ( unsigned int  xregno,
enum machine_mode  xmode,
unsigned int  offset,
enum machine_mode  ymode 
   This function returns true when the offset is representable via
   subreg_offset in the given regno.
   xregno - A regno of an inner hard subreg_reg (or what will become one).
   xmode  - The mode of xregno.
   offset - The byte offset.
   ymode  - The mode of a top level SUBREG (or what may become one).
   RETURN - Whether the offset is representable.  

References i2, keep_with_call_p(), next_nonnote_insn(), and targetm.

Referenced by validate_subreg().

unsigned int subreg_regno ( const_rtx  )

Referenced by update_live_status().

unsigned int subreg_regno_offset ( unsigned int  xregno,
enum machine_mode  xmode,
unsigned int  offset,
enum machine_mode  ymode 
   This function returns the regno offset of a subreg expression.
   xregno - A regno of an inner hard subreg_reg (or what will become one).
   xmode  - The mode of xregno.
   offset - The byte offset.
   ymode  - The mode of a top level SUBREG (or what may become one).
   RETURN - The regno offset which would be used.  
bool swap_commutative_operands_p ( rtx  ,
enum rtx_code swap_condition ( enum  rtx_code)
int true_dependence ( const_rtx  ,
enum  machine_mode,
int true_regnum ( const_rtx  )
HOST_WIDE_INT trunc_int_for_mode ( HOST_WIDE_INT  ,
enum  machine_mode 
   Generally useful functions.  
   In explow.c 
bool truncated_to_mode ( enum  machine_mode,
rtx try_split ( rtx  ,
rtx  ,
   In emit-rtl.c  
rtx unlink_insn_chain ( rtx  ,
unsigned int unshare_all_rtl ( void  )
void unshare_all_rtl_again ( rtx  )
void unshare_all_rtl_in_chain ( rtx  )
enum rtx_code unsigned_condition ( enum  rtx_code)
bool unsigned_reg_p ( rtx  )
void update_address ( struct address_info )
void update_alignments ( vec< rtx > &  )
void update_temp_slot_address ( rtx  ,
bool val_signbit_known_clear_p ( enum  machine_mode,
unsigned  HOST_WIDE_INT 
bool val_signbit_known_set_p ( enum  machine_mode,
unsigned  HOST_WIDE_INT 
bool val_signbit_p ( enum  machine_mode,
unsigned  HOST_WIDE_INT 

Referenced by emit_cstore().

bool validate_subreg ( enum machine_mode  omode,
enum machine_mode  imode,
const_rtx  reg,
unsigned int  offset 
   We want to create (subreg:OMODE (obj:IMODE) OFFSET).  Return true if
   this construct would be valid, and false otherwise.  
     All subregs must be aligned.  
     The subreg offset cannot be outside the inner object.  
     ??? This should not be here.  Temporarily continue to allow word_mode
     subregs of anything.  The most common offender is (subreg:SI (reg:DF)).
     Generally, backends are doing something sketchy but it'll take time to
     fix them all.  
     ??? Similarly, e.g. with (subreg:DF (reg:TI)).  Though store_bit_field
     is the culprit here, and not the backends.  
     Allow component subregs of complex and vector.  Though given the below
     extraction rules, it's not always clear what that means.  
     ??? x86 sse code makes heavy use of *paradoxical* vector subregs,
     i.e. (subreg:V4SF (reg:SF) 0).  This surely isn't the cleanest way to
     represent this.  It's questionable if this ought to be represented at
     all -- why can't this all be hidden in post-reload splitters that make
     arbitrarily mode changes to the registers themselves.  
     Subregs involving floating point modes are not allowed to
     change size.  Therefore (subreg:DI (reg:DF) 0) is fine, but
     (subreg:SI (reg:DF) 0) isn't.  
                LRA can use subreg to store a floating point value in
                an integer mode.  Although the floating point and the
                integer modes need the same number of hard registers,
                the size of floating point mode can be less than the
                integer mode.  LRA also uses subregs for a register
                should be used in different mode in on insn.  
     Paradoxical subregs must have offset zero.  
     This is a normal subreg.  Verify that the offset is representable.  
     For hard registers, we already have most of these rules collected in
     For pseudo registers, we want most of the same checks.  Namely:
     If the register no larger than a word, the subreg must be lowpart.
     If the register is larger than a word, the subreg must be the lowpart
     of a subword.  A subreg does *not* perform arbitrary bit extraction.
     Given that we've already checked mode/offset alignment, we only have
     to check subword subregs here.  

References subreg_offset_representable_p().

Referenced by extract_split_bit_field(), and vt_stack_adjustments().

unsigned int variable_tracking_main ( void  )
   In var-tracking.c 
void verify_rtl_sharing ( void  )
   Go through all the RTL insn bodies and check that there is no unexpected
   sharing in between the subexpressions.  
int volatile_refs_p ( const_rtx  )
void vt_equate_reg_base_value ( const_rtx  ,

Variable Documentation

rtx cc0_rtx

Referenced by cse_prescan_path().

rtx const_int_rtx[MAX_SAVED_CONST_INT *2+1]
   We make one copy of (const_int C) where C is in
   to save space during the compilation and simplify comparisons of
rtx const_tiny_rtx[4][(int) MAX_MACHINE_MODE]
   We record floating-point CONST_DOUBLEs in each floating-point mode for
   the values of 0, 1, and 2.  For the integer entries and VOIDmode, we
   record a copy of const[012]_rtx and constm1_rtx.  CONSTM1_RTX
   is set only for MODE_INT and MODE_VECTOR_INT modes.  
int cse_not_expected
   If this is nonzero, we do not bother generating VOLATILE
   around volatile memory references, and we are willing to
   output indirect addresses.  If cse is to follow, we reject
   indirect addresses so a useful potential cse is generated;
   if it is used only once, instruction combination will produce
   the same indirect address eventually.  
int currently_expanding_to_rtl
   Nonzero when we are expanding trees to RTL.  
struct target_rtl default_target_rtl

Emit RTL for the GCC expander. Copyright (C) 1987-2013 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

   Middle-to-low level generation of rtx code and insns.

   This file contains support functions for creating rtl expressions
   and manipulating them in the doubly-linked chain of insns.

   The patterns of the insns are created by machine-dependent
   routines in insn-emit.c, which is generated automatically from
   the machine description.  These routines make the individual rtx's
   of the pattern with `gen_rtx_fmt_ee' and others in genrtl.[ch],
   which are automatically generated from rtl.def; what is machine
   dependent is the kind of rtx's they make and what arguments they
HARD_REG_SET eliminable_regset
   In ira.c 
   All registers that can be eliminated.  

Referenced by find_call_crossed_cheap_reg(), insn_contains_asm(), insn_contains_asm_1(), and substitute_pseudo().

int epilogue_completed
   Nonzero after thread_prologue_and_epilogue_insns has run.  

Referenced by redirect_exp_1().

location_t epilogue_location
struct rtl_hooks general_rtl_hooks
   ... but then it has to restore these.  

Generic hooks for the RTL middle-end. Copyright (C) 2004-2013 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

   For speed, we will copy the RTX hooks struct member-by-member
   instead of doing indirect calls.  For these reason, we initialize
   *two* struct rtl_hooks globals: rtl_hooks is the one that is used
   to actually call the hooks, while general_rtl_hooks is used
   to restore the hooks by passes that modify them.  
int generating_concat_p
   Nonzero when we are generating CONCATs.  

Referenced by push_function_context(), and tree_conflicts_with_clobbers_p().

int lra_in_progress
   Set to 1 while in lra.  

Referenced by address_operand(), and gen_tmp_stack_mem().

const char* const note_insn_name[NOTE_INSN_MAX]
   Names for NOTE insn's other than line numbers.  
   Names for kinds of NOTEs and REG_NOTEs.  
rtx pc_rtx
   Standard pieces of rtx, to be substituted directly into things.  

Referenced by add_stack_var_conflict(), alter_reg(), dwf_regno(), gen_formal_parameter_die(), get_jump_flags(), and rtx_for_function_call().

const char* print_rtx_head
   In print-rtl.c 
   String printed at beginning of each RTL when it is dumped.
   This string is set to ASM_COMMENT_START when the RTL is dumped in
   the assembly output file.  

Referenced by debug_rtx_find().

location_t prologue_location
const char* const reg_note_name[]
   Names for REG_NOTE's in EXPR_LIST insn's.  
int regstack_completed
   Nonzero after end of regstack pass.
   Set to 1 or 0 by reg-stack.c.  
int reload_completed
   Nonzero after end of reload pass.
   Set to 1 or 0 by reload1.c.  
   Nonzero after end of reload pass.
   Set to 1 or 0 by toplev.c.
   Controls the significance of (SUBREG (MEM)).  

Referenced by canonicalize_change_group(), cond_move_convert_if_block(), df_mark_reg(), loop_canon_p(), mark_reg_death(), moving_insn_creates_bookkeeping_block_p(), and subreg_lowpart_offset().

int reload_in_progress
   Set to 1 while reload_as_needed is operating.
   Required by some machines to handle any generated moves differently.  

Referenced by canonicalize_change_group(), constrain_operands(), and set_storage_via_setmem().

rtx ret_rtx

Referenced by insn_sets_resource_p().

   Each pass can provide its own.  
enum rtx_class rtx_class[NUM_RTX_CODE]
   Indexed by rtx code, gives a character representing the "class" of
   that rtx code.  See rtl.def for documentation on the defined classes.  
const unsigned char rtx_code_size[NUM_RTX_CODE]
   Indexed by rtx code, gives the size of the rtx in bytes.  
const char* const rtx_format[NUM_RTX_CODE]
   Indexed by rtx code, gives a sequence of operand-types for
   rtx's of that code.  The sequence is a C string in which
   each character describes one operand.  
const unsigned char rtx_length[NUM_RTX_CODE]
const char* const rtx_name[NUM_RTX_CODE]

Referenced by change_cfi_row(), and connect_traces().

const unsigned char rtx_next[NUM_RTX_CODE]
rtx simple_return_rtx

Referenced by insn_sets_resource_p().

int split_branch_probability
   Probability of the conditional branch currently proceeded by try_split.
   Set to -1 otherwise.  
rtx stack_limit_rtx
   In toplev.c 

Referenced by crash_signal(), and handle_common_deferred_options().

struct target_rtl* this_target_rtl