- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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Data Structures | |
| struct | simplify_plus_minus_op_data |
Enumerations | |
| enum | { CMP_EQ = 1, CMP_LT = 2, CMP_GT = 4, CMP_LTU = 8, CMP_GTU = 16 } |
Functions | |
| static rtx | neg_const_int (enum machine_mode, const_rtx) |
| static bool | plus_minus_operand_p (const_rtx) |
| static bool | simplify_plus_minus_op_data_cmp (rtx, rtx) |
| static rtx | simplify_plus_minus (enum rtx_code, enum machine_mode, rtx, rtx) |
| static rtx | simplify_immed_subreg (enum machine_mode, rtx, enum machine_mode, unsigned int) |
| static rtx | simplify_associative_operation (enum rtx_code, enum machine_mode, rtx, rtx) |
| static rtx | simplify_relational_operation_1 (enum rtx_code, enum machine_mode, enum machine_mode, rtx, rtx) |
| static rtx | simplify_unary_operation_1 (enum rtx_code, enum machine_mode, rtx) |
| static rtx | simplify_binary_operation_1 (enum rtx_code, enum machine_mode, rtx, rtx, rtx, rtx) |
| static rtx | neg_const_int () |
| bool | mode_signbit_p () |
| bool | val_signbit_p () |
| bool | val_signbit_known_set_p () |
| bool | val_signbit_known_clear_p () |
| rtx | simplify_gen_binary (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1) |
| rtx | avoid_constant_pool_reference () |
| rtx | delegitimize_mem_from_attrs () |
| rtx | simplify_gen_unary (enum rtx_code code, enum machine_mode mode, rtx op, enum machine_mode op_mode) |
| rtx | simplify_gen_ternary (enum rtx_code code, enum machine_mode mode, enum machine_mode op0_mode, rtx op0, rtx op1, rtx op2) |
| rtx | simplify_gen_relational (enum rtx_code code, enum machine_mode mode, enum machine_mode cmp_mode, rtx op0, rtx op1) |
| rtx | simplify_replace_fn_rtx (rtx x, const_rtx old_rtx, rtx(*fn)(rtx, const_rtx, void *), void *data) |
| rtx | simplify_replace_rtx () |
| static rtx | simplify_truncation (enum machine_mode mode, rtx op, enum machine_mode op_mode) |
| rtx | simplify_unary_operation (enum rtx_code code, enum machine_mode mode, rtx op, enum machine_mode op_mode) |
| static rtx | simplify_unary_operation_1 () |
| rtx | simplify_const_unary_operation (enum rtx_code code, enum machine_mode mode, rtx op, enum machine_mode op_mode) |
| static rtx | simplify_byte_swapping_operation (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1) |
| rtx | simplify_binary_operation (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1) |
| rtx | simplify_const_binary_operation (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1) |
| static bool | simplify_plus_minus_op_data_cmp () |
| static bool | plus_minus_operand_p () |
| rtx | simplify_relational_operation (enum rtx_code code, enum machine_mode mode, enum machine_mode cmp_mode, rtx op0, rtx op1) |
| static rtx | comparison_result () |
| rtx | simplify_const_relational_operation (enum rtx_code code, enum machine_mode mode, rtx op0, rtx op1) |
| rtx | simplify_ternary_operation (enum rtx_code code, enum machine_mode mode, enum machine_mode op0_mode, rtx op0, rtx op1, rtx op2) |
| rtx | simplify_subreg (enum machine_mode outermode, rtx op, enum machine_mode innermode, unsigned int byte) |
| rtx | simplify_gen_subreg (enum machine_mode outermode, rtx op, enum machine_mode innermode, unsigned int byte) |
| rtx | simplify_rtx () |
| rtx avoid_constant_pool_reference | ( | ) |
If X is a MEM referencing the constant pool, return the real value. Otherwise return X.
Handle float extensions of constant pool references.
Call target hook to avoid the effects of -fpic etc....
Split the address into a base and integer offset.
If this is a constant pool reference, we can turn it into its
constant and hope that simplifications happen. If we're accessing the constant in a different mode than it was
originally stored, attempt to fix that up via subreg simplifications.
If that fails we have no choice but to return the original memory.
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Convert the known results for EQ, LT, GT, LTU, GTU contained in KNOWN_RESULT to a CONST_INT, based on the requested comparison CODE For KNOWN_RESULT to make sense it should be either CMP_EQ, or the logical OR of one of (CMP_LT, CMP_GT) and one of (CMP_LTU, CMP_GTU). For floating-point comparisons, assume that the operands were ordered.
Referenced by simplify_relational_operation_1().
| rtx delegitimize_mem_from_attrs | ( | ) |
Simplify a MEM based on its attributes. This is the default delegitimize_address target hook, and it's recommended that every overrider call it.
MEMs without MEM_OFFSETs may have been offset, so we can't just
use their base addresses as equivalent. Avoid creating a new MEM needlessly if we already had
the same address. We do if there's no OFFSET and the
old address X is identical to NEWX, or if X is of the
form (plus NEWX OFFSET), or the NEWX is of the form
(plus Y (const_int Z)) and X is that with the offset
added: (plus Y (const_int Z+OFFSET)).
References get_inner_reference(), host_integerp(), and HOST_WIDE_INT.
| bool mode_signbit_p | ( | ) |
Test whether expression, X, is an immediate constant that represents the most significant bit of machine mode MODE.
FIXME: We don't yet have a representation for wider modes.
Referenced by simplify_plus_minus_op_data_cmp().
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Negate a CONST_INT rtx, truncating (because a conversion from a maximally negative number can overflow).
References HOST_WIDE_INT.
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Check whether an operand is suitable for calling simplify_plus_minus.
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Subroutine of simplify_binary_operation to simplify a commutative, associative binary operation CODE with result mode MODE, operating on OP0 and OP1. CODE is currently one of PLUS, MULT, AND, IOR, XOR, SMIN, SMAX, UMIN or UMAX. Return zero if no simplification or canonicalization is possible.
Linearize the operator to the left.
"(a op b) op (c op d)" becomes "((a op b) op c) op d)".
"a op (b op c)" becomes "(b op c) op a".
Canonicalize "(x op c) op y" as "(x op y) op c".
Attempt to simplify "(a op b) op c" as "a op (b op c)".
Attempt to simplify "(a op b) op c" as "(a op c) op b".
Simplify a binary operation CODE with result mode MODE, operating on OP0 and OP1. Return 0 if no simplification is possible. Don't use this for relational operations such as EQ or LT. Use simplify_relational_operation instead.
Relational operations don't work here. We must know the mode
of the operands in order to do the comparison correctly.
Assuming a full word can give incorrect results.
Consider comparing 128 with -128 in QImode. Make sure the constant is second.
Referenced by simplify_relational_operation_1().
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Subroutine of simplify_binary_operation. Simplify a binary operation CODE with result mode MODE, operating on OP0 and OP1. If OP0 and/or OP1 are constant pool references, TRUEOP0 and TRUEOP1 represent the actual constants.
Even if we can't compute a constant result,
there are some cases worth simplifying. Maybe simplify x + 0 to x. The two expressions are equivalent
when x is NaN, infinite, or finite and nonzero. They aren't
when x is -0 and the rounding mode is not towards -infinity,
since (-0) + 0 is then 0. ((-a) + b) -> (b - a) and similarly for (a + (-b)). These
transformations are safe even for IEEE. (~a) + 1 -> -a
Handle both-operands-constant cases. We can only add
CONST_INTs to constants since the sum of relocatable symbols
can't be handled by most assemblers. Don't add CONST_INT
to CONST_INT since overflow won't be computed properly if wider
than HOST_BITS_PER_WIDE_INT. See if this is something like X * C - X or vice versa or
if the multiplication is written as a shift. If so, we can
distribute and make a new multiply, shift, or maybe just
have X (if C is 2 in the example above). But don't make
something more expensive than we had before. (plus (xor X C1) C2) is (xor X (C1^C2)) if C2 is signbit.
Canonicalize (plus (mult (neg B) C) A) to (minus A (mult B C)).
(plus (comparison A B) C) can become (neg (rev-comp A B)) if
C is 1 and STORE_FLAG_VALUE is -1 or if C is -1 and STORE_FLAG_VALUE
is 1. If one of the operands is a PLUS or a MINUS, see if we can
simplify this by the associative law.
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. Reassociate floating point addition only when the user
specifies associative math operations. Convert (compare (gt (flags) 0) (lt (flags) 0)) to (flags).
We can't assume x-x is 0 even with non-IEEE floating point,
but since it is zero except in very strange circumstances, we
will treat it as zero with -ffinite-math-only. Change subtraction from zero into negation. (0 - x) is the
same as -x when x is NaN, infinite, or finite and nonzero.
But if the mode has signed zeros, and does not round towards
-infinity, then 0 - 0 is 0, not -0. (-1 - a) is ~a.
Subtracting 0 has no effect unless the mode has signed zeros
and supports rounding towards -infinity. In such a case,
0 - 0 is -0. See if this is something like X * C - X or vice versa or
if the multiplication is written as a shift. If so, we can
distribute and make a new multiply, shift, or maybe just
have X (if C is 2 in the example above). But don't make
something more expensive than we had before. (a - (-b)) -> (a + b). True even for IEEE.
(-x - c) may be simplified as (-c - x).
Don't let a relocatable value get a negative coeff.
(x - (x & y)) -> (x & ~y)
If STORE_FLAG_VALUE is 1, (minus 1 (comparison foo bar)) can be done
by reversing the comparison code if valid. Canonicalize (minus A (mult (neg B) C)) to (plus (mult B C) A).
Canonicalize (minus (neg A) (mult B C)) to
(minus (mult (neg B) C) A). If one of the operands is a PLUS or a MINUS, see if we can
simplify this by the associative law. This will, for example,
canonicalize (minus A (plus B C)) to (minus (minus A B) C).
Don't use the associative law for floating point.
The inaccuracy makes it nonassociative,
and subtle programs can break if operations are associated. If op1 is a MULT as well and simplify_unary_operation
just moved the NEG to the second operand, simplify_gen_binary
below could through simplify_associative_operation move
the NEG around again and recurse endlessly. If op0 is a MULT as well and simplify_unary_operation
just moved the NEG to the second operand, simplify_gen_binary
below could through simplify_associative_operation move
the NEG around again and recurse endlessly. Maybe simplify x * 0 to 0. The reduction is not valid if
x is NaN, since x * 0 is then also NaN. Nor is it valid
when the mode has signed zeros, since multiplying a negative
number by 0 will give -0, not 0. In IEEE floating point, x*1 is not equivalent to x for
signalling NaNs. Convert multiply by constant power of two into shift unless
we are still generating RTL. This test is a kludge. If the mode is larger than the host word size, and the
uppermost bit is set, then this isn't a power of two due
to implicit sign extension. Likewise for multipliers wider than a word.
x*2 is x+x and x*(-1) is -x
Optimize -x * -x as x * x.
Likewise, optimize abs(x) * abs(x) as x * x.
Reassociate multiplication, but for floating point MULTs
only when the user specifies unsafe math optimizations. A | (~A) -> -1
(ior A C) is C if all bits of A that might be nonzero are on in C.
Canonicalize (X & C1) | C2.
If (C1&C2) == C1, then (X&C1)|C2 becomes X.
If (C1|C2) == ~0 then (X&C1)|C2 becomes X|C2.
Minimize the number of bits set in C1, i.e. C1 := C1 & ~C2.
Convert (A & B) | A to A.
Convert (ior (ashift A CX) (lshiftrt A CY)) where CX+CY equals the
mode size to (rotate A CX). Same, but for ashift that has been "simplified" to a wider mode
by simplify_shift_const. If we have (ior (and (X C1) C2)), simplify this by making
C1 as small as possible if C1 actually changes. If OP0 is (ashiftrt (plus ...) C), it might actually be
a (sign_extend (plus ...)). Then check if OP1 is a CONST_INT and
the PLUS does not affect any of the bits in OP1: then we can do
the IOR as a PLUS and we can associate. This is valid if OP1
can be safely shifted left C bits. Canonicalize XOR of the most significant bit to PLUS.
(xor (plus X C1) C2) is (xor X (C1^C2)) if C1 is signbit.
If we are XORing two things that have no bits in common,
convert them into an IOR. This helps to detect rotation encoded
using those methods and possibly other simplifications. Convert (XOR (NOT x) (NOT y)) to (XOR x y).
Also convert (XOR (NOT x) y) to (NOT (XOR x y)), similarly for
(NOT y). Convert (xor (and A B) B) to (and (not A) B). The latter may
correspond to a machine insn or result in further simplifications
if B is a constant. Given (xor (and A B) C), using P^Q == (~P&Q) | (~Q&P),
we can transform like this:
(A&B)^C == ~(A&B)&C | ~C&(A&B)
== (~A|~B)&C | ~C&(A&B) * DeMorgan's Law
== ~A&C | ~B&C | A&(~C&B) * Distribute and re-order
Attempt a few simplifications when B and C are both constants. Try to simplify ~A&C | ~B&C.
If ~A&C is zero, simplify A&(~C&B) | ~B&C.
(xor (comparison foo bar) (const_int 1)) can become the reversed
comparison if STORE_FLAG_VALUE is 1. (lshiftrt foo C) where C is the number of bits in FOO minus 1
is (lt foo (const_int 0)), so we can perform the above
simplification if STORE_FLAG_VALUE is 1. (xor (comparison foo bar) (const_int sign-bit))
when STORE_FLAG_VALUE is the sign bit. If we are turning off bits already known off in OP0, we need
not do an AND. If we are clearing all the nonzero bits, the result is zero.
A & (~A) -> 0
Transform (and (extend X) C) into (zero_extend (and X C)) if
there are no nonzero bits of C outside of X's mode. Transform (and (truncate X) C) into (truncate (and X C)). This way
we might be able to further simplify the AND with X and potentially
remove the truncation altogether. Canonicalize (A | C1) & C2 as (A & C2) | (C1 & C2).
Convert (A ^ B) & A to A & (~B) since the latter is often a single
insn (and may simplify more). Similarly for (~(A ^ B)) & A.
Convert (A | B) & A to A.
For constants M and N, if M == (1LL << cst) - 1 && (N & M) == M,
((A & N) + B) & M -> (A + B) & M
Similarly if (N & M) == 0,
((A | N) + B) & M -> (A + B) & M
and for - instead of + and/or ^ instead of |.
Also, if (N & M) == 0, then
(A +- N) & M -> A & M. (and X (ior (not X) Y) -> (and X Y)
(and (ior (not X) Y) X) -> (and X Y)
0/x is 0 (or x&0 if x has side-effects).
x/1 is x.
Convert divide by power of two into shift.
Handle floating point and integers separately.
Maybe change 0.0 / x to 0.0. This transformation isn't
safe for modes with NaNs, since 0.0 / 0.0 will then be
NaN rather than 0.0. Nor is it safe for modes with signed
zeros, since dividing 0 by a negative number gives -0.0 x/1.0 is x.
x/-1.0 is -x.
Change FP division by a constant into multiplication.
Only do this with -freciprocal-math. 0/x is 0 (or x&0 if x has side-effects).
x/1 is x.
x/-1 is -x.
0%x is 0 (or x&0 if x has side-effects).
x%1 is 0 (of x&0 if x has side-effects).
Implement modulus by power of two as AND.
0%x is 0 (or x&0 if x has side-effects).
x%1 and x%-1 is 0 (or x&0 if x has side-effects).
Canonicalize rotates by constant amount. If op1 is bitsize / 2,
prefer left rotation, if op1 is from bitsize / 2 + 1 to
bitsize - 1, use other direction of rotate with 1 .. bitsize / 2 - 1
amount instead. FALLTHRU
Rotating ~0 always results in ~0.
Optimize (lshiftrt (clz X) C) as (eq X 0).
??? There are simplifications that can be done.
Extract a scalar element from a nested VEC_SELECT expression
(with optional nested VEC_CONCAT expression). Some targets
(i386) extract scalar element from a vector using chain of
nested VEC_SELECT expressions. When input operand is a memory
operand, this operation can be simplified to a simple scalar
load from an offseted memory address. Select element, pointed by nested selector.
Handle the case when nested VEC_SELECT wraps VEC_CONCAT.
Find out number of elements of each operand.
Select correct operand of VEC_CONCAT
and adjust selector. Recognize the identity.
If we build {a,b} then permute it, build the result directly. Try to find the element in the VEC_CONCAT.
If we select elements in a vec_merge that all come from the same
operand, select from that operand directly. Try to merge two VEC_SELECTs from the same vector into a single one.
Restrict the transformation to avoid generating a VEC_SELECT with a
mode unrelated to its operand.
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Subroutine of simplify_binary_operation to simplify a binary operation CODE that can commute with byte swapping, with result mode MODE and operating on OP0 and OP1. CODE is currently one of AND, IOR or XOR. Return zero if no simplification or canonicalization is possible.
(op (bswap x) C1)) -> (bswap (op x C2)) with C2 swapped.
(op (bswap x) (bswap y)) -> (bswap (op x y)).
References simplify_gen_binary(), and simplify_gen_unary().
| rtx simplify_const_binary_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| rtx | op0, | ||
| rtx | op1 | ||
| ) |
Inf + -Inf = NaN plus exception.
Inf - Inf = NaN plus exception.
Inf / Inf = NaN plus exception.
Inf * 0 = NaN plus exception.
Don't constant fold this floating point operation if
the result has overflowed and flag_trapping_math. Overflow plus exception.
Don't constant fold this floating point operation if the
result may dependent upon the run-time rounding mode and
flag_rounding_math is set, or if GCC's software emulation
is unable to accurately represent the result. We can fold some multi-word operations.
A - B == A + (-B).
Fall through....
Get the integer argument values in two forms:
zero-extended in ARG0, ARG1 and sign-extended in ARG0S, ARG1S. Compute the value of the arithmetic.
Truncate the shift if SHIFT_COUNT_TRUNCATED, otherwise make sure
the value is in range. We can't return any old value for
out-of-range arguments because either the middle-end (via
shift_truncation_mask) or the back-end might be relying on
target-specific knowledge. Nor can we rely on
shift_truncation_mask, since the shift might not be part of an
ashlM3, lshrM3 or ashrM3 instruction. Sign-extend the result for arithmetic right shifts.
Do nothing here.
??? There are simplifications that can be done.
References double_int::alshift(), HOST_WIDE_INT, double_int::lrotate(), double_int::rrotate(), and double_int::rshift().
| rtx simplify_const_relational_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| rtx | op0, | ||
| rtx | op1 | ||
| ) |
Check if the given comparison (done in the given MODE) is actually a tautology or a contradiction. If no simplification is possible, this function returns zero. Otherwise, it returns either const_true_rtx or const0_rtx.
If op0 is a compare, extract the comparison arguments from it.
We can't simplify MODE_CC values since we don't know what the
actual comparison is. Make sure the constant is second.
For integer comparisons of A and B maybe we can simplify A - B and can
then simplify a comparison of that with zero. If A and B are both either
a register or a CONST_INT, this can't help; testing for these cases will
prevent infinite recursion here and speed things up.
We can only do this for EQ and NE comparisons as otherwise we may
lose or introduce overflow which we cannot disregard as undefined as
we do not know the signedness of the operation on either the left or
the right hand side of the comparison. We cannot do this if tem is a nonzero address.
For modes without NaNs, if the two operands are equal, we know the
result except if they have side-effects. Even with NaNs we know
the result of unordered comparisons and, if signaling NaNs are
irrelevant, also the result of LT/GT/LTGT. If the operands are floating-point constants, see if we can fold
the result. Comparisons are unordered iff at least one of the values is NaN.
Otherwise, see if the operands are both integers.
Get the two words comprising each integer constant.
If WIDTH is nonzero and smaller than HOST_BITS_PER_WIDE_INT,
we have to sign or zero-extend the values. Optimize comparisons with upper and lower bounds.
Get a reduced range if the sign bit is zero.
x >= y is always true for y <= mmin, always false for y > mmax.
x <= y is always true for y >= mmax, always false for y < mmin.
x == y is always false for y out of range.
x > y is always false for y >= mmax, always true for y < mmin.
x < y is always false for y <= mmin, always true for y > mmax.
x != y is always true for y out of range.
Optimize integer comparisons with zero.
Some addresses are known to be nonzero. We don't know
their sign, but equality comparisons are known. See if the first operand is an IOR with a constant. If so, we
may be able to determine the result of this comparison. Optimize comparison of ABS with zero.
Optimize abs(x) < 0.0.
Optimize abs(x) >= 0.0.
Optimize ! (abs(x) < 0.0).
Referenced by simplify_relational_operation_1().
| rtx simplify_const_unary_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| rtx | op, | ||
| enum machine_mode | op_mode | ||
| ) |
Try to compute the value of a unary operation CODE whose output mode is to be MODE with input operand OP whose mode was originally OP_MODE. Return zero if the value cannot be computed.
The order of these tests is critical so that, for example, we don't
check the wrong mode (input vs. output) for a conversion operation,
such as FIX. At some point, this should be simplified. We should never get a negative number.
Even if the value at zero is undefined, we have to come
up with some replacement. Seems good enough. When zero-extending a CONST_INT, we need to know its
original mode. If we were really extending the mode,
we would have to distinguish between zero-extension
and sign-extension. If we were really extending the mode,
we would have to distinguish between zero-extension
and sign-extension. We can do some operations on integer CONST_DOUBLEs. Also allow
for a DImode operation on a CONST_INT. This is just a change-of-mode, so do nothing.
All this does is change the mode, unless changing
mode class. Although the overflow semantics of RTL's FIX and UNSIGNED_FIX
operators are intentionally left unspecified (to ease implementation
by target backends), for consistency, this routine implements the
same semantics for constant folding as used by the middle-end. This was formerly used only for non-IEEE float.
eggert@twinsun.com says it is safe for IEEE also. Test against the signed upper bound.
Test against the signed lower bound.
Test against the unsigned upper bound.
References ctz_hwi(), ffs_hwi(), floor_log2(), HOST_BITS_PER_WIDE_INT, HOST_WIDE_INT, and val_signbit_known_set_p().
Make a binary operation by properly ordering the operands and seeing if the expression folds.
If this simplifies, do it.
Put complex operands first and constants second if commutative.
Referenced by iv_mult(), make_extraction(), noce_try_sign_mask(), simplify_and_const_int_1(), simplify_byte_swapping_operation(), simplify_truncation(), and simplify_unary_operation_1().
| rtx simplify_gen_relational | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| enum machine_mode | cmp_mode, | ||
| rtx | op0, | ||
| rtx | op1 | ||
| ) |
Likewise, for relational operations. CMP_MODE specifies mode comparison is done in.
Referenced by subst().
| rtx simplify_gen_subreg | ( | enum machine_mode | outermode, |
| rtx | op, | ||
| enum machine_mode | innermode, | ||
| unsigned int | byte | ||
| ) |
Make a SUBREG operation or equivalent if it folds.
Referenced by clear_storage_libcall_fn(), expand_debug_parm_decl(), set_storage_via_libcall(), and set_storage_via_setmem().
| rtx simplify_gen_ternary | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| enum machine_mode | op0_mode, | ||
| rtx | op0, | ||
| rtx | op1, | ||
| rtx | op2 | ||
| ) |
Likewise for ternary operations.
If this simplifies, use it.
| rtx simplify_gen_unary | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| rtx | op, | ||
| enum machine_mode | op_mode | ||
| ) |
Make a unary operation by first seeing if it folds and otherwise making the specified operation.
If this simplifies, use it.
Referenced by expand_debug_parm_decl(), iv_extend(), make_compound_operation(), make_extraction(), simplify_byte_swapping_operation(), simplify_replace_rtx(), simplify_truncation(), simplify_unary_operation_1(), simplify_while_replacing(), split_iv(), and subst().
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Evaluate a SUBREG of a CONST_INT or CONST_DOUBLE or CONST_FIXED or CONST_VECTOR, returning another CONST_INT or CONST_DOUBLE or CONST_FIXED or CONST_VECTOR. Works by unpacking OP into a collection of 8-bit values represented as a little-endian array of 'unsigned char', selecting by BYTE, and then repacking them again for OUTERMODE.
We support up to 512-bit values (for V8DFmode).
Some ports misuse CCmode.
We have no way to represent a complex constant at the rtl level.
Unpack the value.
If this asserts, it is too complicated; reducing value_bit may help.
I don't know how to handle endianness of sub-units.
Vectors are kept in target memory order. (This is probably
a mistake.) CONST_INTs are always logically sign-extended.
If this triggers, someone should have generated a
CONST_INT instead. real_to_target produces its result in words affected by
FLOAT_WORDS_BIG_ENDIAN. However, we ignore this,
and use WORDS_BIG_ENDIAN instead; see the documentation
of SUBREG in rtl.texi. It shouldn't matter what's done here, so fill it with
zero. Now, pick the right byte to start with.
Renumber BYTE so that the least-significant byte is byte 0. A special
case is paradoxical SUBREGs, which shouldn't be adjusted since they
will already have offset 0. BYTE should still be inside OP. (Note that BYTE is unsigned,
so if it's become negative it will instead be very large.) Convert from bytes to chunks of size value_bit.
Re-pack the value.
Vectors are stored in target memory order. (This is probably
a mistake.) immed_double_const doesn't call trunc_int_for_mode. I don't
know why. real_from_target wants its input in words affected by
FLOAT_WORDS_BIG_ENDIAN. However, we ignore this,
and use WORDS_BIG_ENDIAN instead; see the documentation
of SUBREG in rtl.texi.
|
static |
Set up the two operands and then expand them until nothing has been
changed. If we run out of room in our array, give up; this should
almost never happen. ~a -> (-a - 1)
If we only have two operands, we can avoid the loops.
Get the two operands. Be careful with the order, especially for
the cases where code == MINUS. Now simplify each pair of operands until nothing changes.
Insertion sort is good enough for an eight-element array.
Reject "simplifications" that just wrap the two
arguments in a CONST. Failure to do so can result
in infinite recursion with simplify_binary_operation
when it calls us to simplify CONST operations. If nothing changed, fail.
Pack all the operands to the lower-numbered entries.
Create (minus -C X) instead of (neg (const (plus X C))).
We suppressed creation of trivial CONST expressions in the
combination loop to avoid recursion. Create one manually now.
The combination loop should have ensured that there is exactly
one CONST_INT, and the sort will have ensured that it is last
in the array and that any other constant will be next-to-last. Put a non-negated operand first, if possible.
Now make the result by performing the requested operations.
|
static |
Group together equal REGs to do more simplification.
References neg_const_int(), and plus_constant().
| rtx simplify_relational_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| enum machine_mode | cmp_mode, | ||
| rtx | op0, | ||
| rtx | op1 | ||
| ) |
Like simplify_binary_operation except used for relational operators. MODE is the mode of the result. If MODE is VOIDmode, both operands must not also be VOIDmode. CMP_MODE specifies in which mode the comparison is done in, so it is the mode of the operands. If CMP_MODE is VOIDmode, it is taken from the operands or, if both are VOIDmode, the operands are compared in "infinite precision".
For the following tests, ensure const0_rtx is op1.
If op0 is a compare, extract the comparison arguments from it.
|
static |
This part of simplify_relational_operation is only used when CMP_MODE is not in class MODE_CC (i.e. it is a real comparison). MODE is the mode of the result, while CMP_MODE specifies in which mode the comparison is done in, so it is the mode of the operands.
If op0 is a comparison, extract the comparison arguments
from it. (LTU/GEU (PLUS a C) C), where C is constant, can be simplified to
(GEU/LTU a -C). Likewise for (LTU/GEU (PLUS a C) a). (LTU/GEU (PLUS a 0) 0) is not the same as (GEU/LTU a 0).
Canonicalize (LTU/GEU (PLUS a b) b) as (LTU/GEU (PLUS a b) a).
Don't recurse "infinitely" for (LTU/GEU (PLUS b b) b).
Canonicalize (GTU x 0) as (NE x 0).
Canonicalize (LEU x 0) as (EQ x 0).
Canonicalize (GE x 1) as (GT x 0).
Canonicalize (GEU x 1) as (NE x 0).
Canonicalize (LT x 1) as (LE x 0).
Canonicalize (LTU x 1) as (EQ x 0).
Canonicalize (LE x -1) as (LT x 0).
Canonicalize (GT x -1) as (GE x 0).
(eq/ne (plus x cst1) cst2) simplifies to (eq/ne x (cst2 - cst1))
Detect an infinite recursive condition, where we oscillate at this
simplification case between:
A + B == C <---> C - B == A,
where A, B, and C are all constants with non-simplifiable expressions,
usually SYMBOL_REFs. (ne:SI (zero_extract:SI FOO (const_int 1) BAR) (const_int 0))) is
the same as (zero_extract:SI FOO (const_int 1) BAR). ??? Work-around BImode bugs in the ia64 backend.
(eq/ne (xor x y) 0) simplifies to (eq/ne x y).
(eq/ne (xor x y) x) simplifies to (eq/ne y 0).
Likewise (eq/ne (xor x y) y) simplifies to (eq/ne x 0).
(eq/ne (xor x C1) C2) simplifies to (eq/ne x (C1^C2)).
(eq/ne (bswap x) C1) simplifies to (eq/ne x C2) with C2 swapped.
(eq/ne (bswap x) (bswap y)) simplifies to (eq/ne x y).
(eq (popcount x) (const_int 0)) -> (eq x (const_int 0)).
(ne (popcount x) (const_int 0)) -> (ne x (const_int 0)).
References avoid_constant_pool_reference(), CMP_GT, CMP_GTU, comparison_result(), const_true_rtx, d1, get_mode_bounds(), HOST_BITS_PER_WIDE_INT, HOST_WIDE_INT, nonzero_address_p(), nonzero_bits(), num_sign_bit_copies(), rtx_equal_p(), side_effects_p(), signed_condition(), simplify_binary_operation(), simplify_const_relational_operation(), swap_commutative_operands_p(), swap_condition(), and val_signbit_known_set_p().
| rtx simplify_replace_fn_rtx | ( | rtx | x, |
| const_rtx | old_rtx, | ||
| rtx(*)(rtx, const_rtx, void *) | fn, | ||
| void * | data | ||
| ) |
If FN is NULL, replace all occurrences of OLD_RTX in X with copy_rtx (DATA) and simplify the result. If FN is non-NULL, call this callback on each X, if it returns non-NULL, replace X with its return value and simplify the result.
(lo_sum (high x) x) -> x
| rtx simplify_replace_rtx | ( | ) |
Replace all occurrences of OLD_RTX in X with NEW_RTX and try to simplify the resulting RTX. Return a new RTX which is as simplified as possible.
References simplify_gen_unary().
| rtx simplify_rtx | ( | ) |
Simplify X, an rtx expression.
Return the simplified expression or NULL if no simplifications
were possible.
This is the preferred entry point into the simplification routines;
however, we still allow passes to call the more specific routines.
Right now GCC has three (yes, three) major bodies of RTL simplification
code that need to be unified.
1. fold_rtx in cse.c. This code uses various CSE specific
information to aid in RTL simplification.
2. simplify_rtx in combine.c. Similar to fold_rtx, except that
it uses combine specific information to aid in RTL
simplification.
3. The routines in this file.
Long term we want to only have one body of simplification code; to
get to that state I recommend the following steps:
1. Pour over fold_rtx & simplify_rtx and move any simplifications
which are not pass dependent state into these routines.
2. As code is moved by #1, change fold_rtx & simplify_rtx to
use this routine whenever possible.
3. Allow for pass dependent state to be provided to these
routines and add simplifications based on the pass dependent
state. Remove code from cse.c & combine.c that becomes
redundant/dead.
It will take time, but ultimately the compiler will be easier to
maintain and improve. It's totally silly that when we add a
simplification that it needs to be added to 4 places (3 for RTL
simplification and 1 for tree simplification. Fall through....
Convert (lo_sum (high FOO) FOO) to FOO.
| rtx simplify_subreg | ( | enum machine_mode | outermode, |
| rtx | op, | ||
| enum machine_mode | innermode, | ||
| unsigned int | byte | ||
| ) |
Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE) Return 0 if no simplifications are possible.
Little bit of sanity checking.
Changing mode twice with SUBREG => just change it once,
or not at all if changing back op starting mode. The SUBREG_BYTE represents offset, as if the value were stored
in memory. Irritating exception is paradoxical subreg, where
we define SUBREG_BYTE to be 0. On big endian machines, this
value should be negative. For a moment, undo this exception. See whether resulting subreg will be paradoxical.
In nonparadoxical subregs we can't handle negative offsets.
Bail out in case resulting subreg would be incorrect.
In paradoxical subreg, see if we are still looking on lower part.
If so, our SUBREG_BYTE will be 0. Recurse for further possible simplifications.
SUBREG of a hard register => just change the register number
and/or mode. If the hard register is not valid in that mode,
suppress this simplification. If the hard register is the stack,
frame, or argument pointer, leave this as a SUBREG. Adjust offset for paradoxical subregs.
Propagate original regno. We don't have any way to specify
the offset inside original regno, so do so only for lowpart.
The information is used only by alias analysis that can not
grog partial register anyway. If we have a SUBREG of a register that we are replacing and we are
replacing it with a MEM, make a new MEM and try replacing the
SUBREG with it. Don't do this if the MEM has a mode-dependent address
or if we would be widening it. Allow splitting of volatile memory references in case we don't
have instruction to move the whole thing. Handle complex values represented as CONCAT
of real and imaginary part. A SUBREG resulting from a zero extension may fold to zero if
it extracts higher bits that the ZERO_EXTEND's source bits.
Referenced by add_stores(), extract_split_bit_field(), make_extraction(), and set_storage_via_setmem().
| rtx simplify_ternary_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| enum machine_mode | op0_mode, | ||
| rtx | op0, | ||
| rtx | op1, | ||
| rtx | op2 | ||
| ) |
Simplify CODE, an operation with result mode MODE and three operands, OP0, OP1, and OP2. OP0_MODE was the mode of OP0 before it became a constant. Return 0 if no simplifications is possible.
VOIDmode means "infinite" precision.
Simplify negations around the multiplication.
-a * -b + c => a * b + c.
Canonicalize the two multiplication operands.
a * -b + c => -b * a + c.
Extracting a bit-field from a constant
First zero-extend.
If desired, propagate sign bit.
Convert c ? a : a into "a".
Convert a != b ? a : b into "a".
Convert a == b ? a : b into "b".
Look for happy constants in op1 and op2.
See if any simplifications were possible.
Replace (vec_merge (vec_merge a b m) c n) with (vec_merge b c n)
if no element from a appears in the result.
Try to simplify a MODE truncation of OP, which has OP_MODE.
Only handle cases where the truncated value is inherently an rvalue.
RTL provides two ways of truncating a value:
1. a lowpart subreg. This form is only a truncation when both
the outer and inner modes (here MODE and OP_MODE respectively)
are scalar integers, and only then when the subreg is used as
an rvalue.
It is only valid to form such truncating subregs if the
truncation requires no action by the target. The onus for
proving this is on the creator of the subreg -- e.g. the
caller to simplify_subreg or simplify_gen_subreg -- and typically
involves either TRULY_NOOP_TRUNCATION_MODES_P or truncated_to_mode.
2. a TRUNCATE. This form handles both scalar and compound integers.
The first form is preferred where valid. However, the TRUNCATE
handling in simplify_unary_operation turns the second form into the
first form when TRULY_NOOP_TRUNCATION_MODES_P or truncated_to_mode allow,
so it is generally safe to form rvalue truncations using:
simplify_gen_unary (TRUNCATE, ...)
and leave simplify_unary_operation to work out which representation
should be used.
Because of the proof requirements on (1), simplify_truncation must
also use simplify_gen_unary (TRUNCATE, ...) to truncate parts of OP,
regardless of whether the outer truncation came from a SUBREG or a
TRUNCATE. For example, if the caller has proven that an SImode
truncation of:
(and:DI X Y)
is a no-op and can be represented as a subreg, it does not follow
that SImode truncations of X and Y are also no-ops. On a target
like 64-bit MIPS that requires SImode values to be stored in
sign-extended form, an SImode truncation of:
(and:DI (reg:DI X) (const_int 63))
is trivially a no-op because only the lower 6 bits can be set.
However, X is still an arbitrary 64-bit number and so we cannot
assume that truncating it too is a no-op. Optimize truncations of zero and sign extended values.
There are three possibilities. If MODE is the same as the
origmode, we can omit both the extension and the subreg.
If MODE is not larger than the origmode, we can apply the
truncation without the extension. Finally, if the outermode
is larger than the origmode, we can just extend to the appropriate
mode. Simplify (truncate:SI (op:DI (x:DI) (y:DI)))
to (op:SI (truncate:SI (x:DI)) (truncate:SI (x:DI))). Simplify (truncate:QI (lshiftrt:SI (sign_extend:SI (x:QI)) C)) into
to (ashiftrt:QI (x:QI) C), where C is a suitable small constant and
the outer subreg is effectively a truncation to the original mode. Ensure that OP_MODE is at least twice as wide as MODE
to avoid the possibility that an outer LSHIFTRT shifts by more
than the sign extension's sign_bit_copies and introduces zeros
into the high bits of the result. Likewise (truncate:QI (lshiftrt:SI (zero_extend:SI (x:QI)) C)) into
to (lshiftrt:QI (x:QI) C), where C is a suitable small constant and
the outer subreg is effectively a truncation to the original mode. Likewise (truncate:QI (ashift:SI (zero_extend:SI (x:QI)) C)) into
to (ashift:QI (x:QI) C), where C is a suitable small constant and
the outer subreg is effectively a truncation to the original mode. Recognize a word extraction from a multi-word subreg.
If we have a TRUNCATE of a right shift of MEM, make a new MEM
and try replacing the TRUNCATE and shift with it. Don't do this
if the MEM has a mode-dependent address. (truncate:SI (OP:DI ({sign,zero}_extend:DI foo:SI))) is
(OP:SI foo:SI) if OP is NEG or ABS. (truncate:A (subreg:B (truncate:C X) 0)) is
(truncate:A X). If subreg above is paradoxical and C is narrower
than A, return (subreg:A (truncate:C X) 0). (truncate:A (truncate:B X)) is (truncate:A X).
References simplify_gen_binary(), and simplify_gen_unary().
| rtx simplify_unary_operation | ( | enum rtx_code | code, |
| enum machine_mode | mode, | ||
| rtx | op, | ||
| enum machine_mode | op_mode | ||
| ) |
Try to simplify a unary operation CODE whose output mode is to be MODE with input operand OP whose mode was originally OP_MODE. Return zero if no simplification can be made.
Referenced by convert_memory_address_addr_space(), find_comparison_args(), and may_trap_p().
|
static |
Perform some simplifications we can do even if the operands aren't constant.
(not (not X)) == X.
(not (eq X Y)) == (ne X Y), etc. if BImode or the result of the
comparison is all ones. (not (plus X -1)) can become (neg X).
Similarly, (not (neg X)) is (plus X -1).
(not (xor X C)) for C constant is (xor X D) with D = ~C.
(not (plus X C)) for signbit C is (xor X D) with D = ~C.
(not (ashift 1 X)) is (rotate ~1 X). We used to do this for
operands other than 1, but that is not valid. We could do a
similar simplification for (not (lshiftrt C X)) where C is
just the sign bit, but this doesn't seem common enough to
bother with. (not (ashiftrt foo C)) where C is the number of bits in FOO
minus 1 is (ge foo (const_int 0)) if STORE_FLAG_VALUE is -1,
so we can perform the above simplification. Apply De Morgan's laws to reduce number of patterns for machines
with negating logical insns (and-not, nand, etc.). If result has
only one NOT, put it first, since that is how the patterns are
coded. (not (bswap x)) -> (bswap (not x)).
(neg (neg X)) == X.
(neg (plus X 1)) can become (not X).
Similarly, (neg (not X)) is (plus X 1).
(neg (minus X Y)) can become (minus Y X). This transformation
isn't safe for modes with signed zeros, since if X and Y are
both +0, (minus Y X) is the same as (minus X Y). If the
rounding mode is towards +infinity (or -infinity) then the two
expressions will be rounded differently. (neg (plus A C)) is simplified to (minus -C A).
(neg (plus A B)) is canonicalized to (minus (neg A) B).
(neg (mult A B)) becomes (mult A (neg B)).
This works even for floating-point values. NEG commutes with ASHIFT since it is multiplication. Only do
this if we can then eliminate the NEG (e.g., if the operand
is a constant). (neg (ashiftrt X C)) can be replaced by (lshiftrt X C) when
C is equal to the width of MODE minus 1. (neg (lshiftrt X C)) can be replaced by (ashiftrt X C) when
C is equal to the width of MODE minus 1. (neg (xor A 1)) is (plus A -1) if A is known to be either 0 or 1.
(neg (lt x 0)) is (ashiftrt X C) if STORE_FLAG_VALUE is 1.
(neg (lt x 0)) is (lshiftrt X C) if STORE_FLAG_VALUE is -1.
Don't optimize (lshiftrt (mult ...)) as it would interfere
with the umulXi3_highpart patterns. We can't handle truncation to a partial integer mode here
because we don't know the real bitsize of the partial
integer mode. If we know that the value is already truncated, we can
replace the TRUNCATE with a SUBREG. A truncate of a comparison can be replaced with a subreg if
STORE_FLAG_VALUE permits. This is like the previous test,
but it works even if the comparison is done in a mode larger
than HOST_BITS_PER_WIDE_INT. A truncate of a memory is just loading the low part of the memory
if we are not changing the meaning of the address. (float_truncate:SF (float_extend:DF foo:SF)) = foo:SF.
(float_truncate:SF (float_truncate:DF foo:XF))
= (float_truncate:SF foo:XF).
This may eliminate double rounding, so it is unsafe.
(float_truncate:SF (float_extend:XF foo:DF))
= (float_truncate:SF foo:DF).
(float_truncate:DF (float_extend:XF foo:SF))
= (float_extend:SF foo:DF). (float_truncate (float x)) is (float x)
(float_truncate:SF (OP:DF (float_extend:DF foo:sf))) is
(OP:SF foo:SF) if OP is NEG or ABS. (float_truncate:SF (subreg:DF (float_truncate:SF X) 0))
is (float_truncate:SF x). (float_extend (float_extend x)) is (float_extend x)
(float_extend (float x)) is (float x) assuming that double
rounding can't happen.(abs (neg <foo>)) -> (abs <foo>)
If the mode of the operand is VOIDmode (i.e. if it is ASM_OPERANDS),
do nothing. If operand is something known to be positive, ignore the ABS.
If operand is known to be only -1 or 0, convert ABS to NEG.
(ffs (*_extend <X>)) = (ffs <X>)
(popcount (zero_extend <X>)) = (popcount <X>)
Rotations don't affect popcount.
Rotations don't affect parity.
(bswap (bswap x)) -> x.
(float (sign_extend <X>)) = (float <X>).
(sign_extend (truncate (minus (label_ref L1) (label_ref L2))))
becomes just the MINUS if its mode is MODE. This allows
folding switch statements on machines using casesi (such as
the VAX). Extending a widening multiplication should be canonicalized to
a wider widening multiplication. Widening multiplies usually extend both operands, but sometimes
they use a shift to extract a portion of a register. Number of bits not shifted off the end.
Size of inner mode.
We can only widen multiplies if the result is mathematiclly
equivalent. I.e. if overflow was impossible. Check for a sign extension of a subreg of a promoted
variable, where the promotion is sign-extended, and the
target mode is the same as the variable's promotion. (sign_extend:M (sign_extend:N <X>)) is (sign_extend:M <X>).
(sign_extend:M (zero_extend:N <X>)) is (zero_extend:M <X>). (sign_extend:M (ashiftrt:N (ashift <X> (const_int I)) (const_int I)))
is (sign_extend:M (subreg:O <X>)) if there is mode with
GET_MODE_BITSIZE (N) - I bits.
(sign_extend:M (lshiftrt:N (ashift <X> (const_int I)) (const_int I)))
is similarly (zero_extend:M (subreg:O <X>)). As we do not know which address space the pointer is referring to,
we can do this only if the target does not support different pointer
or address modes depending on the address space. Check for a zero extension of a subreg of a promoted
variable, where the promotion is zero-extended, and the
target mode is the same as the variable's promotion. Extending a widening multiplication should be canonicalized to
a wider widening multiplication. Widening multiplies usually extend both operands, but sometimes
they use a shift to extract a portion of a register. Number of bits not shifted off the end.
Size of inner mode.
We can only widen multiplies if the result is mathematiclly
equivalent. I.e. if overflow was impossible. (zero_extend:M (zero_extend:N <X>)) is (zero_extend:M <X>).
(zero_extend:M (lshiftrt:N (ashift <X> (const_int I)) (const_int I)))
is (zero_extend:M (subreg:O <X>)) if there is mode with
GET_MODE_BITSIZE (N) - I bits. (zero_extend:M (subreg:N <X:O>)) is <X:O> (for M == O) or
(zero_extend:M <X:O>), if X doesn't have any non-zero bits outside
of mode N. E.g.
(zero_extend:SI (subreg:QI (and:SI (reg:SI) (const_int 63)) 0)) is
(and:SI (reg:SI) (const_int 63)). As we do not know which address space the pointer is referring to,
we can do this only if the target does not support different pointer
or address modes depending on the address space.
References simplify_gen_binary(), and simplify_gen_unary().
| bool val_signbit_known_clear_p | ( | ) |
Test whether the most significant bit of mode MODE is clear in VAL. Returns false if the precision of MODE is too large to handle.
| bool val_signbit_known_set_p | ( | ) |
Test whether the most significant bit of mode MODE is set in VAL. Returns false if the precision of MODE is too large to handle.
| bool val_signbit_p | ( | ) |
Test whether VAL is equal to the most significant bit of mode MODE (after masking with the mode mask of MODE). Returns false if the precision of MODE is too large to handle.
1.8.1.1