GCC Middle and Back End API Reference
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struct | clobber_pat |
struct | clobber_ent |
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static void | print_code (RTX_CODE) |
static void | gen_exp (rtx, enum rtx_code, char *) |
static void | gen_insn (rtx, int) |
static void | gen_expand (rtx) |
static void | gen_split (rtx) |
static void | output_add_clobbers (void) |
static void | output_added_clobbers_hard_reg_p (void) |
static void | gen_rtx_scratch (rtx, enum rtx_code) |
static void | output_peephole2_scratches (rtx) |
static void | print_code () |
static void | gen_rtx_scratch () |
static void | gen_exp () |
static void | gen_insn () |
static void | gen_expand () |
static void | gen_split () |
static void | output_peephole2_scratches () |
int | main () |
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static int | insn_code_number |
static int | insn_index_number |
struct clobber_pat * | clobber_list |
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Print a C expression to construct an RTX just like X, substituting any operand references appearing within.
These shouldn't be written in MD files. Instead, the appropriate routines in varasm.c should be called.
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Generate the `gen_...' function for a DEFINE_EXPAND.
Find out how many operands this function has.
Output the function name and argument declarations.
If we don't have any C code to write, only one insn is being written, and no MATCH_DUPs are present, we can just return the desired insn like we do for a DEFINE_INSN. This saves memory.
For each operand referred to only with MATCH_DUPs, make a local variable.
The fourth operand of DEFINE_EXPAND is some code to be executed before the actual construction. This code expects to refer to `operands' just as the output-code in a DEFINE_INSN does, but here `operands' is an automatic array. So copy the operand values there before executing it.
Output code to copy the arguments into `operands'.
Output the special code to be executed before the sequence is generated.
Output code to copy the arguments back out of `operands' (unless we aren't going to use them at all).
Output code to construct the rtl for the instruction bodies. Use emit_insn to add them to the sequence being accumulated. But don't do this if the user's code has set `no_more' nonzero.
Call `get_insns' to extract the list of all the insns emitted within this gen_... function.
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Generate the `gen_...' function for a DEFINE_INSN.
See if the pattern for this insn ends with a group of CLOBBERs of (hard) registers or MATCH_SCRATCHes. If so, store away the information for later.
See if any previous CLOBBER_LIST entry is the same as this one.
OLD and NEW_INSN are the same if both are to be a SCRATCH of the same mode, or if both are registers of the same mode and number.
Don't mention instructions whose names are the null string or begin with '*'. They are in the machine description just to be recognized.
Find out how many operands this function has.
Output the function name and argument declarations.
Output code to construct and return the rtl for the instruction body.
References clobber_list, clobber_ent::code_number, clobber_pat::first_clobber, clobber_pat::has_hard_reg, insn_code_number, clobber_pat::insns, clobber_pat::next, clobber_ent::next, and clobber_pat::pattern.
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Like gen_expand, but generates insns resulting from splitting SPLIT.
Find out how many operands this function has.
Output the prototype, function name and argument declarations.
Declare all local variables.
The fourth operand of DEFINE_SPLIT is some code to be executed before the actual construction.
Output code to copy the arguments back out of `operands'
Output code to construct the rtl for the instruction bodies. Use emit_insn to add them to the sequence being accumulated. But don't do this if the user's code has set `no_more' nonzero.
Call `get_insns' to make a list of all the insns emitted within this gen_... function.
int main | ( | ) |
Assign sequential codes to all entries in the machine description in parallel with the tables in insn-output.c.
Read the machine description.
Write out the routines to add CLOBBERs to a pattern and say whether they clobber a hard reg.
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Write a function, `add_clobbers', that is given a PARALLEL of sufficient size for the insn and an INSN_CODE, and inserts the required CLOBBERs at the end of the vector.
References clobber_list, clobber_ent::code_number, clobber_pat::has_hard_reg, clobber_pat::insns, clobber_pat::next, and clobber_ent::next.
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Write a function, `added_clobbers_hard_reg_p' that is given an insn_code number that will have clobbers added (as indicated by `recog') and returns 1 if those include a clobber of a hard reg or 0 if all of them just clobber SCRATCH.
References first.
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Generate code to invoke find_free_register () as needed for the scratch registers used by the peephole2 pattern in SPLIT.
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struct clobber_pat * clobber_list |
Referenced by gen_insn(), and output_add_clobbers().
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@verbatim
Generate code from machine description to emit insns as rtl. Copyright (C) 1987-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
Referenced by gen_insn().
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