GCC Middle and Back End API Reference
postreload.c File Reference

Data Structures

struct  reg_use


static int reload_cse_noop_set_p (rtx)
static bool reload_cse_simplify (rtx, rtx)
static void reload_cse_regs_1 (void)
static int reload_cse_simplify_set (rtx, rtx)
static int reload_cse_simplify_operands (rtx, rtx)
static void reload_combine (void)
static void reload_combine_note_use (rtx *, rtx, int, rtx)
static void reload_combine_note_store (rtx, const_rtx, void *)
static bool reload_cse_move2add (rtx)
static void move2add_note_store (rtx, const_rtx, void *)
static void reload_cse_regs ()
static int reload_cse_noop_set_p ()
static bool reload_cse_simplify ()
static int reload_cse_simplify_set ()
static int reload_cse_simplify_operands ()
static void reload_combine_split_one_ruid ()
static void reload_combine_split_ruids ()
static void reload_combine_purge_insn_uses ()
static void reload_combine_purge_reg_uses_after_ruid ()
static struct reg_usereload_combine_closest_single_use ()
static void fixup_debug_insns ()
static bool try_replace_in_use ()
static bool reload_combine_recognize_const_pattern ()
static bool reload_combine_recognize_pattern ()
static void reload_combine_note_store ()
static void reload_combine_note_use ()
static void move2add_record_mode ()
static void move2add_record_sym_value ()
static bool move2add_valid_value_p ()
static bool move2add_use_add2_insn ()
static bool move2add_use_add3_insn ()
static bool reload_cse_move2add ()
static void move2add_note_store ()
static bool gate_handle_postreload ()
static unsigned int rest_of_handle_postreload ()
rtl_opt_passmake_pass_postreload_cse ()


struct {
   struct reg_use   reg_use [RELOAD_COMBINE_MAX_USES]
   rtx   offset
   int   use_index
   int   store_ruid
   int   real_store_ruid
   int   use_ruid
   bool   all_offsets_match
static int reload_combine_ruid
static int last_label_ruid
static int last_jump_ruid
static int first_index_reg = -1
static int last_index_reg
static int reg_set_luid [FIRST_PSEUDO_REGISTER]
static int reg_base_reg [FIRST_PSEUDO_REGISTER]
static rtx reg_symbol_ref [FIRST_PSEUDO_REGISTER]
static enum machine_mode reg_mode [FIRST_PSEUDO_REGISTER]
static int move2add_luid
static int move2add_last_label_luid

Function Documentation

static void fixup_debug_insns ( )
   After we've moved an add insn, fix up any debug insns that occur
   between the old location of the add and the new location.  REG is
   the destination register of the add insn; REPLACEMENT is the
   SET_SRC of the add.  FROM and TO specify the range in which we
   should make this change on debug insns.  

Referenced by reload_combine_recognize_const_pattern().

static bool gate_handle_postreload ( )
rtl_opt_pass* make_pass_postreload_cse ( )
static void move2add_note_store ( rtx  ,
const_rtx  ,
void *   
static void move2add_note_store ( )
   SET is a SET or CLOBBER that sets DST.  DATA is the insn which
   contains SET.
   Update reg_set_luid, reg_offset and reg_base_reg accordingly.
   Called from reload_cse_move2add via note_stores.  
     Some targets do argument pushes without adding REG_INC notes.  
                     Maybe the first register is known to be a
             Start tracking the register as a constant.  
             We assign the same luid to all registers set to constants.  
         If information about the base register is not valid, set it
         up as a new base register, pretending its value is known
         starting from the current insn.  
         Copy base information from our base register.  
         Compute the sum of the offsets or constants.  
         Invalidate the contents of the register.  
static void move2add_record_mode ( )
   Record that REG is being set to a value with the mode of REG.  
static void move2add_record_sym_value ( )
   Record that REG is being set to the sum of SYM and OFF.  
static bool move2add_use_add2_insn ( )
   This function is called with INSN that sets REG to (SYM + OFF),
   while REG is known to already have value (SYM + offset).
   This function tries to change INSN into an add instruction
   (set (REG) (plus (REG) (OFF - offset))) using the known value.
   It also updates the information about REG's known value.
   Return true if we made a change.  
     (set (reg) (plus (reg) (const_int 0))) is not canonical;
     use (set (reg) (reg)) instead.
     We don't delete this insn, nor do we convert it into a
     note, to avoid losing register notes or the return
     value flag.  jump2 already knows how to get rid of
     no-op moves.  
         If the constants are different, this is a
         truncation, that, if turned into (set (reg)
         (reg)), would be discarded.  Maybe we should
         try a truncMN pattern?  

Referenced by move2add_use_add3_insn().

static bool move2add_use_add3_insn ( )
   This function is called with INSN that sets REG to (SYM + OFF),
   but REG doesn't have known value (SYM + offset).  This function
   tries to find another register which is known to already have
   value (SYM + offset) and change INSN into an add instruction
   (set (REG) (plus (the found register) (OFF - offset))) if such
   a register is found.  It also updates the information about
   REG's known value.
   Return true iff we made a change.  
           (set (reg) (plus (reg) (const_int 0))) is not canonical;
           use (set (reg) (reg)) instead.
           We don't delete this insn, nor do we convert it into a
           note, to avoid losing register notes or the return
           value flag.  jump2 already knows how to get rid of
           no-op moves.  

References costs_add_n_insns(), costs_lt_p(), gen_int_mode(), get_full_set_rtx_cost(), get_full_set_src_cost(), HOST_WIDE_INT, move2add_use_add2_insn(), move2add_valid_value_p(), next_nonnote_nondebug_insn(), optimize_bb_for_speed_p(), and validate_change().

static bool move2add_valid_value_p ( )
   Check if REGNO contains a valid value in MODE.  
         The value loaded into regno in reg_mode[regno] is also valid in
         mode after truncation only if (REG:mode regno) is the lowpart of
         (REG:reg_mode[regno] regno).  Now, for big endian, the starting
         regno of the lowpart might be different.  
           We could in principle adjust regno, check reg_mode[regno] to be
           BLKmode, and return s_off to the caller (vs. -1 for failure),
           but we currently have no callers that could make use of this

References gen_int_mode(), get_full_set_rtx_cost(), init_costs_to_max(), init_costs_to_zero(), optimize_bb_for_speed_p(), and rtx_equal_p().

Referenced by move2add_use_add3_insn().

static void reload_combine ( void  )
     To avoid wasting too much time later searching for an index register,
     determine the minimum and maximum index register numbers.  
         If no index register is available, we can quit now.  Set LAST_INDEX_REG
         to -1 so we'll know to quit early the next time we get here.  
     Set up LABEL_LIVE and EVER_LIVE_AT_START.  The register lifetime
     information is a bit fuzzy immediately after reload, but it's
     still good enough to determine which registers are live at a jump
     Initialize last_label_ruid, reload_combine_ruid and reg_state.  
         We cannot do our optimization across labels.  Invalidating all the use
         information we have would be costly, so we just note where the label
         is and then later disable any optimization that would cross it.  
             Crossing a barrier resets all the use information.  
           Optimizations across insns being marked as volatile must be
           prevented.  All the usage information is invalidated
             Non-spill registers might be used at the call destination in
             some unknown fashion, so we have to mark the unknown use.  

References reg_state.

static struct reg_use* reload_combine_closest_single_use ( )
   Find the use of REGNO with the ruid that is highest among those
   lower than RUID_LIMIT, and return it if it is the only use of this
   reg in the insn.  Return NULL otherwise.  

References address_cost(), reg_use::containing_mem, reg_use::insn, memory_address_addr_space_p(), new_cost(), optimize_bb_for_speed_p(), set_src_cost(), simplify_replace_rtx(), and validate_change().

static void reload_combine_note_store ( rtx  ,
const_rtx  ,
void *   
static void reload_combine_note_store ( )
   Check if DST is a register or a subreg of a register; if it is,
   update store_ruid, real_store_ruid and use_index in the reg_state
   structure accordingly.  Called via note_stores from reload_combine.  
     Some targets do argument pushes without adding REG_INC notes.  
                 We could probably do better, but for now mark the register
                 as used in an unknown fashion and set/clobbered at this
     note_stores might have stripped a STRICT_LOW_PART, so we have to be
     careful with registers / register parts that are not full words.
     Similarly for ZERO_EXTRACT.  

References reg_state.

static void reload_combine_note_use ( rtx ,
rtx  ,
int  ,
static void reload_combine_note_use ( )
   XP points to a piece of rtl that has to be checked for any uses of
   *XP is the pattern of INSN, or a part of it.
   Called from reload_combine, and recursively by itself.  
         If this is the USE of a return value, we can't change it.  
           Mark the return register as used in an unknown fashion.  
             No spurious CLOBBERs of pseudo registers may remain.  
         We are interested in (plus (reg) (const_int)) .  
         Fall through.  
           No spurious USEs of pseudo registers may remain.  
           We can't substitute into multi-hard-reg uses.  
           We may be called to update uses in previously seen insns.
           Don't add uses beyond the last store we saw.  
           If this register is already used in some unknown fashion, we
           can't do anything.
           If we decrement the index from zero to -1, we can't store more
           uses, so this register becomes used in an unknown fashion.  
               This is the first use of this register we have seen since we
               marked it as dead.  
     Recursively process the components of X.  
static void reload_combine_purge_insn_uses ( )
   Called when we are about to rescan a previously encountered insn with
   reload_combine_note_use after modifying some part of it.  This clears all
   information about uses in that particular insn.  

References reg_state, and reg_use::ruid.

Referenced by reload_combine_recognize_const_pattern().

static void reload_combine_purge_reg_uses_after_ruid ( )
   Called when we need to forget about all uses of REGNO after an insn
   which is identified by RUID.  

References reg_use::insn, simplify_replace_rtx(), and validate_change().

static bool reload_combine_recognize_const_pattern ( )
   Called by reload_combine when scanning INSN.  This function tries to detect
   patterns where a constant is added to a register, and the result is used
   in an address.
   Return true if no further processing is needed on INSN; false if it wasn't
   recognized and should be handled normally.  
     We look for a REG1 = REG2 + CONSTANT insn, followed by either
     uses of REG1 inside an address, or inside another add insn.  If
     possible and profitable, merge the addition into subsequent
         We have to be careful when moving the add; apart from the
         single_set there may also be clobbers.  Recognize one special
         case, that of one clobber alongside the set (likely a clobber
         of the CC register).  
           Start the search for the next use from here.  
             Avoid moving the add insn past a jump.  
             If the add clobbers another hard reg in parallel, don't move
             it past a real set of this hard reg.  
             Do not separate cc0 setter and cc0 user on HAVE_cc0 targets.  
             Avoid moving a use of ADDREG past a point where it is stored.  
             We also must not move the addition past an insn that sets
             the same register, unless we can combine two add insns.  
         If we get here, we couldn't handle this use.  
       Process the add normally.  

References reg_use::containing_mem, delete_insn(), fixup_debug_insns(), reg_use::insn, real_store_ruid, reg_state, reload_combine_note_use(), reload_combine_purge_insn_uses(), reg_use::ruid, sets_cc0_p(), store_ruid, try_replace_in_use(), and use_ruid.

static bool reload_combine_recognize_pattern ( )
   Called by reload_combine when scanning INSN.  Try to detect a pattern we
   can handle and improve.  Return true if no further processing is needed on
   INSN; false if it wasn't recognized and should be handled normally.  
     Look for (set (REGX) (CONST_INT))
     (set (REGX) (PLUS (REGX) (REGY)))
     ... (MEM (REGX)) ...
     and convert it to
     (set (REGZ) (CONST_INT))
     ... (MEM (PLUS (REGZ) (REGY)))... .

     First, check that we have (set (REGX) (PLUS (REGX) (REGY)))
     and that we know all uses of REGX before it dies.
     Also, explicitly check that REGX != REGY; our life information
     does not yet show whether REGY changes in this insn.  
         Now we need to set INDEX_REG to an index register (denoted as
         REGZ in the illustration above) and REG_SUM to the expression
         register+register that we want to use to substitute uses of REG
         (typically in MEMs) with.  First check REG and BASE for being
         index registers; we can use them even if they are not dead.  
             Otherwise, look for a free index register.  Since we have
             checked above that neither REG nor BASE are index registers,
             if we find anything at all, it will be different from these
             two registers.  
         Check that PREV_SET is indeed (set (REGX) (CONST_INT)) and that
         (REGY), i.e. BASE, is not clobbered before the last use we'll
             Change destination register and, if necessary, the constant
             value in PREV, the constant loading instruction.  
             Now for every use of REG that we have recorded, replace REG
             with REG_SUM.  
                                        Each change must have its own
                 For every new use of REG_SUM, we have to record the use
                 of BASE therein, i.e. operand 1.  
                 Delete the reg-reg addition.  
                   Previous REG_EQUIV / REG_EQUAL notes for PREV
                   are now invalid.  

References gen_rtx_REG(), and targetm.

static void reload_combine_split_one_ruid ( )
   Subroutine of reload_combine_split_ruids, called to fix up a single
   ruid pointed to by *PRUID if it is higher than SPLIT_RUID.  

References reg_state.

static void reload_combine_split_ruids ( )
   Called when we insert a new insn in a position we've already passed in
   the scan.  Examine all our state, increasing all ruids that are higher
   than SPLIT_RUID by one in order to make room for a new insn.  

References reg_state.

static bool reload_cse_move2add ( rtx  )
static bool reload_cse_move2add ( )
   Convert move insns with constant inputs to additions if they are cheaper.
   Return true if any changes were made.  
             We're going to increment move2add_luid twice after a
             label, so that we can use move2add_last_label_luid + 1 as
             the luid for constants.  
         For simplicity, we only perform this optimization on
         straightforward SETs.  
             Check if we have valid information on the contents of this
             register in the mode of REG.  
                 Try to transform (set (REGX) (CONST_INT A))
                                  (set (REGX) (CONST_INT B))
                                  (set (REGX) (CONST_INT A))
                                  (set (REGX) (plus (REGX) (CONST_INT B-A)))
                                  (set (REGX) (CONST_INT A))
                                  (set (STRICT_LOW_PART (REGX)) (CONST_INT B))
                 Try to transform (set (REGX) (REGY))
                                  (set (REGX) (PLUS (REGX) (CONST_INT A)))
                                  (set (REGX) (REGY))
                                  (set (REGX) (PLUS (REGX) (CONST_INT B)))
                                  (set (REGX) (REGY))
                                  (set (REGX) (PLUS (REGX) (CONST_INT A)))
                                  (set (REGX) (plus (REGX) (CONST_INT B-A)))  
                           See above why we create (set (reg) (reg)) here.  
             Try to transform
             (set (REGX) (CONST (PLUS (SYMBOL_REF) (CONST_INT A))))
             (set (REGY) (CONST (PLUS (SYMBOL_REF) (CONST_INT B))))
             (set (REGX) (CONST (PLUS (SYMBOL_REF) (CONST_INT A))))
             (set (REGY) (CONST (PLUS (REGX) (CONST_INT B-A))))  
                 If the reg already contains the value which is sum of
                 sym and some constant value, we can use an add2 insn.  
                 Otherwise, we have to find a register whose value is sum
                 of sym and some constant value.  
                 Reset the information about this register.  
         If INSN is a conditional branch, we try to extract an
         implicit set out of it.  
                 The following two checks, which are also in
                 move2add_note_store, are intended to reduce the
                 number of calls to gen_rtx_SET to avoid memory
                 allocation if possible.  
         If this is a CALL_INSN, all call used registers are stored with
         unknown values.  
                   Reset the information about this register.  

References validate_change().

static int reload_cse_noop_set_p ( rtx  )

Perform simple optimizations to clean up the result of reload. Copyright (C) 1987-2013 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

static int reload_cse_noop_set_p ( )
   See whether a single set SET is a noop.  
static void reload_cse_regs ( )
   Call cse / combine like post-reload optimization phases.
   FIRST is the first instruction.  
static void reload_cse_regs_1 ( )
   Do a very simple CSE pass over the hard registers.

   This function detects no-op moves where we happened to assign two
   different pseudo-registers to the same hard register, and then
   copied one to the other.  Reload will generate a useless
   instruction copying a register to itself.

   This function also detects cases where we load a value from memory
   into two different registers, and (if memory is more expensive than
   registers) changes it to simply copy the first register into the
   second register.

   Another optimization is performed that scans the operands of each
   instruction to see whether the value is already available in a
   hard register.  It then replaces the operand with the hard register
   if possible, much like an optional reload would.  
     Clean up.  

References cselib_process_insn(), and reload_cse_simplify().

static bool reload_cse_simplify ( rtx  ,

Referenced by reload_cse_regs_1().

static bool reload_cse_simplify ( )
   Try to simplify INSN.  Return true if the CFG may have changed.  
         Simplify even if we may think it is a no-op.
         We may think a memory load of a value smaller than WORD_SIZE
         is redundant because we haven't taken into account possible
         implicit extension.  reload_cse_simplify_set() will bring
         this out, so it's safer to simplify before we delete.  
             We're done with this insn.  
         Registers mentioned in the clobber list for an asm cannot be reused
         within the body of the asm.  Invalidate those registers now so that
         we don't try to substitute values for them.  
         If every action in a PARALLEL is a noop, we can delete
         the entire PARALLEL.  
             We're done with this insn.  
         It's not a no-op, but we can try to simplify it.  
static int reload_cse_simplify_operands ( rtx  ,
static int reload_cse_simplify_operands ( )
   Try to replace operands in INSN with equivalent values that are already
   in registers.  This can be viewed as optional reloading.

   For each non-register operand in the insn, see if any hard regs are
   known to be equivalent to that operand.  Record the alternatives which
   can accept these hard registers.  Among all alternatives, select the
   ones which are better or equal to the one currently matching, where
   "better" is in terms of '?' and '!' constraints.  Among the remaining
   alternatives, select the one which replaces most operands with
   hard registers.  
     For each operand, all registers that are equivalent to it.  
     Vector recording how bad an alternative is.  
     Vector recording how many registers can be introduced by choosing
     this alternative.  
     Array of vectors recording, for each operand and each alternative,
     which hard register to substitute, or -1 if the operand should be
     left as it is.  
     Array of alternatives, sorted in order of decreasing desirability.  
     Figure out which alternative currently matches.  
     For each operand, find out which regs are equivalent.  
         cselib blows up on CODE_LABELs.  Trying to fix that doesn't seem
         right, so avoid the problem here.  Likewise if we have a constant
         and the insn pattern doesn't tell us the mode we need.  
             We might have multiple sets, some of which do implicit
             extension.  Punt on this for now.  
             If the destination is also a MEM or a STRICT_LOW_PART, no
             extension applies.
             Also, if there is an explicit extension, we don't have to
             worry about an implicit one.  
             If the register cannot change mode to word_mode, it follows that
             it cannot have been used in word_mode.  
             If this is a straight load, make the extension explicit.  
               ??? There might be arithmetic operations with memory that are
               safe to optimize, but is it worth the trouble?  
         Add the reject values for each alternative given by the constraints
         for this operand.  
         We won't change operands which are already registers.  We
         also don't want to modify output operands.  
             We found a register equal to this operand.  Now look for all
             alternatives that can accept this register and have not been
             assigned a register they can use yet.  
                     These don't say anything we care about.  
                     See if REGNO fits this alternative, and set it up as the
                     replacement register if we don't have one for this
                     alternative yet and the operand being replaced is not
                     a cheap CONST_INT.  
     Record all alternatives which are better or equal to the currently
     matching one in the alternative_order array.  
     Sort it.  Given a small number of alternatives, a dumb algorithm
     won't hurt too much.  
     Substitute the operands as determined by op_alt_regno for the best
static int reload_cse_simplify_set ( rtx  ,
static int reload_cse_simplify_set ( )
   Try to simplify a single SET instruction.  SET is the set pattern.
   INSN is the instruction it came from.
   This function only handles one case: if we set a register to a value
   which is not a register, we try to find that value in some other register
   and change the set into a register copy.  
     When replacing a memory with a register, we need to honor assumptions
     that combine made wrt the contents of sign bits.  We'll do this by
     generating an extend instruction instead of a reg->reg copy.  Thus
     the destination must be a register that we can widen.  
     If memory loads are cheaper than register copies, don't change them.  
                 ??? I'm lazy and don't wish to handle CONST_DOUBLE.  Other
                 constants, such as SYMBOL_REF, cannot be extended.  
                     ??? In theory we're already extended.  
         If equal costs, prefer registers over anything else.  That
         tends to lead to smaller instructions on some machines.  
static unsigned int rest_of_handle_postreload ( )
     Do a very simple CSE pass over just the hard registers.  
     Reload_cse_regs can eliminate potentially-trapping MEMs.
     Remove any EH edges associated with them.  
static bool try_replace_in_use ( )
   Subroutine of reload_combine_recognize_const_pattern.  Try to replace REG
   with SRC in the insn described by USE, taking costs into account.  Return
   true if we made the replacement.  

Referenced by reload_combine_recognize_const_pattern().

Variable Documentation

bool all_offsets_match
int first_index_reg = -1
   The register numbers of the first and last index register.  A value of
   -1 in LAST_INDEX_REG indicates that we've previously computed these
   values and found no suitable index registers.  
int last_index_reg
int last_jump_ruid
   The RUID of the last jump we encountered in reload_combine.  
int last_label_ruid
   The RUID of the last label we encountered in reload_combine.  
int move2add_last_label_luid
   move2add_last_label_luid is set whenever a label is found.  Labels
   invalidate all previously collected reg_offset data.  
int move2add_luid
   move2add_luid is linearly increased while scanning the instructions
   from first to last.  It is used to set reg_set_luid in
   reload_cse_move2add and move2add_note_store.  
int real_store_ruid
int reg_base_reg[FIRST_PSEUDO_REGISTER]
enum machine_mode reg_mode[FIRST_PSEUDO_REGISTER]

Referenced by elim_forward().

   If reg_base_reg[n] is negative, register n has been set to
   reg_offset[n] or reg_symbol_ref[n] + reg_offset[n] in mode reg_mode[n].
   If reg_base_reg[n] is non-negative, register n has been set to the
   sum of reg_offset[n] and the value of register reg_base_reg[n]
   before reg_set_luid[n], calculated in mode reg_mode[n] .
   For multi-hard-register registers, all but the first one are
   recorded as BLKmode in reg_mode.  Setting reg_mode to VOIDmode
   marks it as invalid.  
int reg_set_luid[FIRST_PSEUDO_REGISTER]
   See if we can reduce the cost of a constant by replacing a move
   with an add.  We track situations in which a register is set to a
   constant or to a register plus a constant.  
   We cannot do our optimization across labels.  Invalidating all the
   information about register contents we have would be costly, so we
   use move2add_last_label_luid to note where the label is and then
   later disable any optimization that would cross it.
   reg_offset[n] / reg_base_reg[n] / reg_symbol_ref[n] / reg_mode[n]
   are only valid if reg_set_luid[n] is greater than
   For a set that established a new (potential) base register with
   non-constant value, we use move2add_luid from the place where the
   setting insn is encountered; registers based off that base then
   get the same reg_set_luid.  Constants all get
   move2add_last_label_luid + 1 as their reg_set_luid.  
struct { ... } reg_state[FIRST_PSEUDO_REGISTER]
   If the register is used in some unknown fashion, USE_INDEX is negative.
   indicates where it is first set or clobbered.
   Otherwise, USE_INDEX is the index of the last encountered use of the
   register (which is first among these we have seen since we scan backwards).
   USE_RUID indicates the first encountered, i.e. last, of these uses.
   If ALL_OFFSETS_MATCH is true, all encountered uses were inside a PLUS
   with a constant offset; OFFSET contains this constant in that case.
   STORE_RUID is always meaningful if we only want to use a value in a
   register in a different place: it denotes the next insn in the insn
   stream (i.e. the last encountered) that sets or clobbers the register.
   REAL_STORE_RUID is similar, but clobbers are ignored when updating it.  

Referenced by reload_combine(), reload_combine_note_store(), reload_combine_purge_insn_uses(), reload_combine_recognize_const_pattern(), reload_combine_split_one_ruid(), and reload_combine_split_ruids().

rtx reg_symbol_ref[FIRST_PSEUDO_REGISTER]
struct reg_use reg_use[RELOAD_COMBINE_MAX_USES]
int reload_combine_ruid
   Reverse linear uid.  This is increased in reload_combine while scanning
   the instructions from last to first.  It is used to set last_label_ruid
   and the store_ruid / use_ruid fields in reg_state.  
int store_ruid
int use_index
int use_ruid