- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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Data Structures | |
| struct | costs |
| struct | cost_classes |
| struct | cost_classes_hasher |
Typedefs | |
| typedef struct cost_classes * | cost_classes_t |
| typedef struct cost_classes * | const_cost_classes_t |
Variables | |
| static bool | pseudo_classes_defined_p = false |
| static bool | allocno_p |
| static int | cost_elements_num |
| static struct costs * | costs |
| static struct costs * | total_allocno_costs |
| static int | struct_costs_size |
| static enum reg_class * | pref |
| static enum reg_class * | pref_buffer |
| static enum reg_class * | regno_aclass |
| static int * | regno_equiv_gains |
| static int | frequency |
| static cost_classes_t * | regno_cost_classes |
| static hash_table < cost_classes_hasher > | cost_classes_htab |
| static cost_classes_t | cost_classes_aclass_cache [N_REG_CLASSES] |
| static cost_classes_t | cost_classes_mode_cache [MAX_MACHINE_MODE] |
| typedef struct cost_classes* const_cost_classes_t |
| typedef struct cost_classes* cost_classes_t |
Types of pointers to the structure above.
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Compute the cost of loading X into (if TO_P is TRUE) or from (if TO_P is FALSE) a register of class RCLASS in mode MODE. X must not be a pseudo register.
If X is a SCRATCH, there is actually nothing to move since we are
assuming optimal allocation. Get the class we will actually use for a reload.
If we need a secondary reload for an intermediate, the cost is
that to load the input into the intermediate register, then to
copy it. For memory, use the memory move cost, for (hard) registers, use
the cost to move between the register classes, and use 2 for
everything else (constants). If this is a constant, we may eventually want to call rtx_cost
here.
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Find costs of register classes and memory for allocnos or pseudos and their best costs. Set up preferred, alternative and allocno classes for pseudos.
Clear the flag for the next compiled function.
Normally we scan the insns once and determine the best class to
use for each allocno. However, if -fexpensive-optimizations are
on, we do so twice, the second time using the tentative best
classes to guide the selection. Zero out our accumulation of the cost of each class for each
allocno. Scan the instructions and record each time it would save code
to put a certain allocno in a certain class. Now for each allocno look at how desirable each class is and
find which class is preferred. Find cost of all allocnos with the same regno.
There are no caps yet.
Propagate costs to upper levels in the region
tree. Find best common class for all allocnos with the same
regno. Ignore classes that are too small or invalid for this
operand. We still prefer registers to memory even at this
stage if their costs are the same. We will make
a final decision during assigning hard registers
when we have all info including more accurate
costs which might be affected by assigning hard
registers to other pseudos because the pseudos
involved in moves can be coalesced. Make the common class the biggest class of best and
alt_class. Finding best class which is subset of the common
class. Ignore classes that are too small or invalid
for this operand.
References memcpy(), regno_reg_rtx, and struct_costs_size.
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Common finalization function for ira_costs and ira_set_pseudo_classes.
References ira_allocate_and_set_costs().
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Finilize info about the cost classes for each pseudo.
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Free allocated temporary cost vectors.
References costs::cost.
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Common initialization function for ira_costs and ira_set_pseudo_classes.
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Initialize info about the cost classes for each pseudo.
References cost_classes::classes, cost_classes::hard_regno_index, and cost_classes::index.
| void ira_adjust_equiv_reg_cost | ( | ) |
Add COST to the estimated gain for eliminating REGNO with its equivalence. If COST is zero, record that no such elimination is possible.
| void ira_costs | ( | void | ) |
Entry function which defines register class, memory and hard register costs for each allocno.
| void ira_finish_costs_once | ( | void | ) |
Function called once at the end of compiler work.
| void ira_init_costs | ( | void | ) |
This is called each time register related information is changed.
Don't use ira_allocate because vectors live through several IRA
calls.
References ira_allocate_and_set_costs(), and ira_hard_reg_set_intersection_p().
| void ira_init_costs_once | ( | void | ) |
Function called once during compiler work.
| void ira_set_pseudo_classes | ( | ) |
Entry function which defines classes for pseudos. Set pseudo_classes_defined_p only if DEFINE_PSEUDO_CLASSES is true.
Referenced by split_live_ranges_for_shrink_wrap().
| void ira_tune_allocno_costs | ( | void | ) |
Change hard register costs for allocnos which lives through function calls. This is called only when we found all intersected calls during building allocno live ranges.
Some targets allow pseudos to be allocated to unaligned sequences
of hard registers. However, selecting an unaligned sequence can
unnecessarily restrict later allocations. So increase the cost of
unaligned hard regs to encourage the use of aligned hard regs.
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inlinestatic |
A version of regno_ok_for_base_p for use here, when all pseudo-registers should count as OK. Arguments as for regno_ok_for_base_p.
References record_address_regs().
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inlinestatic |
Wrapper around REGNO_OK_FOR_INDEX_P, to allow pseudo registers.
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Print allocnos costs to file F.
References process_bb_for_costs().
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Print pseudo costs to file F.
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Traverse the BB represented by LOOP_TREE_NODE to update the allocno costs.
References ira_allocnos_num, ira_loop_tree_root, ira_traverse_loop_tree(), memcpy(), and process_bb_node_for_costs().
Referenced by print_allocno_costs().
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Traverse the BB represented by LOOP_TREE_NODE to update the allocno costs.
References add_cost().
Referenced by process_bb_for_costs().
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Process moves involving hard regs to modify allocno hard register costs. We can do this only after determining allocno class. If a hard register forms a register class, than moves with the hard register are already taken into account in class costs for the allocno.
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Record the pseudo registers we must reload into hard registers in a subexpression of a memory address, X. If CONTEXT is 0, we are looking at the base part of an address, otherwise we are looking at the index part. MODE and AS are the mode and address space of the memory reference; OUTER_CODE and INDEX_CODE give the context that the rtx appears in. These four arguments are passed down to base_reg_class. SCALE is twice the amount to multiply the cost by (it is twice so we can represent half-cost adjustments).
When we have an address that is a sum, we must determine
whether registers are "base" or "index" regs. If there is a
sum of two registers, we must choose one to be the "base".
Luckily, we can use the REG_POINTER to make a good choice
most of the time. We only need to do this on machines that
can have two registers in an address and where the base and
index register classes are different.
??? This code used to set REGNO_POINTER_FLAG in some cases,
but that seems bogus since it should only be set when we are
sure the register is being used as a pointer. Look inside subregs.
If this machine only allows one register per address, it
must be in the first operand. If index and base registers are the same on this machine,
just record registers in any non-constant operands. We
assume here, as well as in the tests below, that all
addresses are in canonical form. If the second operand is a constant integer, it doesn't
change what class the first operand must be. If the second operand is a symbolic constant, the first
operand must be an index register. If both operands are registers but one is already a hard
register of index or reg-base class, give the other the
class that the hard register is not. If one operand is known to be a pointer, it must be the
base with the other operand the index. Likewise if the
other operand is a MULT. Otherwise, count equal chances that each might be a base or
index register. This case should be rare. Double the importance of an allocno that is incremented or
decremented, since it would take two extra insns if it ends
up in the wrong place. Double the importance of an allocno that is incremented or
decremented, since it would take two extra insns if it ends
up in the wrong place.
Referenced by ok_for_base_p_nonstrict().
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Calculate the costs of insn operands.
If we get here, we are set up to record the costs of all the
operands for this insn. Start by initializing the costs. Then
handle any address registers. Finally record the desired classes
for any allocnos, doing it twice if some pair of operands are
commutative. Check for commutative in a separate loop so everything will have
been initialized. We must do this even if one operand is a
constant--see addsi3 in m68k.md. Handle commutative operands by swapping the constraints.
We assume the modes are the same. If this insn is a single set copying operand 1 to operand 0 and
one operand is an allocno with the other a hard reg or an allocno
that prefers a hard register that is in its own register class
then we may want to adjust the cost of that register class to -1.
Avoid the adjustment if the source does not die to avoid
stressing of register allocator by preferrencing two colliding
registers into single class.
Also avoid the adjustment if a copy between hard registers of the
class is expensive (ten times the cost of a default copy is
considered arbitrarily expensive). This avoids losing when the
preferred class is very expensive as the source of a copy
instruction.
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Record the cost of using memory or hard registers of various classes for the operands in INSN. N_ALTS is the number of alternatives. N_OPS is the number of operands. OPS is an array of the operands. MODES are the modes of the operands, in case any are VOIDmode. CONSTRAINTS are the constraints to use for the operands. This array is modified by this procedure. This procedure works alternative by alternative. For each alternative we assume that we will be able to allocate all allocnos to their ideal register class and calculate the cost of using that alternative. Then we compute, for each operand that is a pseudo-register, the cost of having the allocno allocated to each register class and using it in that alternative. To this cost is added the cost of the alternative. The cost of each class for this insn is its lowest cost among all the alternatives.
Process each alternative, each time minimizing an operand's cost
with the cost for each operand in that alternative. Initially show we know nothing about the register class.
If this operand has no constraints at all, we can
conclude nothing about it since anything is valid. If this alternative is only relevant when this operand
matches a previous operand, we do different things
depending on whether this operand is a allocno-reg or not.
We must process any modifiers for the operand before we
can make this test. Copy class and whether memory is allowed from the
matching alternative. Then perform any needed cost
computations and/or adjustments. If this matches the other operand, we have no
added cost and we win. If we can put the other operand into a register,
add to the cost of this alternative the cost to
copy this operand to the register used for the
other operand. This op is an allocno but the one it matches is
not. If we can't put the other operand into a
register, this alternative can't be used. Otherwise, add to the cost of this alternative
the cost to copy the other operand to the hard
register used for this operand. The costs of this operand are not the same as the
other operand since move costs are not symmetric.
Moreover, if we cannot tie them, this alternative
needs to do a copy, which is one insn. If the alternative actually allows memory, make
things a bit cheaper since we won't need an extra
insn to load it. If we have assigned a class to this allocno in
our first pass, add a cost to this alternative
corresponding to what we would add if this
allocno were not in the appropriate class. This is in place of ordinary cost computation for
this operand, so skip to the end of the
alternative (should be just one character). Scan all the constraint letters. See if the operand
matches any of the constraints. Collect the valid
register classes and see if this operand accepts
memory. Ignore the next letter for this pass.
We know this operand is an address, so we want it
to be allocated to a register that can be the
base of an address, i.e. BASE_REG_CLASS. It doesn't seem worth distinguishing between
offsettable and non-offsettable addresses
here. Every MEM can be reloaded to fit.
Every address can be reloaded to fit.
We know this operand is an address, so we
want it to be allocated to a hard register
that can be the base of an address,
i.e. BASE_REG_CLASS. How we account for this operand now depends on whether it
is a pseudo register or not. If it is, we first check if
any register classes are valid. If not, we ignore this
alternative, since we want to assume that all allocnos get
allocated for register preferencing. If some register
class is valid, compute the costs of moving the allocno
into that class. We must always fail if the operand is a REG, but
we did not find a suitable class.
Otherwise we may perform an uninitialized read
from this_op_costs after the `continue' statement
below. If the alternative actually allows memory, make
things a bit cheaper since we won't need an extra
insn to load it. If we have assigned a class to this allocno in
our first pass, add a cost to this alternative
corresponding to what we would add if this
allocno were not in the appropriate class. Otherwise, if this alternative wins, either because we
have already determined that or if we have a hard
register of the proper class, there is no cost for this
alternative. If registers are valid, the cost of this alternative
includes copying the object to and/or from a
register. The only other way this alternative can be used is if
this is a constant that could be placed into memory. Finally, update the costs with the information we've
calculated about this alternative.
References memset(), and struct_costs_size.
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Process one insn INSN. Scan it and record each time it would save code to put a certain allocnos in a certain class. Return the last insn processed, so that the scan can be continued from there.
If this insn loads a parameter from its stack slot, then it
represents a savings, rather than a cost, if the parameter is
stored in memory. Record this fact.
Similarly if we're loading other constants from memory (constant
pool, TOC references, small data areas, etc) and this is the only
assignment to the destination pseudo.
Don't do this if SET_SRC (set) isn't a general operand, if it is
a memory requiring special instructions to load it, decreasing
mem_cost might result in it being loaded using the specialized
instruction into a register, then stored into stack and loaded
again from the stack. See PR52208.
Don't do this if SET_SRC (set) has side effect. See PR56124. Now add the cost for each operand to the total costs for its
allocno. If the already accounted for the memory "cost" above, don't
do so again.
References allocno_p, cost_classes::classes, costs::cost, basic_block_def::index, invalid_mode_change_p(), IRA_REGION_ALL, IRA_REGION_MIXED, cost_classes::num, and reg_class_names.
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After we find hard register and memory costs for allocnos, define its class and modify hard register cost because insns moving allocno to/from hard registers.
References cost_elements_num, init_subregs_of_mode(), ira_allocate(), max_reg_num(), memset(), regno_aclass, and regno_equiv_gains.
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Create new cost classes from cost classes FROM and set up members index and hard_regno_index. Return the new classes. The function implements some common code of two functions setup_regno_cost_classes_by_aclass and setup_regno_cost_classes_by_mode.
References cost_classes::classes, hash_table< Descriptor, Allocator >::find_slot(), hard_reg_set_subset_p(), and cost_classes::num.
Referenced by setup_regno_cost_classes_by_aclass().
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Setup cost classes for pseudo REGNO whose allocno class is ACLASS. This function is used when we know an initial approximation of allocno class of the pseudo already, e.g. on the second iteration of class cost calculation or after class cost calculation in register-pressure sensitive insn scheduling or register-pressure sensitive loop-invariant motion.
We exclude classes from consideration which are subsets of
ACLASS only if ACLASS is an uniform class. Exclude non-uniform classes which are subsets of
ACLASS.
References setup_cost_classes().
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Setup cost classes for pseudo REGNO with MODE. Usage of MODE can decrease number of cost classes for the pseudo, if hard registers of some important classes can not hold a value of MODE. So the pseudo can not get hard register of some important classes and cost calculation for such important classes is only waisting CPU time.
References hash_table< Descriptor, Allocator >::dispose(), and ira_free().
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TRUE if we work with allocnos. Otherwise we work with pseudos.
Referenced by scan_one_insn().
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Map allocno class -> cost classes for pseudo of given allocno class.
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Hash table of unique cost classes.
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Map mode -> cost classes for pseudo of give mode.
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Number of elements in array `costs'.
Referenced by setup_allocno_class_and_costs().
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Execution frequency of the current insn.
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Record register class preferences of each allocno or pseudo. Null value means no preferences. It happens on the 1st iteration of the cost calculation.
Referenced by finish_allocno(), finish_allocnos(), ira_create_pref(), lookup_page_table_entry(), and print_pref().
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Allocated buffers for pref.
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@verbatim
IRA hard register and memory cost calculation for allocnos or pseudos. Copyright (C) 2006-2013 Free Software Foundation, Inc. Contributed by Vladimir Makarov vmakarov@redhat.com.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
The flags is set up every time when we calculate pseudo register classes through function ira_set_pseudo_classes.
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Record allocno class of each allocno with the same regno.
Referenced by setup_allocno_class_and_costs().
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Info about cost classes for each pseudo.
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Record cost gains for not allocating a register with an invariant equivalence.
Referenced by setup_allocno_class_and_costs().
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It is the current size of struct costs.
Referenced by find_costs_and_classes(), and record_reg_classes().
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Accumulated costs of each class for each allocno.
1.8.1.1