- Generated by
1.8.1.1
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GCC Middle and Back End API Reference
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Data Structures | |
| struct | qty_table_elem |
| struct | change_cc_mode_args |
| struct | reg_eqv_elem |
| struct | cse_reg_info |
| struct | table_elt |
| struct | branch_path |
| struct | cse_basic_block_data |
| struct | check_dependence_data |
| struct | set |
| struct | dead_debug_insn_data |
Functions | |
| static bool | fixed_base_plus_p (rtx x) |
| static int | notreg_cost (rtx, enum rtx_code, int) |
| static int | approx_reg_cost_1 (rtx *, void *) |
| static int | approx_reg_cost (rtx) |
| static int | preferable (int, int, int, int) |
| static void | new_basic_block (void) |
| static void | make_new_qty (unsigned int, enum machine_mode) |
| static void | make_regs_eqv (unsigned int, unsigned int) |
| static void | delete_reg_equiv (unsigned int) |
| static int | mention_regs (rtx) |
| static int | insert_regs (rtx, struct table_elt *, int) |
| static void | remove_from_table (struct table_elt *, unsigned) |
| static void | remove_pseudo_from_table (rtx, unsigned) |
| static struct table_elt * | lookup (rtx, unsigned, enum machine_mode) |
| static struct table_elt * | lookup_for_remove (rtx, unsigned, enum machine_mode) |
| static rtx | lookup_as_function (rtx, enum rtx_code) |
| static struct table_elt * | insert_with_costs (rtx, struct table_elt *, unsigned, enum machine_mode, int, int) |
| static struct table_elt * | insert (rtx, struct table_elt *, unsigned, enum machine_mode) |
| static void | merge_equiv_classes (struct table_elt *, struct table_elt *) |
| static void | invalidate (rtx, enum machine_mode) |
| static void | remove_invalid_refs (unsigned int) |
| static void | remove_invalid_subreg_refs (unsigned int, unsigned int, enum machine_mode) |
| static void | rehash_using_reg (rtx) |
| static void | invalidate_memory (void) |
| static void | invalidate_for_call (void) |
| static rtx | use_related_value (rtx, struct table_elt *) |
| static unsigned | canon_hash (rtx, enum machine_mode) |
| static unsigned | safe_hash (rtx, enum machine_mode) |
| static unsigned | hash_rtx_string (const char *) |
| static rtx | canon_reg (rtx, rtx) |
| static enum rtx_code | find_comparison_args (enum rtx_code, rtx *, rtx *, enum machine_mode *, enum machine_mode *) |
| static rtx | fold_rtx (rtx, rtx) |
| static rtx | equiv_constant (rtx) |
| static void | record_jump_equiv (rtx, bool) |
| static void | record_jump_cond (enum rtx_code, enum machine_mode, rtx, rtx, int) |
| static void | cse_insn (rtx) |
| static void | cse_prescan_path (struct cse_basic_block_data *) |
| static void | invalidate_from_clobbers (rtx) |
| static void | invalidate_from_sets_and_clobbers (rtx) |
| static rtx | cse_process_notes (rtx, rtx, bool *) |
| static void | cse_extended_basic_block (struct cse_basic_block_data *) |
| static int | check_for_label_ref (rtx *, void *) |
| void | dump_class (struct table_elt *) |
| static void | get_cse_reg_info_1 (unsigned int regno) |
| static struct cse_reg_info * | get_cse_reg_info (unsigned int regno) |
| static int | check_dependence (rtx *, void *) |
| static void | flush_hash_table (void) |
| static bool | insn_live_p (rtx, int *) |
| static bool | set_live_p (rtx, rtx, int *) |
| static int | cse_change_cc_mode (rtx *, void *) |
| static void | cse_change_cc_mode_insn (rtx, rtx) |
| static void | cse_change_cc_mode_insns (rtx, rtx, rtx) |
| static enum machine_mode | cse_cc_succs (basic_block, basic_block, rtx, rtx, bool) |
| static bool | fixed_base_plus_p () |
| DEBUG_FUNCTION void | dump_class () |
| static int | approx_reg_cost_1 () |
| static int | approx_reg_cost () |
| static int | preferable () |
| static int | notreg_cost () |
| static void | init_cse_reg_info () |
| static void | get_cse_reg_info_1 () |
| static struct cse_reg_info * | get_cse_reg_info () |
| static void | make_new_qty () |
| static void | make_regs_eqv () |
| static void | delete_reg_equiv () |
| static int | mention_regs () |
| static int | insert_regs () |
| static bool | compute_const_anchors (rtx cst, HOST_WIDE_INT *lower_base, HOST_WIDE_INT *lower_offs, HOST_WIDE_INT *upper_base, HOST_WIDE_INT *upper_offs) |
| static void | insert_const_anchor (HOST_WIDE_INT anchor, rtx reg, HOST_WIDE_INT offs, enum machine_mode mode) |
| static void | insert_const_anchors () |
| static rtx | find_reg_offset_for_const (struct table_elt *anchor_elt, HOST_WIDE_INT offs, unsigned *old) |
| static rtx | try_const_anchors () |
| static void | remove_from_table () |
| static void | remove_pseudo_from_table () |
| static struct table_elt * | lookup () |
| static struct table_elt * | lookup_for_remove () |
| static rtx | lookup_as_function () |
| static struct table_elt * | insert_with_costs (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode, int cost, int reg_cost) |
| static struct table_elt * | insert (rtx x, struct table_elt *classp, unsigned int hash, enum machine_mode mode) |
| static void | merge_equiv_classes () |
| static int | check_dependence () |
| static void | invalidate () |
| static void | remove_invalid_refs () |
| static void | rehash_using_reg () |
| static rtx | use_related_value () |
| static unsigned | hash_rtx_string () |
| unsigned | hash_rtx_cb (const_rtx x, enum machine_mode mode, int *do_not_record_p, int *hash_arg_in_memory_p, bool have_reg_qty, hash_rtx_callback_function cb) |
| unsigned | hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p, int *hash_arg_in_memory_p, bool have_reg_qty) |
| static unsigned | canon_hash () |
| static unsigned | safe_hash () |
| int | exp_equiv_p () |
| static void | validate_canon_reg () |
| static rtx | canon_reg () |
| static rtx | fold_rtx () |
| static rtx | equiv_constant () |
| static void | record_jump_equiv () |
| static rtx | record_jump_cond_subreg () |
| static void | try_back_substitute_reg () |
| static int | find_sets_in_insn () |
| static void | canonicalize_insn () |
| static void | cse_insn () |
| static void | invalidate_from_clobbers () |
| static void | invalidate_from_sets_and_clobbers () |
| static rtx | cse_process_notes_1 () |
| static rtx | cse_process_notes () |
| static bool | cse_find_path (basic_block first_bb, struct cse_basic_block_data *data, int follow_jumps) |
| static void | cse_dump_path () |
| static bool | have_eh_succ_edges () |
| static void | cse_prescan_path () |
| static void | cse_extended_basic_block () |
| static int | cse_main () |
| static int | check_for_label_ref () |
| static void | count_reg_usage () |
| static int | is_dead_reg () |
| static bool | insn_live_p () |
| static void | count_stores () |
| static int | is_dead_debug_insn () |
| static rtx | replace_dead_reg () |
| int | delete_trivially_dead_insns () |
| static int | cse_change_cc_mode () |
| static void | cse_change_cc_mode_insn () |
| static void | cse_change_cc_mode_insns () |
| static void | cse_condition_code_reg () |
| static bool | gate_handle_cse () |
| static unsigned int | rest_of_handle_cse () |
| rtl_opt_pass * | make_pass_cse () |
| static bool | gate_handle_cse2 () |
| static unsigned int | rest_of_handle_cse2 () |
| rtl_opt_pass * | make_pass_cse2 () |
| static bool | gate_handle_cse_after_global_opts () |
| static unsigned int | rest_of_handle_cse_after_global_opts () |
| rtl_opt_pass * | make_pass_cse_after_global_opts () |
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Return an estimate of the cost of the registers used in an rtx. This is mostly the number of different REG expressions in the rtx; however for some exceptions like fixed registers we use a cost of 0. If any other hard register reference occurs, return MAX_COST.
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Subroutine of approx_reg_cost; called through for_each_rtx.
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Hash an rtx X for cse via hash_rtx. Stores 1 in do_not_record if any subexpression is volatile. Stores 1 in hash_arg_in_memory if X contains a mem rtx which does not have the MEM_READONLY_P flag set.
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Canonicalize an expression: replace each register reference inside it with the "oldest" equivalent register. If INSN is nonzero validate_change is used to ensure that INSN remains valid after we make our substitution. The calls are made with IN_GROUP nonzero so apply_change_group must be called upon the outermost return from this function (unless INSN is zero). The result of apply_change_group can generally be discarded since the changes we are making are optional.
Never replace a hard reg, because hard regs can appear
in more than one machine mode, and we must preserve the mode
of each occurrence. Also, some hard regs appear in
MEMs that are shared and mustn't be altered. Don't try to
replace any reg that maps to a reg of class NO_REGS.
References table_elt::exp.
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Where possible, substitute every register reference in the N_SETS number of SETS in INSN with the the canonical register. Register canonicalization propagatest the earliest register (i.e. one that is set before INSN) with the same value. This is a very useful, simple form of CSE, to clean up warts from expanding GIMPLE to RTL. For instance, a CONST for an address is usually expanded multiple times to loads into different registers, thus creating many subexpressions of the form: (set (reg1) (some_const)) (set (mem (... reg1 ...) (thing))) (set (reg2) (some_const)) (set (mem (... reg2 ...) (thing))) After canonicalizing, the code takes the following form: (set (reg1) (some_const)) (set (mem (... reg1 ...) (thing))) (set (reg2) (some_const)) (set (mem (... reg1 ...) (thing))) The set to reg2 is now trivially dead, and the memory reference (or address, or whatever) may be a candidate for further CSEing. In this function, the result of apply_change_group can be ignored; see canon_reg.
If we clobber memory, canon the address.
This does nothing when a register is clobbered
because we have already invalidated the reg. Canonicalize a USE of a pseudo register or memory location.
We potentially will process this insn many times. Therefore,
drop the REG_EQUAL note if it is equal to the SET_SRC of the
unique set in INSN.
Do not do so if the REG_EQUAL note is for a STRICT_LOW_PART,
because cse_insn handles those specially. Canonicalize sources and addresses of destinations.
We do this in a separate pass to avoid problems when a MATCH_DUP is
present in the insn pattern. In that case, we want to ensure that
we don't break the duplicate nature of the pattern. So we will replace
both operands at the same time. Otherwise, we would fail to find an
equivalent substitution in the loop calling validate_change below.
We used to suppress canonicalization of DEST if it appears in SRC,
but we don't do this any more. Now that we have done all the replacements, we can apply the change
group and see if they all work. Note that this will cause some
canonicalizations that would have worked individually not to be applied
because some other canonicalization didn't work, but this should not
occur often.
The result of apply_change_group can be ignored; see canon_reg.
Referenced by try_back_substitute_reg().
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Called via for_each_rtx to see if an insn is using a LABEL_REF for which there isn't a REG_LABEL_OPERAND note. Return one if so. DATA is the insn.
If this insn uses a LABEL_REF and there isn't a REG_LABEL_OPERAND
note for it, we must rerun jump since it needs to place the note. If
this is a LABEL_REF for a CODE_LABEL that isn't in the insn chain,
don't do this since no REG_LABEL_OPERAND will be added.
References cse_change_cc_mode_insn(), change_cc_mode_args::insn, and reg_set_p().
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Compute upper and lower anchors for CST. Also compute the offset of CST from these anchors/bases such that *_BASE + *_OFFS = CST. Return false iff CST is equal to an anchor.
References table_elt::exp, exp_equiv_p(), plus_constant(), and targetm.
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Count the number of times registers are used (not set) in X. COUNTS is an array in which we accumulate the count, INCR is how much we count each register usage. Don't count a usage of DEST, which is the SET_DEST of a SET which contains X in its SET_SRC. This is because such a SET does not modify the liveness of DEST. DEST is set to pc_rtx for a trapping insn, or for an insn with side effects. We must then count uses of a SET_DEST regardless, because the insn can't be deleted here.
If we are clobbering a MEM, mark any registers inside the address
as being used. Unless we are setting a REG, count everything in SET_DEST.
We expect dest to be NULL_RTX here. If the insn may throw,
or if it cannot be deleted due to side-effects, mark this fact
by setting DEST to pc_rtx. Things used in a REG_EQUAL note aren't dead since loop may try to
use them. This REG_EQUAL note describes the result of a function call.
Process all the arguments. FUNCTION_USAGE expression lists may include (CLOBBER (mem /u)),
involving registers in the address. Iterate over just the inputs, not the constraints as well.
References delete_insn(), edge_def::dest, edge_def::flags, change_cc_mode_args::insn, modes, modified_in_p(), change_cc_mode_args::newreg, basic_block_def::preds, rtx_equal_p(), basic_block_def::succs, and targetm.
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Count the number of stores into pseudo. Callback for note_stores.
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BB is a basic block which finishes with CC_REG as a condition code register which is set to CC_SRC. Look through the successors of BB to find blocks which have a single predecessor (i.e., this one), and look through those blocks for an assignment to CC_REG which is equivalent to CC_SRC. CAN_CHANGE_MODE indicates whether we are permitted to change the mode of CC_SRC to a compatible mode. This returns VOIDmode if no equivalent assignments were found. Otherwise it returns the mode which CC_SRC should wind up with. ORIG_BB should be the same as BB in the outermost cse_cc_succs call, but is passed unmodified down to recursive calls in order to prevent endless recursion. The main complexity in this function is handling the mode issues. We may have more than one duplicate which we can eliminate, and we try to find a mode which will work for multiple duplicates.
We expect to have two successors. Look at both before picking
the final mode for the comparison. If we have more successors
(i.e., some sort of table jump, although that seems unlikely),
then we require all beyond the first two to use the same
mode. Avoid endless recursion on unreachable blocks.
If CC_SRC is modified, we have to stop looking for
something which uses it. Check whether INSN sets CC_REG to CC_SRC.
The modified insn will be re-recognized later.
We found a matching expression in the
wrong mode, but we don't have room to
store it in the array. Punt. This case
should be rare. INSN sets CC_REG to a value equal to CC_SRC
with the right mode. We can simply delete
it. We found an instruction to delete. Keep looking,
in the hopes of finding a three-way jump. We found an instruction which sets the condition
code, so don't look any farther. If INSN sets CC_REG in some other way, don't look any
farther. If we fell off the bottom of the block, we can keep looking
through successors. We pass CAN_CHANGE_MODE as false because
we aren't prepared to handle compatibility between the
further blocks and this block. Now INSN_COUNT is the number of instructions we found which set
CC_REG to a value equivalent to CC_SRC. The instructions are in
INSNS. The modes used by those instructions are in MODES. We need to change the mode of CC_REG in INSNS[i] and
subsequent instructions.
Referenced by set_live_p().
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This function is called via for_each_rtx. The argument, NEWREG, is a condition code register with the desired mode. If we are looking at the same register in a different mode, replace it with NEWREG.
Referenced by check_for_label_ref(), and delete_trivially_dead_insns().
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Change the mode of any reference to the register REGNO (NEWREG) to GET_MODE (NEWREG) in INSN.
If the following assertion was triggered, there is most probably
something wrong with the cc_modes_compatible back end function.
CC modes only can be considered compatible if the insn - with the mode
replaced by any of the compatible modes - can still be recognized.
Referenced by delete_trivially_dead_insns(), and insn_live_p().
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Change the mode of any reference to the register REGNO (NEWREG) to GET_MODE (NEWREG), starting at START. Stop before END. Stop at any instruction which modifies NEWREG.
References execute(), gate_handle_cse_after_global_opts(), rest_of_handle_cse_after_global_opts(), and RTL_PASS.
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If we have a fixed condition code register (or two), walk through the instructions and try to eliminate duplicate assignments.
Look for blocks which end with a conditional jump based on a
condition code register. Then look for the instruction which
sets the condition code register. Then look through the
successor blocks for instructions which set the condition
code register to the same value. There are other possible
uses of the condition code register, but these are by far the
most common and the ones which we are most likely to be able
to optimize. Now CC_REG is a condition code register used for a
conditional jump at the end of the block, and CC_SRC, in
CC_SRC_INSN, is the value to which that condition code
register is set, and CC_SRC is still meaningful at the end of
the basic block. Do the same in the following insns that use the
current value of CC_REG within BB.
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Dump the path in DATA to file F. NSETS is the number of sets in the path.
Referenced by cse_process_notes().
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Referenced by cse_process_notes().
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Process a single extended basic block described by EBB_DATA.
Allocate the space needed by qty_table.
Invalidate recorded information for eh regs if there is an EH
edge pointing to that bb. If we have processed 1,000 insns, flush the hash table to
avoid extreme quadratic behavior. We must not include NOTEs
in the count since there may be more of them when generating
debugging information. If we clear the table at different
times, code generated with -g -O might be different than code
generated with -O but not -g.
FIXME: This is a real kludge and needs to be done some other
way. Process notes first so we have all notes in canonical forms
when looking for duplicate operations. If we haven't already found an insn where we added a LABEL_REF,
check this one. If the previous insn sets CC0 and this insn no
longer references CC0, delete the previous insn.
Here we use fact that nothing expects CC0 to be
valid over an insn, which is true until the final
pass. If this insn is not the last insn in the basic
block, it will be PREV_INSN(insn) in the next
iteration. If we recorded any CC0-related
information for this insn, remember it. With non-call exceptions, we are not always able to update
the CFG properly inside cse_insn. So clean up possibly
redundant EH edges here. If we changed a conditional jump, we may have terminated
the path we are following. Check that by verifying that
the edge we would take still exists. If the edge does
not exist anymore, purge the remainder of the path.
Note that this will cause us to return to the caller. If we truncate the path, we must also reset the
visited bit on the remaining blocks in the path,
or we will never visit them at all. If this is a conditional jump insn, record any known
equivalences due to the condition being tested. Clear the CC0-tracking related insns, they can't provide
useful information across basic block boundaries.
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Find a path in the CFG, starting with FIRST_BB to perform CSE on. DATA is a pointer to a struct cse_basic_block_data, that is used to describe the path. It is filled with a queue of basic blocks, starting with FIRST_BB and following a trace through the CFG. If all paths starting at FIRST_BB have been followed, or no new path starting at FIRST_BB can be constructed, this function returns FALSE. Otherwise, DATA->path is filled and the function returns TRUE indicating that a path to follow was found. If FOLLOW_JUMPS is false, the maximum path length is 1 and the only block in the path will be FIRST_BB.
See if there is a previous path.
There is a previous path. Make sure it started with FIRST_BB.
There was only one basic block in the last path. Clear the path and
return, so that paths starting at another basic block can be tried. If the path was empty from the beginning, construct a new path.
Otherwise, path_size must be equal to or greater than 2, because
a previous path exists that is at least two basic blocks long.
Update the previous branch path, if any. If the last branch was
previously along the branch edge, take the fallthrough edge now. If we previously followed a path along the branch edge, try
the fallthru edge now. We used to assert here that we would only see blocks
that we have not visited yet. But we may end up
visiting basic blocks twice if the CFG has changed
in this run of cse_main, because when the CFG changes
the topological sort of the CFG also changes. A basic
blocks that previously had more than two predecessors
may now have a single predecessor, and become part of
a path that starts at another basic block.
We still want to visit each basic block only once, so
halt the path here if we have already visited BB. If only one block remains in the path, bail.
Extend the path if possible.
First try to follow the branch. If that doesn't lead
to a useful path, follow the fallthru edge. Avoid visiting basic blocks twice. The large comment
above explains why this can happen.
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Main function of CSE. First simplify sources and addresses of all assignments in the instruction, using previously-computed equivalents values. Then install the new sources and destinations in the table of available values.
Records what this insn does to set CC0.
Find all regs explicitly clobbered in this insn,
to ensure they are not replaced with any other regs
elsewhere in this insn. Record all the SETs in this instruction.
Substitute the canonical register where possible.
If this insn has a REG_EQUAL note, store the equivalent value in SRC_EQV,
if different, or if the DEST is a STRICT_LOW_PART. The latter condition
is necessary because SRC_EQV is handled specially for this case, and if
it isn't set, then there will be no equivalence for the destination. Set sets[i].src_elt to the class each source belongs to.
Detect assignments from or to volatile things
and set set[i] to zero so they will be ignored
in the rest of this function.
Nothing in this loop changes the hash table or the register chains. Set nonzero if we need to call force_const_mem on with the
contents of src_folded before using it. If SRC is a constant that has no machine mode,
hash it with the destination's machine mode.
This way we can keep different modes separate. Find the equivalence class for the equivalent expression.
If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
value of the INNER register, not the destination. So it is not
a valid substitution for the source. But save it for later. Simplify and foldable subexpressions in SRC. Then get the fully-
simplified result, which may not necessarily be valid. ??? This caused bad code to be generated for the m68k port with -O2.
Suppose src is (CONST_INT -1), and that after truncation src_folded
is (CONST_INT 3). Suppose src_folded is then used for src_const.
At the end we will add src and src_const to the same equivalence
class. We now have 3 and -1 on the same equivalence class. This
causes later instructions to be mis-optimized. If storing a constant in a bitfield, pre-truncate the constant
so we will be able to record it later. Compute SRC's hash code, and also notice if it
should not be recorded at all. In that case,
prevent any further processing of this assignment. If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
a pseudo, do not record SRC. Using SRC as a replacement for
anything else will be incorrect in that situation. Note that
this usually occurs only for stack slots, in which case all the
RTL would be referring to SRC, so we don't lose any optimization
opportunities by not having SRC in the hash table. It is no longer clear why we used to do this, but it doesn't
appear to still be needed. So let's try without it since this
code hurts cse'ing widened ops. If source is a paradoxical subreg (such as QI treated as an SI),
treat it as volatile. It may do the work of an SI in one context
where the extra bits are not being used, but cannot replace an SI
in general. Locate all possible equivalent forms for SRC. Try to replace
SRC in the insn with each cheaper equivalent.
We have the following types of equivalents: SRC itself, a folded
version, a value given in a REG_EQUAL note, or a value related
to a constant.
Each of these equivalents may be part of an additional class
of equivalents (if more than one is in the table, they must be in
the same class; we check for this).
If the source is volatile, we don't do any table lookups.
We note any constant equivalent for possible later use in a
REG_NOTE. The REG_EQUAL is indicating that two formerly distinct
classes are now equivalent. So merge them. Try to find a constant somewhere and record it in `src_const'.
Record its table element, if any, in `src_const_elt'. Look in
any known equivalences first. (If the constant is not in the
table, also set `sets[i].src_const_hash'). Consider (minus (label_ref L1) (label_ref L2)) as
"constant" here so we will record it. This allows us
to fold switch statements when an ADDR_DIFF_VEC is used. If we don't know if the constant is in the table, get its
hash code and look it up. If the constant and our source are both in the table, mark them as
equivalent. Otherwise, if a constant is in the table but the source
isn't, set ELT to it. See if there is a register linearly related to a constant
equivalent of SRC. This can occur when we previously saw a CONST
involving a SYMBOL_REF and then see the SYMBOL_REF
twice. Merge the involved classes. See if we have a CONST_INT that is already in a register in a
wider mode. Another possibility is that we have an AND with a constant in
a mode narrower than a word. If so, it might have been generated
as part of an "if" which would narrow the AND. If we already
have done the AND in a wider mode, we can use a SUBREG of that
value. See if a MEM has already been loaded with a widening operation;
if it has, we can use a subreg of that. Many CISC machines
also have such operations, but this is only likely to be
beneficial on these machines. Set what we are trying to extend and the operation it might
have been extended with. Try to express the constant using a register+offset expression
derived from a constant anchor. At this point, ELT, if nonzero, points to a class of expressions
equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
and SRC_RELATED, if nonzero, each contain additional equivalent
expressions. Prune these latter expressions by deleting expressions
already in the equivalence class.
Check for an equivalent identical to the destination. If found,
this is the preferred equivalent since it will likely lead to
elimination of the insn. Indicate this by placing it in
`src_related'. If the expression is not valid, ignore it. Then we do not
have to check for validity below. In most cases, we can use
`rtx_equal_p', since canonicalization has already been done. Also skip paradoxical subregs, unless that's what we're
looking for. This is the same as the destination of the insns, we want
to prefer it. Copy it to src_related. The code below will
then give it a negative cost. Find the cheapest valid equivalent, trying all the available
possibilities. Prefer items not in the hash table to ones
that are when they are equal cost. Note that we can never
worsen an insn as the current contents will also succeed.
If we find an equivalent identical to the destination, use it as best,
since this insn will probably be eliminated in that case. If a const-anchor is used to synthesize a constant that
normally requires multiple instructions then slightly prefer
it over the original sequence. These instructions are likely
to become redundant now. We can't compare against the cost
of src_eqv_here because, on MIPS for example, multi-insn
constants have zero cost; they are assumed to be hoisted from
loops. If this was an indirect jump insn, a known label will really be
cheaper even though it looks more expensive. Terminate loop when replacement made. This must terminate since
the current contents will be tested and will always be valid. Skip invalid entries.
A paradoxical subreg would be bad here: it'll be the right
size, but later may be adjusted so that the upper bits aren't
what we want. So reject it. It is okay, though, if the rtx we're trying to match
will ignore any of the bits we can't predict. Find cheapest and skip it for the next time. For items
of equal cost, use this order:
src_folded, src, src_eqv, src_related and hash table entry. Avoid creation of overlapping memory moves.
BLKmode moves are not handled by cse anyway.
Try to optimize
(set (reg:M N) (const_int A))
(set (reg:M2 O) (const_int B))
(set (zero_extract:M2 (reg:M N) (const_int C) (const_int D))
(reg:M2 O)). We don't normally have an insn matching (set (pc) (pc)), so
check for this separately here. We will delete such an
insn below.
For other cases such as a table jump or conditional jump
where we know the ultimate target, go ahead and replace the
operand. While that may not make a valid insn, we will
reemit the jump below (and also insert any necessary
barriers). Don't substitute non-local labels, this confuses CFG.
Reject certain invalid forms of CONST that we create.
Reject cases that will cause decode_rtx_const to
die. On the alpha when simplifying a switch, we
get (const (truncate (minus (label_ref)
(label_ref)))). Likewise on IA-64, except without the
truncate. Do nothing for this case.
Look for a substitution that makes a valid insn.
The result of apply_change_group can be ignored; see
canon_reg. If we previously found constant pool entries for
constants and this is a constant, try making a
pool entry. Put it in src_folded unless we already have done
this since that is where it likely came from. If we changed the insn too much, handle this set from scratch.
In general, it is good to have a SET with SET_SRC == SET_DEST.
However, there is an important exception: If both are registers
that are not the head of their equivalence class, replace SET_SRC
with the head of the class. If we do not do this, we will have
both registers live over a portion of the basic block. This way,
their lifetimes will likely abut instead of overlapping. Don't do this if the original insn had a hard reg as
SET_SRC or SET_DEST. We can't call canon_reg here because it won't do anything if
SRC is a hard register. We must use validate-change even for this, because this
might be a special no-op instruction, suitable only to
tag notes onto. If we had a constant that is cheaper than what we are now
setting SRC to, use that constant. We ignored it when we
thought we could make this into a no-op. If we made a change, recompute SRC values.
If this is a single SET, we are setting a register, and we have an
equivalent constant, we want to add a REG_EQUAL note if the constant
is different from the source. We don't want to do it for a constant
pseudo since verifying that this pseudo hasn't been eliminated is a
pain; moreover such a note won't help anything.
Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
which can be created for a reference to a compile time computable
entry in a jump table. Make sure that the rtx is not shared.
Record the actual constant value in a REG_EQUAL note,
making a new one if one does not already exist. Now deal with the destination.
Look within any ZERO_EXTRACT to the MEM or REG within it.
Stack pushes invalidate the stack pointer.
Compute the hash code of the destination now,
before the effects of this instruction are recorded,
since the register values used in the address computation
are those before this instruction. Don't enter a bit-field in the hash table
because the value in it after the store
may not equal what was stored, due to truncation. Exception: if the value is constant,
and it won't be truncated, record it. This is chosen so that the destination will be invalidated
but no new value will be recorded.
We must invalidate because sometimes constant
values can be recorded for bitfields. If only one set in a JUMP_INSN and it is now a no-op, we can delete
the insn. One less use of the label this insn used to jump to.
No more processing for this set.
If this SET is now setting PC to a label, we know it used to
be a conditional or computed branch. We reemit the jump in as many cases as possible just in
case the form of an unconditional jump is significantly
different than a computed jump or conditional jump.
If this insn has multiple sets, then reemitting the
jump is nontrivial. So instead we just force rerecognition
and hope for the best. Make sure to copy over REG_NON_LOCAL_GOTO.
Do not bother deleting any unreachable code, let jump do it.
If destination is volatile, invalidate it and then do no further
processing for this assignment. If setting CC0, record what it was set to, or a constant, if it
is equivalent to a constant. If it is being set to a floating-point
value, make a COMPARE with the appropriate constant of 0. If we
don't do this, later code can interpret this as a test against
const0_rtx, which can cause problems if we try to put it into an
insn as a floating-point operand. Now enter all non-volatile source expressions in the hash table
if they are not already present.
Record their equivalence classes in src_elt.
This way we can insert the corresponding destinations into
the same classes even if the actual sources are no longer in them
(having been invalidated). Check to see if src_eqv_elt is the same as a set source which
does not yet have an elt, and if so set the elt of the set source
to src_eqv_elt. REG_EQUAL in setting a STRICT_LOW_PART
gives an equivalent for the entire destination register,
not just for the subreg being stored in now.
This is a more interesting equivalence, so we arrange later
to treat the entire reg as the destination. Insert source and constant equivalent into hash table, if not
already present. It's possible that we have a source value known to be
constant but don't have a REG_EQUAL note on the insn.
Lack of a note will mean src_eqv_elt will be NULL. This
can happen where we've generated a SUBREG to access a
CONST_INT that is already in a register in a wider mode.
Ensure that the source expression is put in the proper
constant class. Note that these insert_regs calls cannot remove
any of the src_elt's, because they would have failed to
match if not still valid. If we did not insert the source into the hash table (e.g., it was
volatile), note the equivalence class for the REG_EQUAL value, if any,
so that the destination goes into that class. Record destination addresses in the hash table. This allows us to
check if they are invalidated by other sets. Some registers are invalidated by subroutine calls. Memory is
invalidated by non-constant calls. Now invalidate everything set by this instruction.
If a SUBREG or other funny destination is being set,
sets[i].rtl is still nonzero, so here we invalidate the reg
a part of which is being set. We can't use the inner dest, because the mode associated with
a ZERO_EXTRACT is significant. Needed for registers to remove the register from its
previous quantity's chain.
Needed for memory if this is a nonvarying address, unless
we have just done an invalidate_memory that covers even those. A volatile ASM or an UNSPEC_VOLATILE invalidates everything.
Don't cse over a call to setjmp; on some machines (eg VAX)
the regs restored by the longjmp come from a later time
than the setjmp. Make sure registers mentioned in destinations
are safe for use in an expression to be inserted.
This removes from the hash table
any invalid entry that refers to one of these registers.
We don't care about the return value from mention_regs because
we are going to hash the SET_DEST values unconditionally. We used to rely on all references to a register becoming
inaccessible when a register changes to a new quantity,
since that changes the hash code. However, that is not
safe, since after HASH_SIZE new quantities we get a
hash 'collision' of a register with its own invalid
entries. And since SUBREGs have been changed not to
change their hash code with the hash code of the register,
it wouldn't work any longer at all. So we have to check
for any invalid references lying around now.
This code is similar to the REG case in mention_regs,
but it knows that reg_tick has been incremented, and
it leaves reg_in_table as -1 . We may have just removed some of the src_elt's from the hash table.
So replace each one with the current head of the same class.
Also check if destination addresses have been removed. The elt was removed, which means this destination is not
valid after this instruction. If elt was removed, find current head of same class,
or 0 if nothing remains of that class. Now insert the destinations into their equivalence classes.
Don't record value if we are not supposed to risk allocating
floating-point values in registers that might be wider than
memory. Don't record BLKmode values, because we don't know the
size of it, and can't be sure that other BLKmode values
have the same or smaller size. If we didn't put a REG_EQUAL value or a source into the hash
table, there is no point is recording DEST. If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
or SIGN_EXTEND, don't record DEST since it can cause
some tracking to be wrong.
??? Think about this more later. STRICT_LOW_PART isn't part of the value BEING set,
and neither is the SUBREG inside it.
Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. Registers must also be inserted into chains for quantities.
If `insert_regs' changes something, the hash code must be
recalculated. If this is a constant, insert the constant anchors with the
equivalent register-offset expressions using register DEST. If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
narrower than M2, and both M1 and M2 are the same number of words,
we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
make that equivalence as well.
However, BAR may have equivalences for which gen_lowpart
will produce a simpler value than gen_lowpart applied to
BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
BAR's equivalences. If we don't get a simplified form, make
the SUBREG. It will not be used in an equivalence, but will
cause two similar assignments to be detected.
Note the loop below will find SUBREG_REG (DEST) since we have
already entered SRC and DEST of the SET in the table. Ignore invalid entries.
We may have already been playing subreg games. If the
mode is already correct for the destination, use it. Calculate big endian correction for the SUBREG_BYTE.
We have already checked that M1 (GET_MODE (dest))
is not narrower than M2 (new_mode). The call to simplify_gen_subreg fails if the value
is VOIDmode, yet we can't do any simplification, e.g.
for EXPR_LISTs denoting function call results.
It is invalid to construct a SUBREG with a VOIDmode
SUBREG_REG, hence a zero new_src means we can't do
this substitution. Put the new source in the hash table is if isn't
already. Show that two things that we've seen before are
actually the same. Ignore invalid entries.
Special handling for (set REG0 REG1) where REG0 is the
"cheapest", cheaper than REG1. After cse, REG1 will probably not
be used in the sequel, so (if easily done) change this insn to
(set REG1 REG0) and replace REG1 with REG0 in the previous insn
that computed their value. Then REG1 will become a dead store
and won't cloud the situation for later optimizations.
Do not make this change if REG1 is a hard register, because it will
then be used in the sequel and we may be changing a two-operand insn
into a three-operand insn.
Also do not do this if we are operating on a copy of INSN.
|
static |
Perform cse on the instructions of a function. F is the first instruction. NREGS is one plus the highest pseudo-reg number used in the instruction. Return 2 if jump optimizations should be redone due to simplifications in conditional jump instructions. Return 1 if the CFG should be cleaned up because it has been modified. Return 0 otherwise.
Set up the table of already visited basic blocks.
Loop over basic blocks in reverse completion order (RPO),
excluding the ENTRY and EXIT blocks. Find the first block in the RPO queue that we have not yet
processed before. Find all paths starting with BB, and process them.
Pre-scan the path.
If this basic block has no sets, skip it.
Get a reasonable estimate for the maximum number of qty's
needed for this path. For this, we take the number of sets
and multiply that by MAX_RECOG_OPERANDS. Dump the path we're about to process.
Clean up.
|
static |
Referenced by cse_process_notes().
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Scan to the end of the path described by DATA. Return an estimate of the total number of SETs of all insns in the path.
Scan to end of each basic block in the path.
A PARALLEL can have lots of SETs in it,
especially if it is really an ASM_OPERANDS.
References cc0_rtx, is_dead_reg(), next_nonnote_nondebug_insn(), reg_referenced_p(), set_noop_p(), and side_effects_p().
|
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References cse_dump_path(), cse_extended_basic_block(), cse_prescan_path(), dump_file, max_qty, and cse_basic_block_data::nsets.
|
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Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes and replace any registers in them with either an equivalent constant or the canonical form of the register. If we are inside an address, only do this if the address remains valid. OBJECT is 0 except when within a MEM in which case it is the MEM. Return the replacement for X.
Fall through.
We don't substitute VOIDmode constants into these rtx,
since they would impede folding. Return a constant or a constant register.
Otherwise, canonicalize this register.
References branch_path::bb, cse_basic_block_data::path, and record_jump_equiv().
|
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|
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Remove REG from its equivalence class.
If invalid, do nothing.
| int delete_trivially_dead_insns | ( | ) |
Scan all the insns and delete any that are dead; i.e., they store a register that is never used or they copy a register to itself. This is used to remove insns made obviously dead by cse, loop or other optimizations. It improves the heuristics in loop since it won't try to move dead invariants out of loops or make givs for dead quantities. The remaining passes of the compilation are also sped up.
First count the number of times each register is used.
If there can be debug insns, COUNTS are 3 consecutive arrays.
First one counts how many times each pseudo is used outside
of debug insns, second counts how many times each pseudo is
used in debug insns and third counts how many times a pseudo
is stored. If no debug insns can be present, COUNTS is just an array
which counts how many times each pseudo is used. Go from the last insn to the first and delete insns that only set unused
registers or copy a register to itself. As we delete an insn, remove
usage counts for registers it uses.
The first jump optimization pass may leave a real insn as the last
insn in the function. We must not skip that insn or we may end
up deleting code that is not really dead.
If some otherwise unused register is only used in DEBUG_INSNs,
try to create a DEBUG_EXPR temporary and emit a DEBUG_INSN before
the setter. Then go through DEBUG_INSNs and if a DEBUG_EXPR
has been created for the unused register, replace it with
the DEBUG_EXPR, otherwise reset the DEBUG_INSN. If this is a dead insn, delete it and show registers in it aren't
being used. Used at least once in some DEBUG_INSN.
And set exactly once.
Create DEBUG_EXPR (and DEBUG_EXPR_DECL).
Emit a debug bind insn before the insn in which
reg dies. If this debug insn references a dead register that wasn't replaced
with an DEBUG_EXPR, reset the DEBUG_INSN. Clean up.
References cse_change_cc_mode_insn(), cse_change_cc_mode_insns(), and gen_rtx_REG().
Referenced by split_live_ranges_for_shrink_wrap().
| void dump_class | ( | struct table_elt * | ) |
| DEBUG_FUNCTION void dump_class | ( | ) |
Dump the expressions in the equivalence class indicated by CLASSP. This function is used only for debugging.
Referenced by find_comparison_args().
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Return a constant value currently equivalent to X. Return 0 if we don't know one.
See if we previously assigned a constant value to this SUBREG.
If we didn't and if doing so makes sense, see if we previously
assigned a constant value to the enclosing word mode SUBREG. Otherwise see if we already have a constant for the inner REG,
and if that is enough to calculate an equivalent constant for
the subreg. Note that the upper bits of paradoxical subregs
are undefined, so they cannot be said to equal anything. If X is a MEM, see if it is a constant-pool reference, or look it up in
the hash table in case its value was seen before.
References insert(), insert_regs(), and rehash_using_reg().
| int exp_equiv_p | ( | ) |
Return 1 iff X and Y would canonicalize into the same thing, without actually constructing the canonicalization of either one. If VALIDATE is nonzero, we assume X is an expression being processed from the rtl and Y was found in the hash table. We check register refs in Y for being marked as valid. If FOR_GCSE is true, we compare X and Y for equivalence for GCSE.
Note: it is incorrect to assume an expression is equivalent to itself
if VALIDATE is nonzero. (MULT:SI x y) and (MULT:HI x y) are NOT equivalent.
MEMs referring to different address space are not equivalent.
If the quantities are not the same, the expressions are not
equivalent. If there are and we are not to validate, they
are equivalent. Otherwise, ensure all regs are up-to-date. A volatile mem should not be considered equivalent to any
other. Can't merge two expressions in different alias sets, since we
can decide that the expression is transparent in a block when
it isn't, due to it being set with the different alias set.
Also, can't merge two expressions with different MEM_ATTRS.
They could e.g. be two different entities allocated into the
same space on the stack (see e.g. PR25130). In that case, the
MEM addresses can be the same, even though the two MEMs are
absolutely not equivalent.
But because really all MEM attributes should be the same for
equivalent MEMs, we just use the invariant that MEMs that have
the same attributes share the same mem_attrs data structure. For commutative operations, check both orders.
We don't use the generic code below because we want to
disregard filename and line numbers. A volatile asm isn't equivalent to any other.
Compare the elements. If any pair of corresponding elements
fail to match, return 0 for the whole thing.
Referenced by compute_const_anchors(), find_loads(), hash_rtx(), insert_store(), and remove_from_table().
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Given an operation (CODE, *PARG1, *PARG2), where code is a comparison operation (EQ, NE, GT, etc.), follow it back through the hash table and what values are being compared. *PARG1 and *PARG2 are updated to contain the rtx representing the values actually being compared. For example, if *PARG1 was (cc0) and *PARG2 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were compared to produce cc0. The return value is the comparison operator and is either the code of A or the code corresponding to the inverse of the comparison.
Set nonzero when we find something of interest.
If ARG2 is const0_rtx, see what ARG1 is equivalent to.
Remember state from previous iteration.
If arg1 is a COMPARE, extract the comparison arguments from it.
On machines with CC0, this is the only case that can occur, since
fold_rtx will return the COMPARE or item being compared with zero
when given CC0. If ARG1 is a comparison operator and CODE is testing for
STORE_FLAG_VALUE, get the inner arguments. ??? We could also check for
(ne (and (eq (...) (const_int 1))) (const_int 0))
and related forms, but let's wait until we see them occurring. Look up ARG1 in the hash table and see if it has an equivalence
that lets us see what is being compared. If what we compare is already known to be constant, that is as
good as it gets.
We need to break the loop in this case, because otherwise we
can have an infinite loop when looking at a reg that is known
to be a constant which is the same as a comparison of a reg
against zero which appears later in the insn stream, which in
turn is constant and the same as the comparison of the first reg
against zero... If the entry isn't valid, skip it.
If it's a comparison we've used before, skip it.
Another possibility is that this machine has a compare insn
that includes the comparison code. In that case, ARG1 would
be equivalent to a comparison operation that would set ARG1 to
either STORE_FLAG_VALUE or zero. If this is an NE operation,
ORIG_CODE is the actual comparison being done; if it is an EQ,
we must reverse ORIG_CODE. On machine with a negative value
for STORE_FLAG_VALUE, also look at LT and GE operations. If this non-trapping address, e.g. fp + constant, the
equivalent is a better operand since it may let us predict
the value of the comparison. If we didn't find a useful equivalence for ARG1, we are done.
Otherwise, set up for the next iteration. If we need to reverse the comparison, make sure that that is
possible -- we can't necessarily infer the value of GE from LT
with floating-point operands. Return our results. Return the modes from before fold_rtx
because fold_rtx might produce const_int, and then it's too late.
References apply_change_group(), canonicalize_change_group(), copy_rtx(), equiv_constant(), false_rtx, fold_rtx(), gdbhooks::GET_RTX_FORMAT(), gdbhooks::GET_RTX_LENGTH(), prev_insn_cc0, prev_insn_cc0_mode, RTX_COMM_COMPARE, RTX_COMPARE, RTX_UNARY, simplify_unary_operation(), true_rtx, validate_change(), and validate_unshare_change().
|
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We need to express ANCHOR_ELT->exp + OFFS. Walk the equivalence list of ANCHOR_ELT and see if offsetting any of the entries by OFFS would create a valid expression. Return the cheapest and oldest of such expressions. In *OLD, return how old the resulting expression is compared to the other equivalent expressions.
Find the cheapest and *oldest* expression to maximize the chance of
reusing the same pseudo. Ignore expressions that are no longer valid.
References table_elt::first_same_value, table_elt::next_same_value, and table_elt::prev_same_value.
|
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Record all the SETs in this instruction into SETS_PTR, and return the number of recorded sets.
Ignore SETs that are unconditional jumps.
They never need cse processing, so this does not hurt.
The reason is not efficiency but rather
so that we can test at the end for instructions
that have been simplified to unconditional jumps
and not be misled by unchanged instructions
that were unconditional jumps to begin with. Don't count call-insns, (set (reg 0) (call ...)), as a set.
The hard function value register is used only once, to copy to
someplace else, so it isn't worth cse'ing. Go over the epressions of the PARALLEL in forward order, to
put them in the same order in the SETS array. As above, we ignore unconditional jumps and call-insns and
ignore the result of apply_change_group.
Referenced by try_back_substitute_reg().
|
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|
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Nonzero if X has the form (PLUS frame-pointer integer).
References targetm.
|
static |
Flush the entire hash table.
Note that invalidate can remove elements
after P in the current hash chain.
References check_dependence_data::addr, table_elt::canon_exp, canon_rtx(), table_elt::exp, check_dependence_data::exp, table_elt::next_same_hash, and table.
Referenced by invalidate_from_clobbers().
Referenced by find_comparison_args().
|
static |
If X is a nontrivial arithmetic operation on an argument for which a constant value can be determined, return the result of operating on that value, as a constant. Otherwise, return X, possibly with one or more operands changed to a forward-propagated constant. If X is a register whose contents are known, we do NOT return those contents here; equiv_constant is called to perform that task. For SUBREGs and MEMs, we do that both here and in equiv_constant. INSN is the insn that we may be modifying. If it is 0, make a copy of X before modifying it.
Operands of X.
Constant equivalents of first three operands of X;
0 when no such equivalent is known. The mode of the first operand of X. We need this for sign and zero
extends. Try to perform some initial simplifications on X.
No use simplifying an EXPR_LIST
since they are used only for lists of args
in a function call's REG_EQUAL note. Anything else goes through the loop below.
Try folding our operands.
Then see which ones have constant values known. For the first three operands, see if the operand
is constant or equivalent to a constant. Pick the least expensive of the argument and an equivalent constant
argument. It's not safe to substitute the operand of a conversion
operator with a constant, as the conversion's identity
depends upon the mode of its operand. This optimization
is handled by the call to simplify_unary_operation. Canonicalize X if necessary, and keep const_argN and folded_argN
consistent with the order in X. If X is an arithmetic operation, see if we can simplify it.
We can't simplify extension ops unless we know the
original mode. See what items are actually being compared and set FOLDED_ARG[01]
to those values and CODE to the actual comparison code. If any are
constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
do anything if both operands are already known to be constant. ??? Vector mode comparisons are not supported yet.
If the mode is VOIDmode or a MODE_CC mode, we don't know
what kinds of things are being compared, so we can't do
anything with this comparison. If we do not now have two constants being compared, see
if we can nevertheless deduce some things about the
comparison. See if we can find an equivalent of folded_arg0
that gets us a cheaper expression, possibly a
constant through simplifications. If the entry isn't valid, skip it.
Try to simplify using this equivalence.
If we have a cheaper expression now, use that
and try folding it further, from the top. See if the two operands are the same.
If FOLDED_ARG0 is a register, see if the comparison we are
doing now is either the same as we did before or the reverse
(we only check the reverse if not floating-point). If we are comparing against zero, see if the first operand is
equivalent to an IOR with a constant. If so, we may be able to
determine the result of this comparison. If the second operand is a LABEL_REF, see if the first is a MINUS
with that LABEL_REF as its second operand. If so, the result is
the first operand of that MINUS. This handles switches with an
ADDR_DIFF_VEC table. Now try for a CONST of a MINUS like the above.
Likewise if the operands are in the other order.
Now try for a CONST of a MINUS like the above.
If second operand is a register equivalent to a negative
CONST_INT, see if we can find a register equivalent to the
positive constant. Make a MINUS if so. Don't do this for
a non-negative constant since we might then alternate between
choosing positive and negative constants. Having the positive
constant previously-used is the more common case. Be sure
the resulting constant is non-negative; if const_arg1 were
the smallest negative number this would overflow: depending
on the mode, this would either just be the same value (and
hence not save anything) or be incorrect. This used to test
-INTVAL (const_arg1) >= 0
But The Sun V5.0 compilers mis-compiled that test. So
instead we test for the problematic value in a more direct
manner and hope the Sun compilers get it correct. If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
If so, produce (PLUS Z C2-C). Fall through.
If we have (<op> <reg> <const_int>) for an associative OP and REG
is known to be of similar form, we may be able to replace the
operation with a combined operation. This may eliminate the
intermediate operation if every use is simplified in this way.
Note that the similar optimization done by combine.c only works
if the intermediate operation's result has only one reference. If we have compiled a statement like
"if (x == (x & mask1))", and now are looking at
"x & mask2", we will have a case where the first operand
of Y is the same as our first operand. Unless we detect
this case, an infinite loop will result. Don't associate these operations if they are a PLUS with the
same constant and it is a power of two. These might be doable
with a pre- or post-increment. Similarly for two subtracts of
identical powers of two with post decrement. ??? Vector mode shifts by scalar
shift operand are not supported yet. Compute the code used to compose the constants. For example,
A-C1-C2 is A-(C1 + C2), so if CODE == MINUS, we want PLUS. If we are associating shift operations, don't let this
produce a shift of the size of the object or larger.
This could occur when we follow a sign-extend by a right
shift on a machine that does a sign-extend as a pair
of shifts. As an exception, we can turn an ASHIFTRT of this
form into a shift of the number of bits - 1. If Y contains our first operand (the most common way this
can happen is if Y is a MEM), we would do into an infinite
loop if we tried to fold it. So don't in that case. ??? The associative optimization performed immediately above is
also possible for DIV and UDIV using associate_code of MULT.
However, we would need extra code to verify that the
multiplication does not overflow, that is, there is no overflow
in the calculation of new_const. (lo_sum (high X) X) is simply X.
|
static |
Perform common subexpression elimination. Nonzero value from `cse_main' means that jumps were simplified and some code may now be unreachable, so do jump optimization again.
|
static |
|
static |
Referenced by cse_change_cc_mode_insns().
|
staticread |
|
staticread |
Find a cse_reg_info entry for REGNO.
If this entry has not been initialized, go ahead and initialize
it.
|
static |
|
static |
Given REGNO, initialize the cse_reg_info entry for REGNO.
Set TIMESTAMP field to CSE_REG_INFO_TIMESTAMP so that this
entry will be considered to have been initialized. Initialize the rest of the entry.
| unsigned hash_rtx | ( | const_rtx | x, |
| enum machine_mode | mode, | ||
| int * | do_not_record_p, | ||
| int * | hash_arg_in_memory_p, | ||
| bool | have_reg_qty | ||
| ) |
Hash an rtx. We are careful to make sure the value is never negative. Equivalent registers hash identically. MODE is used in hashing for CONST_INTs only; otherwise the mode of X is used. Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains a MEM rtx which does not have the MEM_READONLY_P flag set. Note that cse_insn knows that the hash code of a MEM expression is just (int) MEM plus the hash code of the address.
References exp_equiv_p().
Referenced by invariant_for_use().
| unsigned hash_rtx_cb | ( | const_rtx | x, |
| enum machine_mode | mode, | ||
| int * | do_not_record_p, | ||
| int * | hash_arg_in_memory_p, | ||
| bool | have_reg_qty, | ||
| hash_rtx_callback_function | cb | ||
| ) |
Same as hash_rtx, but call CB on each rtx if it is not NULL. When the callback returns true, we continue with the new rtx.
Used to turn recursion into iteration. We can't rely on GCC's
tail-recursion elimination since we need to keep accumulating values
in HASH. Invoke the callback first.
On some machines, we can't record any non-fixed hard register,
because extending its life will cause reload problems. We
consider ap, fp, sp, gp to be fixed for this purpose.
We also consider CCmode registers to be fixed for this purpose;
failure to do so leads to failure to simplify 0<100 type of
conditionals.
On all machines, we can't record any global registers.
Nor should we record any register that is in a small
class, as defined by TARGET_CLASS_LIKELY_SPILLED_P. We handle SUBREG of a REG specially because the underlying
reg changes its hash value with every value change; we don't
want to have to forget unrelated subregs when one subreg changes. This is like the general case, except that it only counts
the integers representing the constant. Assume there is only one rtx object for any given label.
We don't hash on the address of the CODE_LABEL to avoid bootstrap
differences and differences between each stage's debugging dumps. Don't hash on the symbol's address to avoid bootstrap differences.
Different hash values may cause expressions to be recorded in
different orders and thus different registers to be used in the
final assembler. This also avoids differences in the dump files
between various stages. We don't record if marked volatile or if BLKmode since we don't
know the size of the move. Now that we have already found this special case,
might as well speed it up as much as possible. A USE that mentions non-volatile memory needs special
handling since the MEM may be BLKmode which normally
prevents an entry from being made. Pure calls are
marked by a USE which mentions BLKmode memory.
See calls.c:emit_call_1. Now that we have already found this special case,
might as well speed it up as much as possible. We don't want to take the filename and line into account.
If we are about to do the last recursive call
needed at this level, change it into iteration.
This function is called enough to be worth it. Unused.
Referenced by invalidate_for_call().
|
inlinestatic |
|
inlinestatic |
Hash a string. Just add its bytes up.
|
static |
Return true if BB has exception handling successor edges.
|
static |
Initialize CSE_REG_INFO_TABLE.
Do we need to grow the table?
Compute a new size that is a power of 2 and no smaller
than the large of NREGS and 64. If we need a big table, allocate just enough to hold
NREGS registers. Reallocate the table with NEW_SIZE entries.
Do we have all of the first NREGS entries initialized?
Put the old timestamp on newly allocated entries so that they
will all be considered out of date. We do not touch those
entries beyond the first NREGS entries to be nice to the
virtual memory.
|
staticread |
Referenced by equiv_constant(), and insert_with_costs().
|
staticread |
Wrap insert_with_costs by passing the default costs.
|
static |
Insert the equivalence between ANCHOR and (REG + OFF) in mode MODE.
REG has just been inserted and the hash codes recomputed.
Use the cost of the register rather than the whole expression. When
looking up constant anchors we will further offset the corresponding
expression therefore it does not make sense to prefer REGs over
reg-immediate additions. Prefer instead the oldest expression. Also
don't prefer pseudos over hard regs so that we derive constants in
argument registers from other argument registers rather than from the
original pseudo that was used to synthesize the constant.
|
static |
The constant CST is equivalent to the register REG. Create equivalences between the two anchors of CST and the corresponding register-offset expressions using REG.
Ignore anchors of value 0. Constants accessible from zero are
simple.
Referenced by equiv_constant().
|
static |
Update the register quantities for inserting X into the hash table with a value equivalent to CLASSP. (If the class does not contain a REG, it is irrelevant.) If MODIFIED is nonzero, X is a destination; it is being modified. Note that delete_reg_equiv should be called on a register before insert_regs is done on that register with MODIFIED != 0. Nonzero value means that elements of reg_qty have changed so X's hash code may be different.
If REGNO is in the equivalence table already but is of the
wrong mode for that equivalence, don't do anything here. Suppose that 5 is hard reg and 100 and 101 are
pseudos. Consider
(set (reg:si 100) (reg:si 5))
(set (reg:si 5) (reg:si 100))
(set (reg:di 101) (reg:di 5))
We would now set REG_QTY (101) = REG_QTY (5), but the
entry for 5 is in SImode. When we use this later in
copy propagation, we get the register in wrong mode. Mention_regs for a SUBREG checks if REG_TICK is exactly one larger
than REG_IN_TABLE to find out if there was only a single preceding
invalidation - for the SUBREG - or another one, which would be
for the full register. However, if we find here that REG_TICK
indicates that the register is invalid, it means that it has
been invalidated in a separate operation. The SUBREG might be used
now (then this is a recursive call), or we might use the full REG
now and a SUBREG of it later. So bump up REG_TICK so that
mention_regs will do the right thing. If X is a SUBREG, we will likely be inserting the inner register in the
table. If that register doesn't have an assigned quantity number at
this point but does later, the insertion that we will be doing now will
not be accessible because its hash code will have changed. So assign
a quantity number now.
References HOST_WIDE_INT, and targetm.
|
staticread |
|
staticread |
Insert X in the hash table, assuming HASH is its hash code and CLASSP is an element of the class it should go in (or 0 if a new class should be made). COST is the code of X and reg_cost is the cost of registers in X. It is inserted at the proper position to keep the class in the order cheapest first. MODE is the machine-mode of X, or if X is an integer constant with VOIDmode then MODE is the mode with which X will be used. For elements of equal cheapness, the most recent one goes in front, except that the first element in the list remains first unless a cheaper element is added. The order of pseudo-registers does not matter, as canon_reg will be called to find the cheapest when a register is retrieved from the table. The in_memory field in the hash table element is set to 0. The caller must set it nonzero if appropriate. You should call insert_regs (X, CLASSP, MODIFY) before calling here, and if insert_regs returns a nonzero value you must then recompute its hash code before calling here. If necessary, update table showing constant values of quantities.
If X is a register and we haven't made a quantity for it,
something is wrong. If X is a hard register, show it is being put in the table.
Put an element for X into the right hash bucket.
Put it into the proper value-class.
Insert at the head of the class.
Insert not at head of the class.
Put it after the last element cheaper than X.
Put it after P and before NEXT.
If this is a constant being set equivalent to a register or a register
being set equivalent to a constant, note the constant equivalence.
If this is a constant, it cannot be equivalent to a different constant,
and a constant is the only thing that can be cheaper than a register. So
we know the register is the head of the class (before the constant was
inserted).
If this is a register that is not already known equivalent to a
constant, we must check the entire class.
If this is a register that is already known equivalent to an insn,
update the qtys `const_insn' to show that `this_insn' is the latest
insn making that quantity equivalent to the constant. If this is a constant with symbolic value,
and it has a term with an explicit integer value,
link it up with related expressions. Get the integer-free subexpression in the hash table.
Initialize SUBELT's circular chain if it has none.
Find the element in the circular chain that precedes SUBELT.
Put new ELT into SUBELT's circular chain just before SUBELT.
This way the element that follows SUBELT is the oldest one.
References get_related_value(), insert(), lookup(), and table_elt::related_value.
|
static |
|
static |
Return true if insn is live.
References cse_change_cc_mode_insns(), and gen_rtx_REG().
|
static |
Referenced by invalidate_memory().
|
static |
Remove from the hash table, or mark as invalid, all expressions whose values could be altered by storing in X. X is a register, a subreg, or a memory reference with nonvarying address (because, when a memory reference with a varying address is stored in, all memory references are removed by invalidate_memory so specific invalidation is superfluous). FULL_MODE, if not VOIDmode, indicates that this much should be invalidated instead of just the amount indicated by the mode of X. This is only used for bitfield stores into memory. A nonvarying address may be just a register or just a symbol reference, or it may be either of those plus a numeric offset.
If X is a register, dependencies on its contents are recorded
through the qty number mechanism. Just change the qty number of
the register, mark it as invalid for expressions that refer to it,
and remove it itself. Remove REGNO from any quantity list it might be on and indicate
that its value might have changed. If it is a pseudo, remove its
entry from the hash table.
For a hard register, we do the first two actions above for any
additional hard registers corresponding to X. Then, if any of these
registers are in the table, we must remove any REG entries that
overlap these registers. This is part of a disjoint return value; extract the location in
question ignoring the offset. Calculate the canonical version of X here so that
true_dependence doesn't generate new RTL for X on each call. Remove all hash table elements that refer to overlapping pieces of
memory. Just canonicalize the expression once;
otherwise each time we call invalidate
true_dependence will canonicalize the
expression again.
|
static |
Remove from the hash table any expression that is a call-clobbered register. Also update their TICK values.
Go through all the hard registers. For each that is clobbered in
a CALL_INSN, remove the register from quantity chains and update
reg_tick if defined. Also see if any of these registers is currently
in the table. In the case where we have no call-clobbered hard registers in the
table, we are done. Otherwise, scan the table and remove any
entry that overlaps a call-clobbered register.
References hash_rtx_cb().
|
static |
|
static |
Perform invalidation on the basis of everything about INSN, except for invalidating the actual places that are SET in it. This includes the places CLOBBERed, and anything that might alias with something that is SET or CLOBBERed.
References flush_hash_table().
|
static |
Referenced by try_back_substitute_reg().
|
static |
Perform invalidation on the basis of everything about INSN. This includes the places CLOBBERed, and anything that might alias with something that is SET or CLOBBERed.
Ensure we invalidate the destination register of a CALL insn.
This is necessary for machines where this register is a fixed_reg,
because no other code would invalidate it.
|
static |
Remove from the hash table all expressions that reference memory.
References df_get_artificial_defs(), DF_REF_AT_TOP, basic_block_def::index, and invalidate().
|
static |
Return if a DEBUG_INSN needs to be reset because some dead pseudo doesn't have a replacement. Callback for for_each_rtx.
|
inlinestatic |
Return true if X is a dead register.
Referenced by cse_prescan_path().
Referenced by insert_with_costs(), and remove_invalid_refs().
|
staticread |
Look up X in the hash table and return its table element, or 0 if X is not in the table. MODE is the machine-mode of X, or if X is an integer constant with VOIDmode then MODE is the mode with which X will be used. Here we are satisfied to find an expression whose tree structure looks like X.
References table_elt::first_same_value, and table_elt::next_same_value.
|
static |
Look for an expression equivalent to X and with code CODE. If one is found, return that expression.
Make sure this is a valid entry in the table.
References qty_table_elem::const_insn, qty_table_elem::const_rtx, table_elt::exp, qty_table, and this_insn.
|
staticread |
Like `lookup' but don't care whether the table element uses invalid regs. Also ignore discrepancies in the machine mode of a register.
Don't check the machine mode when comparing registers;
invalidating (REG:SI 0) also invalidates (REG:DF 0).
|
static |
|
static |
Say that register REG contains a quantity in mode MODE not in any register before and initialize that quantity.
| rtl_opt_pass* make_pass_cse | ( | ) |
| rtl_opt_pass* make_pass_cse2 | ( | ) |
| rtl_opt_pass* make_pass_cse_after_global_opts | ( | ) |
|
static |
|
static |
Make reg NEW equivalent to reg OLD. OLD is not changing; NEW is.
Nothing should become eqv until it has a "non-invalid" qty number.
Prefer fixed hard registers to anything. Prefer pseudo regs to other
hard regs. Among pseudos, if NEW will live longer than any other reg
of the same qty, and that is beyond the current basic block,
make it the new canonical replacement for this qty. Certain fixed registers might be of the class NO_REGS. This means
that not only can they not be allocated by the compiler, but
they cannot be used in substitutions or canonicalizations
either. If NEW is a hard reg (known to be non-fixed), insert at end.
Otherwise, insert before any non-fixed hard regs that are at the
end. Registers of class NO_REGS cannot be used as an
equivalent for anything.
|
static |
|
static |
Remove any invalid expressions from the hash table that refer to any of the registers contained in expression X. Make sure that newly inserted references to those registers as subexpressions will be considered valid. mention_regs is not called when a register itself is being stored in the table. Return 1 if we have done something that may have changed the hash code of X.
If this is a SUBREG, we don't want to discard other SUBREGs of the same
pseudo if they don't use overlapping words. We handle only pseudos
here for simplicity. If REG_IN_TABLE (i) differs from REG_TICK (i) by one, and
the last store to this register really stored into this
subreg, then remove the memory of this subreg.
Otherwise, remove any memory of the entire register and
all its subregs from the table. If X is a comparison or a COMPARE and either operand is a register
that does not have a quantity, give it one. This is so that a later
call to record_jump_equiv won't cause X to be assigned a different
hash code and not found in the table after that call.
It is not necessary to do this here, since rehash_using_reg can
fix up the table later, but doing this here eliminates the need to
call that expensive function in the most common case where the only
use of the register is in the comparison.
|
static |
Given two equivalence classes, CLASS1 and CLASS2, put all the entries from CLASS2 into CLASS1. This is done when we have reached an insn which makes the two classes equivalent. CLASS1 will be the surviving class; CLASS2 should not be used after this call. Any invalid entries in CLASS2 will not be copied.
Ensure we start with the head of the classes.
If they were already equal, forget it.
Remove old entry, make a new one in CLASS1's class.
Don't do this for invalid entries as we cannot find their
hash code (it also isn't necessary).
|
static |
Clear the hash table and initialize each register with its own quantity, for a new basic block.
Invalidate cse_reg_info_table.
Clear out hash table state for this pass.
The per-quantity values used to be initialized here, but it is
much faster to initialize each as it is made in `make_new_qty'. Now relink this hash entire chain into
the free element list.
|
static |
|
static |
Internal function, to compute cost when X is not a register; called from COST macro to keep it simple.
|
static |
|
static |
Return a negative value if an rtx A, whose costs are given by COST_A and REGCOST_A, is more desirable than an rtx B. Return a positive value if A is less desirable, or 0 if the two are equally good.
First, get rid of cases involving expressions that are entirely
unwanted. Avoid extending lifetimes of hardregs.
Normal operation costs take precedence.
Only if these are identical consider effects on register pressure.
References cse_reg_info_table, cse_reg_info_table_first_uninitialized, cse_reg_info_table_size, and free().
|
static |
We know that comparison CODE applied to OP0 and OP1 in MODE is true. REVERSED_NONEQUALITY is nonzero if CODE had to be swapped. Make any useful entries we can with that information. Called from above function and called recursively.
If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
we know that they are also equal in the smaller mode (this is also
true for all smaller modes whether or not there is a SUBREG, but
is not worth testing for with no SUBREG). Note that GET_MODE (op0) may not equal MODE.
Similarly, if this is an NE comparison, and either is a SUBREG
making a smaller mode, we know the whole thing is also NE. Note that GET_MODE (op0) may not equal MODE;
if we test MODE instead, we can get an infinite recursion
alternating between two modes each wider than MODE. Hash both operands.
Look up both operands.
If both operands are already equivalent or if they are not in the
table but are identical, do nothing. If we aren't setting two things equal all we can do is save this
comparison. Similarly if this is floating-point. In the latter
case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
If we record the equality, we might inadvertently delete code
whose intent was to change -0 to +0. If we reversed a floating-point comparison, if OP0 is not a
register, or if OP1 is neither a register or constant, we can't
do anything. Put OP0 in the hash table if it isn't already. This gives it a
new quantity number. If OP0 is contained in OP1, this changes its hash code
as well. Faster to rehash than to check, except
for the simple case of a constant. Look it up again--in case op0 and op1 are the same.
Put OP1 in the hash table so it gets a new quantity number.
If either side is still missing an equivalence, make it now,
then merge the equivalences.
|
static |
Yet another form of subreg creation. In this case, we want something in MODE, and we should assume OP has MODE iff it is naturally modeless.
|
static |
Referenced by cse_process_notes_1().
|
static |
Given INSN, a jump insn, TAKEN indicates if we are following the
"taken" branch.
In certain cases, this can cause us to add an equivalence. For example,
if we are following the taken case of
if (i == 2)
we can add the fact that `i' and '2' are now equivalent.
In any case, we can record that this comparison was passed. If the same
comparison is seen later, we will know its value. Ensure this is the right kind of insn.
See if this jump condition is known true or false.
Get the type of comparison being done and the operands being compared.
If we had to reverse a non-equality condition, record that fact so we
know that it isn't valid for floating-point. Don't remember if we can't find the inverse.
The mode is the mode of the non-constant.
|
static |
Referenced by equiv_constant().
|
static |
Recompute the hash codes of any valid entries in the hash table that reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG. This is called when we make a jump equivalence.
If X is not a register or if the register is known not to be in any
valid entries in the table, we have no work to do. Scan all hash chains looking for valid entries that mention X.
If we find one and it is in the wrong hash chain, move it.
|
static |
|
static |
Look in or update the hash table.
Remove table element ELT from use in the table. HASH is its hash code, made using the HASH macro. It's an argument because often that is known in advance and we save much time not recomputing it.
Mark this element as removed. See cse_insn.
Remove the table element from its equivalence class.
Remove the table element from its hash bucket.
This entry is not in the proper hash bucket. This can happen
when two classes were merged by `merge_equiv_classes'. Search
for the hash bucket that it heads. This happens only very
rarely, so the cost is acceptable. Remove the table element from its related-value circular chain.
Now add it to the free element chain.
References table_elt::exp, exp_equiv_p(), table_elt::next_same_hash, and table.
|
static |
|
static |
Remove all expressions that refer to register REGNO, since they are already invalid, and we are about to mark that register valid again and don't want the old expressions to reappear as valid.
References get_related_value(), HOST_WIDE_INT, lookup(), offset, and table_elt::related_value.
|
static |
Likewise for a subreg with subreg_reg REGNO, subreg_byte OFFSET, and mode MODE.
|
static |
|
static |
Same as above, but X is a pseudo-register.
Because a pseudo-register can be referenced in more than one
mode, we might have to remove more than one table entry.
|
static |
Replace a dead pseudo in a DEBUG_INSN with replacement DEBUG_EXPR. Callback for simplify_replace_fn_rtx.
References change_cc_mode_args::insn.
|
static |
If we are not running more CSE passes, then we are no longer
expecting CSE to be run. But always rerun it in a cheap mode.
|
static |
Run second CSE pass after loop optimizations.
Run a pass to eliminate duplicated assignments to condition code
registers. We have to run this after bypass_jumps, because it
makes it harder for that pass to determine whether a jump can be
bypassed safely.
|
static |
Run second CSE pass after loop optimizations.
We only want to do local CSE, so don't follow jumps.
If cse altered any jumps, rerun jump opts to clean things up.
Referenced by cse_change_cc_mode_insns().
|
inlinestatic |
|
inlinestatic |
Like canon_hash but with no side effects, i.e. do_not_record and hash_arg_in_memory are not changed.
Return true if set is live.
References cse_cc_succs(), and edge_def::dest.
|
static |
Special handling for (set REG0 REG1) where REG0 is the "cheapest", cheaper than REG1. After cse, REG1 will probably not be used in the sequel, so (if easily done) change this insn to (set REG1 REG0) and replace REG1 with REG0 in the previous insn that computed their value. Then REG1 will become a dead store and won't cloud the situation for later optimizations. Do not make this change if REG1 is a hard register, because it will then be used in the sequel and we may be changing a two-operand insn into a three-operand insn. This is the last transformation that cse_insn will try to do.
Scan for the previous nonnote insn, but stop at a basic
block boundary. Do not swap the registers around if the previous instruction
attaches a REG_EQUIV note to REG1.
??? It's not entirely clear whether we can transfer a REG_EQUIV
from the pseudo that originally shadowed an incoming argument
to another register. Some uses of REG_EQUIV might rely on it
being attached to REG1 rather than REG2.
This section previously turned the REG_EQUIV into a REG_EQUAL
note. We cannot do that because REG_EQUIV may provide an
uninitialized stack slot when REG_PARM_STACK_SPACE is used. If INSN has a REG_EQUAL note, and this note mentions
REG0, then we must delete it, because the value in
REG0 has changed. If the note's value is REG1, we must
also delete it because that is now this insn's dest.
References canonicalize_insn(), copy_rtx(), find_reg_note(), find_sets_in_insn(), invalidate_from_sets_and_clobbers(), rtx_equal_p(), SET, set::src, this_insn, and this_insn_cc0.
|
static |
Try to express the constant SRC_CONST using a register+offset expression derived from a constant anchor. Return it if successful or NULL_RTX, otherwise.
CONST_INT is used for CC modes, but we should leave those alone.
Return the older expression.
|
static |
Given an expression X of type CONST, and ELT which is its table entry (or 0 if it is not in the hash table), return an alternate expression for X as a register plus integer. If none can be found, return 0.
First, is there anything related known?
If we have a table element, we can tell from that.
Otherwise, must look it up. Search all related table entries for one that has an
equivalent register. This loop is strange in that it is executed in two different cases.
The first is when X is already in the table. Then it is searching
the RELATED_VALUE list of X's class (RELT). The second case is when
X is not in the table. Then RELT points to a class for the related
value.
Ensure that, whatever case we are in, that we ignore classes that have
the same value as X. We went all the way around, so there is nothing to be found.
Alternatively, perhaps RELT was in the table for some other reason
and it has no related values recorded. Note: OFFSET may be 0 if P->xexp and X are related by commutativity.
|
static |
Subroutine of canon_reg. Pass *XLOC through canon_reg, and validate the result if necessary. INSN is as for canon_reg.
If replacing pseudo with hard reg or vice versa, ensure the
insn remains valid. Likewise if the insn has MATCH_DUPs.
|
static |
Set to the cost of a constant pool reference if one was found for a symbolic constant. If this was found, it means we should try to convert constants into constant pool entries if they don't fit in the insn.
|
static |
|
static |
True if CSE has altered the CFG.
|
static |
Pointers to the live in/live out bitmaps for the boundaries of the current EBB.
|
static |
|
static |
True if CSE has altered conditional jump insns in such a way that jump optimization should be redone.
|
static |
A table of cse_reg_info indexed by register numbers.
Referenced by preferable().
|
static |
The index of the first entry that has not been initialized.
Referenced by preferable().
|
static |
The size of the above table.
Referenced by preferable().
|
static |
The timestamp at the beginning of the current run of cse_extended_basic_block. We increment this variable at the beginning of the current run of cse_extended_basic_block. The timestamp field of a cse_reg_info entry matches the value of this variable if and only if the entry has been initialized during the current run of cse_extended_basic_block.
|
static |
|
static |
A simple bitmap to track which basic blocks have been visited already as part of an already processed extended basic block.
|
static |
canon_hash stores 1 in do_not_record if it notices a reference to CC0, PC, or some other volatile subexpression.
|
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Chain of `struct table_elt's made so far for this function but currently removed from the table.
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A HARD_REG_SET containing all the hard registers for which there is currently a REG expression in the hash table. Note the difference from the above variables, which indicate if the REG is mentioned in some expression in the table.
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canon_hash stores 1 in hash_arg_in_memory if it notices a reference to memory within the expression being hashed.
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@verbatim
Common subexpression elimination for GNU compiler. Copyright (C) 1987-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
The basic idea of common subexpression elimination is to go
through the code, keeping a record of expressions that would
have the same value at the current scan point, and replacing
expressions encountered with the cheapest equivalent expression.
It is too complicated to keep track of the different possibilities
when control paths merge in this code; so, at each label, we forget all
that is known and start fresh. This can be described as processing each
extended basic block separately. We have a separate pass to perform
global CSE.
Note CSE can turn a conditional or computed jump into a nop or
an unconditional jump. When this occurs we arrange to run the jump
optimizer after CSE to delete the unreachable code.
We use two data structures to record the equivalent expressions:
a hash table for most expressions, and a vector of "quantity
numbers" to record equivalent (pseudo) registers.
The use of the special data structure for registers is desirable
because it is faster. It is possible because registers references
contain a fairly small number, the register number, taken from
a contiguously allocated series, and two register references are
identical if they have the same number. General expressions
do not have any such thing, so the only way to retrieve the
information recorded on an expression other than a register
is to keep it in a hash table.
Registers and "quantity numbers":
At the start of each basic block, all of the (hardware and pseudo)
registers used in the function are given distinct quantity
numbers to indicate their contents. During scan, when the code
copies one register into another, we copy the quantity number.
When a register is loaded in any other way, we allocate a new
quantity number to describe the value generated by this operation.
`REG_QTY (N)' records what quantity register N is currently thought
of as containing.
All real quantity numbers are greater than or equal to zero.
If register N has not been assigned a quantity, `REG_QTY (N)' will
equal -N - 1, which is always negative.
Quantity numbers below zero do not exist and none of the `qty_table'
entries should be referenced with a negative index.
We also maintain a bidirectional chain of registers for each
quantity number. The `qty_table` members `first_reg' and `last_reg',
and `reg_eqv_table' members `next' and `prev' hold these chains.
The first register in a chain is the one whose lifespan is least local.
Among equals, it is the one that was seen first.
We replace any equivalent register with that one.
If two registers have the same quantity number, it must be true that
REG expressions with qty_table `mode' must be in the hash table for both
registers and must be in the same class.
The converse is not true. Since hard registers may be referenced in
any mode, two REG expressions might be equivalent in the hash table
but not have the same quantity number if the quantity number of one
of the registers is not the same mode as those expressions.
Constants and quantity numbers
When a quantity has a known constant value, that value is stored
in the appropriate qty_table `const_rtx'. This is in addition to
putting the constant in the hash table as is usual for non-regs.
Whether a reg or a constant is preferred is determined by the configuration
macro CONST_COSTS and will often depend on the constant value. In any
event, expressions containing constants can be simplified, by fold_rtx.
When a quantity has a known nearly constant value (such as an address
of a stack slot), that value is stored in the appropriate qty_table
`const_rtx'.
Integer constants don't have a machine mode. However, cse
determines the intended machine mode from the destination
of the instruction that moves the constant. The machine mode
is recorded in the hash table along with the actual RTL
constant expression so that different modes are kept separate.
Other expressions:
To record known equivalences among expressions in general
we use a hash table called `table'. It has a fixed number of buckets
that contain chains of `struct table_elt' elements for expressions.
These chains connect the elements whose expressions have the same
hash codes.
Other chains through the same elements connect the elements which
currently have equivalent values.
Register references in an expression are canonicalized before hashing
the expression. This is done using `reg_qty' and qty_table `first_reg'.
The hash code of a register reference is computed using the quantity
number, not the register number.
When the value of an expression changes, it is necessary to remove from the
hash table not just that expression but all expressions whose values
could be different as a result.
1. If the value changing is in memory, except in special cases
ANYTHING referring to memory could be changed. That is because
nobody knows where a pointer does not point.
The function `invalidate_memory' removes what is necessary.
The special cases are when the address is constant or is
a constant plus a fixed register such as the frame pointer
or a static chain pointer. When such addresses are stored in,
we can tell exactly which other such addresses must be invalidated
due to overlap. `invalidate' does this.
All expressions that refer to non-constant
memory addresses are also invalidated. `invalidate_memory' does this.
2. If the value changing is a register, all expressions
containing references to that register, and only those,
must be removed.
Because searching the entire hash table for expressions that contain
a register is very slow, we try to figure out when it isn't necessary.
Precisely, this is necessary only when expressions have been
entered in the hash table using this register, and then the value has
changed, and then another expression wants to be added to refer to
the register's new value. This sequence of circumstances is rare
within any one basic block.
`REG_TICK' and `REG_IN_TABLE', accessors for members of
cse_reg_info, are used to detect this case. REG_TICK (i) is
incremented whenever a value is stored in register i.
REG_IN_TABLE (i) holds -1 if no references to register i have been
entered in the table; otherwise, it contains the value REG_TICK (i)
had when the references were entered. If we want to enter a
reference and REG_IN_TABLE (i) != REG_TICK (i), we must scan and
remove old references. Until we want to enter a new entry, the
mere fact that the two vectors don't match makes the entries be
ignored if anyone tries to match them.
Registers themselves are entered in the hash table as well as in
the equivalent-register chains. However, `REG_TICK' and
`REG_IN_TABLE' do not apply to expressions which are simple
register references. These expressions are removed from the table
immediately when they become invalid, and this can be done even if
we do not immediately search for all the expressions that refer to
the register.
A CLOBBER rtx in an instruction invalidates its operand for further
reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
invalidates everything that resides in memory.
Related expressions:
Constant expressions that differ only by an additive integer
are called related. When a constant expression is put in
the table, the related expression with no constant term
is also entered. These are made to point at each other
so that it is possible to find out if there exists any
register equivalent to an expression related to a given expression. Length of qty_table vector. We know in advance we will not need a quantity number this big.
Referenced by cse_process_notes().
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Next quantity number to be allocated. This is 1 + the largest number needed so far.
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Referenced by find_comparison_args().
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Referenced by find_comparison_args().
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The table of all qtys, indexed by qty number.
Referenced by lookup_as_function().
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True if we put a LABEL_REF into the hash table for an INSN without a REG_LABEL_OPERAND, we have to rerun jump after CSE to put in the note.
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The table of all register equivalence chains.
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Insn being scanned.
Referenced by lookup_as_function(), and try_back_substitute_reg().
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For machines that have a CC0, we do not record its value in the hash table since its use is guaranteed to be the insn immediately following its definition and any other insn is presumed to invalidate it. Instead, we store below the current and last value assigned to CC0. If it should happen to be a constant, it is stored in preference to the actual assigned value. In case it is a constant, we store the mode in which the constant should be interpreted.
Referenced by try_back_substitute_reg().
1.8.1.1