GCC Middle and Back End API Reference
reload.h File Reference

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Data Structures

struct  reload
struct  target_reload
struct  reg_equivs_s
struct  insn_chain


typedef struct reg_equivs_s reg_equivs_t


enum  reload_type {


int register_move_cost (enum machine_mode, reg_class_t, reg_class_t)
int memory_move_cost (enum machine_mode, reg_class_t, bool)
int memory_move_secondary_cost (enum machine_mode, reg_class_t, bool)
struct insn_chainnew_insn_chain (void)
void compute_use_by_pseudos (HARD_REG_SET *, bitmap)
reg_class_t secondary_reload_class (bool, reg_class_t, enum machine_mode, rtx)
enum reg_class scratch_reload_class (enum insn_code)
rtx get_secondary_mem (rtx, enum machine_mode, int, enum reload_type)
void clear_secondary_mem (void)
void transfer_replacements (int, int)
int remove_address_replacements (rtx in_rtx)
int operands_match_p (rtx, rtx)
int safe_from_earlyclobber (rtx, rtx)
int find_reloads (rtx, int, int, int, short *)
rtx form_sum (enum machine_mode, rtx, rtx)
void subst_reloads (rtx)
void copy_replacements (rtx, rtx)
void move_replacements (rtx *x, rtx *y)
rtx find_replacement (rtx *)
int reg_overlap_mentioned_for_reload_p (rtx, rtx)
rtx find_equiv_reg (rtx, rtx, enum reg_class, int, short *, int, enum machine_mode)
int regno_clobbered_p (unsigned int, rtx, enum machine_mode, int)
int earlyclobber_operand_p (rtx)
int push_reload (rtx, rtx, rtx *, rtx *, enum reg_class, enum machine_mode, enum machine_mode, int, int, int, enum reload_type)
void init_reload (void)
bool reload (rtx, int)
void mark_home_live (int)
rtx eliminate_regs (rtx, enum machine_mode, rtx)
bool elimination_target_reg_p (rtx)
void calculate_elim_costs_all_insns (void)
void deallocate_reload_reg (int r)
void init_caller_save (void)
void init_save_areas (void)
void setup_save_areas (void)
void save_call_clobbered_regs (void)
void cleanup_subreg_operands (rtx)
void debug_reload_to_stream (FILE *)
void debug_reload (void)
rtx reload_adjust_reg_for_mode (rtx, enum machine_mode)
void grow_reg_equivs (void)


struct reload rld [MAX_RELOADS]
int n_reloads
struct target_reload default_target_reload
struct target_reloadthis_target_reload
vec< reg_equivs_t, va_gc > * reg_equivs
int n_earlyclobbers
rtx reload_earlyclobbers [MAX_RECOG_OPERANDS]
int reload_n_operands
int reload_first_uid
int num_not_at_initial_offset
struct insn_chainreload_insn_chain

Typedef Documentation

typedef struct reg_equivs_s reg_equivs_t
   Register equivalences.  Indexed by register number.  

Enumeration Type Documentation

   Encode the usage of a reload.  The following codes are supported:

   RELOAD_FOR_INPUT             reload of an input operand
   RELOAD_FOR_OUTPUT            likewise, for output
   RELOAD_FOR_INSN              a reload that must not conflict with anything
                                used in the insn, but may conflict with
                                something used before or after the insn
   RELOAD_FOR_INPUT_ADDRESS     reload for parts of the address of an object
                                that is an input reload
   RELOAD_FOR_OPERAND_ADDRESS   reload for the address of a non-reloaded
                                operand; these don't conflict with
                                any other addresses.
                                reloads; usually secondary reloads
   RELOAD_OTHER                 none of the above, usually multiple uses
   RELOAD_FOR_OTHER_ADDRESS     reload for part of the address of an input
                                that is marked RELOAD_OTHER.

   This used to be "enum reload_when_needed" but some debuggers have trouble
   with an enum tag and variable of the same name.  

Function Documentation

void calculate_elim_costs_all_insns ( void  )
   Called from the register allocator to estimate costs of eliminating
   invariant registers.  
   This function is called from the register allocator to set up estimates
   for the cost of eliminating pseudos which have REG_EQUIV equivalences to
   an invariant.  The structure is similar to calculate_needs_all_insns.  
             If this is a label, a JUMP_INSN, or has REG_NOTES (which might
             include REG_LABEL_OPERAND and REG_LABEL_TARGET), we need to see
             what effects this has on the known offsets at labels.  
                 Skip insns that only set an equivalence.  
                 If needed, eliminate any eliminable registers.  
void cleanup_subreg_operands ( rtx  )
   Replace (subreg (reg)) with the appropriate (reg) for any operands.  
void clear_secondary_mem ( void  )
   Clear any secondary memory locations we've made.  
void compute_use_by_pseudos ( HARD_REG_SET ,
void copy_replacements ( rtx  ,
   Make a copy of any replacements being done into X and move those copies
   to locations in Y, a copy of X.  We only look at the highest level of
   the RTL.  
void deallocate_reload_reg ( int  r)
   Deallocate the reload register used by reload number R.  
void debug_reload ( void  )
void debug_reload_to_stream ( FILE *  )
   Debugging support.  
int earlyclobber_operand_p ( rtx  )
   Return 1 if X is an operand of an insn that is being earlyclobbered.  
rtx eliminate_regs ( rtx  ,
enum  machine_mode,
   Scan X and replace any eliminable registers (such as fp) with a
   replacement (such as sp), plus an offset.  

Referenced by spill_hard_reg().

bool elimination_target_reg_p ( rtx  )
rtx find_equiv_reg ( rtx  goal,
rtx  insn,
enum reg_class  rclass,
int  other,
short *  reload_reg_p,
int  goalreg,
enum machine_mode  mode 
   Check the insns before INSN to see if there is a suitable register
   containing the same value as GOAL.  
   Check the insns before INSN to see if there is a suitable register
   containing the same value as GOAL.
   If OTHER is -1, look for a register in class RCLASS.
   Otherwise, just see if register number OTHER shares GOAL's value.

   Return an rtx for the register found, or zero if none is found.

   If RELOAD_REG_P is (short *)1,
   we reject any hard reg that appears in reload_reg_rtx
   because such a hard reg is also needed coming into this insn.

   If RELOAD_REG_P is any other nonzero value,
   it is a vector indexed by hard reg number
   and we reject any hard reg whose element in the vector is nonnegative
   as well as any that appears in reload_reg_rtx.

   If GOAL is zero, then GOALREG is a register number; we look
   for an equivalent for that register.

   MODE is the machine mode of the value we want an equivalence for.
   If GOAL is nonzero and not VOIDmode, then it must have mode MODE.

   This function is used by jump.c as well as in the reload pass.

   If GOAL is the sum of the stack pointer and a constant, we treat it
   as if it were a constant except that sp is required to be unchanging.  
         An address with side effects must be reexecuted.  
     Scan insns back from INSN, looking for one that copies
     a value into or out of GOAL.
     Stop and give up if we reach a label.  
         Don't reuse register contents from before a setjmp-type
         function call; on the second return (from the longjmp) it
         might have been clobbered by a later reuse.  It doesn't
         seem worthwhile to actually go and see if it is actually
         reused even if that information would be readily available;
         just don't reuse it across the setjmp call.  
             If we don't want spill regs ...  
                 ... then ignore insns introduced by reload; they aren't
                 useful and can cause results in reload_as_needed to be
                 different from what they were when calculating the need for
                 spills.  If we notice an input-reload insn here, we will
                 reject it below, but it might hide a usable equivalent.
                 That makes bad code.  It may even fail: perhaps no reg was
                 spilled for this insn because it was assumed we would find
                 that equivalent.  
             First check for something that sets some reg equal to GOAL.  
                      When looking for stack pointer + const,
                      make sure we don't use a stack adjust.  
                     If we are looking for a constant,
                     and something equivalent to that constant was copied
                     into a reg, we can use that reg.  
     We found a previous insn copying GOAL into a suitable other reg VALUE
     (or copying VALUE into GOAL, if GOAL is also a register).
     Now verify that VALUE is really valid.  
     VALUENO is the register number of VALUE; a hard register.  
     Don't try to re-use something that is killed in this insn.  We want
     to be able to trust REG_UNUSED notes.  
     If we propose to get the value from the stack pointer or if GOAL is
     a MEM based on the stack pointer, we need a stable SP.  
     Reject VALUE if the copy-insn moved the wrong sort of datum.  
     Reject VALUE if it was loaded from GOAL
     and is also a register that appears in the address of GOAL.  
     Reject registers that overlap GOAL.  
     Reject VALUE if it is one of the regs reserved for reloads.
     Reload1 knows how to reuse them anyway, and it would get
     confused if we allocated one without its knowledge.
     (Now that insns introduced by reload are ignored above,
     this case shouldn't happen, but I'm not positive.)  
     Reject VALUE if it is a register being used for an input reload
     even if it is not one of those reserved.  
       We must treat frame pointer as varying here,
       since it can vary--in a nonlocal goto as generated by expand_goto.  
     Now verify that the values of GOAL and VALUE remain unaltered
     until INSN is reached.  
         Don't trust the conversion past a function call
         if either of the two is in a call-clobbered register, or memory.  
             Watch out for unspec_volatile, and volatile asms.  
             If this insn P stores in either GOAL or VALUE, return 0.
             If GOAL is a memory ref and this insn writes memory, return 0.
             If GOAL is a memory ref and its address is not constant,
             and this insn P changes a register used in GOAL, return 0.  
             If this insn auto-increments or auto-decrements
             either regno or valueno, return 0 now.
             If GOAL is a memory ref and its address is not constant,
             and this insn P increments a register used in GOAL, return 0.  
int find_reloads ( rtx  insn,
int  replace,
int  ind_levels,
int  live_known,
short *  reload_reg_p 
   Search the body of INSN for values that need reloading and record them
   with push_reload.  REPLACE nonzero means record also where the values occur
   so that subst_reloads can be used.  
   Main entry point of this file: search the body of INSN
   for values that need reloading and record them with push_reload.
   REPLACE nonzero means record also where the values occur
   so that subst_reloads can be used.

   IND_LEVELS says how many levels of indirection are supported by this
   machine; a value of zero means that a memory reference is not a valid
   memory address.

   LIVE_KNOWN says we have valid information about which hard
   regs are live at each point in the program; this is true when
   we are called from global_alloc but false when stupid register
   allocation has been done.

   RELOAD_REG_P if nonzero is a vector indexed by hard reg number
   which is nonnegative if the reg has been commandeered for reloading into.
   It is copied into STATIC_RELOAD_REG_P and referenced from there
   by various subroutines.

   Return TRUE if some operands need to be changed, because of swapping
   commutative operands, reg_equiv_address substitution, or whatever.  
     These start out as the constraints for the insn
     and they are chewed up as we consider alternatives.  
     These are the preferred classes for an operand, or NO_REGS if it isn't
     a register.  
     Nonzero for a MEM operand whose entire address needs a reload.
     May be -1 to indicate the entire address may or may not need a reload.  
     Nonzero for an address operand that needs to be completely reloaded.
     May be -1 to indicate the entire operand may or may not need a reload.  
     Value of enum reload_type to use for operand.  
     Value of enum reload_type to use within address of operand.  
     Save the usage of each operand.  
     JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
     neither are insns that SET cc0.  Insns that use CC0 are not allowed
     to have any input reloads.  
     The eliminated forms of any secondary memory locations are per-insn, so
     clear them out here.  
     Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
     is cheap to move between them.  If it is not, there may not be an insn
     to do the copy, so we may need a reload.  
     Just return "no reloads" if insn has no operands with constraints.  
     If we will need to know, later, whether some pair of operands
     are the same, we must compare them now and save the result.
     Reloading the base and index registers will clobber them
     and afterward they will fail to match.  
         Scan this operand's constraint to see if it is an output operand,
         an in-out operand, is commutative, or should match another.  
                   The last operand should not be marked commutative.  
                   We currently only support one commutative pair of
                   operands.  Some existing asm code currently uses more
                   than one pair.  Previously, that would usually work,
                   but sometimes it would crash the compiler.  We
                   continue supporting that case as well as we can by
                   silently ignoring all but the first pair.  In the
                   future we may handle it correctly.  
               Use of ISDIGIT is tempting here, but it may get expensive because
               of locale support we don't want.  
                   An operand may not match itself.  
                   If C can be commuted with C+1, and C might need to match I,
                   then C+1 might also need to match I.  
                       Note that C is supposed to be less than I.
                       No need to consider altering both C and I because in
                       that case we would alter one into the other.  
     Examine each operand that is a memory reference or memory address
     and reload parts of the addresses into index registers.
     Also here any references to pseudo regs that didn't get hard regs
     but are equivalent to constants get replaced in the insn itself
     with those constants.  Nobody will ever see them again.

     Finally, set up the preferred classes of each operand.  
           Ignore things like match_operator operands.  
             If we now have a simple operand where we used to have a
             PLUS or MULT, re-recognize and try again.  
             Address operands are reloaded in their existing mode,
             no matter what is specified in the machine description.  
             If the address is a single CONST_INT pick address mode
             instead otherwise we will later not know in which mode
             the reload should be performed.  
             If we made a MEM to load (a part of) the stackslot of a pseudo
             that didn't get a hard register, emit a USE with a REG_EQUAL
             note in front so that we might inherit a previous, possibly
             wider reload.  
           We can get a PLUS as an "operand" as a result of register
           elimination.  See eliminate_regs and gen_reload.  We handle
           a unary operator by reloading the operand.  
             This is equivalent to calling find_reloads_toplev.
             The code is duplicated for speed.
             When we find a pseudo always equivalent to a constant,
             we replace it by the constant.  We must be sure, however,
             that we don't try to replace it in the insn in which it
             is being set.  
                 Record the existing mode so that the check if constants are
                 allowed will work when operand_mode isn't specified.  
               We need not give a valid is_set_dest argument since the case
               of a constant equivalence was checked above.  
         If the operand is still a register (we didn't replace it with an
         equivalent), get the preferred class to reload it into.  
     If this is simply a copy from operand 1 to operand 0, merge the
     preferred classes for the operands.  
     Now see what we need for pseudo-regs that didn't get hard regs
     or got the wrong kind of hard reg.  For this, we must consider
     all the operands together against the register constraints.  
     The constraints are made of several alternatives.
     Each operand's constraint looks like foo,bar,... with commas
     separating the alternatives.  The first alternatives for all
     operands go together, the second alternatives go together, etc.

     First loop over alternatives.  
         If insn is commutative (it's safe to exchange a certain pair
         of operands) then we need to try each alternative twice, the
         second time matching those two operands as if we had
         exchanged them.  To do this, really exchange them in
             Loop over operands for one constraint alternative.  
             LOSERS counts those that don't fit this alternative
             and would require loading.  
             BAD is set to 1 if it some operand can't fit this alternative
             even after reloading.  
             REJECT is a count of how undesirable this alternative says it is
             if any reloading is required.  If the alternative matches exactly
             then REJECT is ignored, but otherwise it gets this much
             counted against it in addition to the reloading needed.  Each
             ? counts three times here since we want the disparaging caused by
             a bad register class to only count 1/3 as much.  
                 Swap the duplicates too.  
                 0 => this operand can be reloaded somehow for this alternative.  
                 0 => this operand can be reloaded if the alternative allows regs.  
                 Nonzero means this is a MEM that must be reloaded into a reg
                 regardless of what the constraint says.  
                 Nonzero if a constant forced into memory would be OK for this
                 If the predicate accepts a unary operator, it means that
                 we need to reload the operand, but do not do this for
                 match_operator and friends.  
                 If the operand is a SUBREG, extract
                 the REG or MEM (or maybe even a constant) within.
                 (Constants can occur as a result of reg_equiv_constant.)  
                     Offset only matters when operand is a REG and
                     it is a hard reg.  This is because it is passed
                     to reg_fits_class_p if it is a REG and all pseudos
                     return 0 from that function.  
                     Force reload if this is a constant or PLUS or if there may
                     be a problem accessing OPERAND in the outer mode.  
                         We must force a reload of paradoxical SUBREGs
                         of a MEM because the alignment of the inner value
                         may not be enough to do the outer reference.  On
                         big-endian machines, it may also reference outside
                         the object.

                         On machines that extend byte operations and we have a
                         SUBREG where both the inner and outer modes are no wider
                         than a word and the inner mode is narrower, is integral,
                         and gets extended when loaded from memory, combine.c has
                         made assumptions about the behavior of the machine in such
                         register access.  If the data is, in fact, in memory we
                         must always load using the size assumed to be in the
                         register and let the insn do the different-sized

                         This is doubly true if WORD_REGISTER_OPERATIONS.  In
                         this case eliminate_regs has left non-paradoxical
                         subregs for push_reload to see.  Make sure it does
                         by forcing the reload.

                         ??? When is it right at this stage to have a subreg
                         of a mem that is _not_ to be handled specially?  IMO
                         those should have been reduced to just a mem.  
                 An empty constraint or empty alternative
                 allows anything which matched the pattern.  
                 Scan this alternative's specs for this operand;
                 set WIN if the operand fits any letter in this alternative.
                 Otherwise, clear BADOP if this operand could
                 fit some letter after reloads,
                 or set WINREG if this operand could fit after reloads
                 provided the constraint allows some registers.  
                       We only support one commutative marker, the first
                       one.  We already set commutative above.  
                       Ignore rest of this alternative as far as
                       reloading is concerned.  
                       We are supposed to match a previous operand.
                       If we do, we win if that one did.
                       If we do not, count both of the operands as losers.
                       (This is too conservative, since most of the time
                       only a single reload insn will be needed to make
                       the two operands win.  As a result, this alternative
                       may be rejected when it is actually desirable.)  
                           If we are matching as if two operands were swapped,
                           also pretend that operands_match had been computed
                           with swapped.
                           But if I is the second of those and C is the first,
                           don't exchange them, because operands_match is valid
                           only on one side of its diagonal.  
                           If we are matching a non-offsettable address where an
                           offsettable address was expected, then we must reject
                           this combination, because we can't reload it.  
                           Operands don't match.  
                           Retroactively mark the operand we had to match
                           as a loser, if it wasn't already.  
                           But count the pair only once in the total badness of
                           this alternative, if the pair can be a dummy reload.
                           The pointers in operand_loc are not swapped; swap
                           them by hand if necessary.  
                       This can be fixed with reloads if the operand
                       we are supposed to match can be fixed with reloads.  
                       If we have to reload this operand and some previous
                       operand also had to match the same thing as this
                       operand, we don't know how to do that.  So reject this
                       All necessary reloads for an address_operand
                       were handled in find_reloads_address.  
                       Memory operand whose address is not offsettable.  
                           Certain mem addresses will become offsettable
                           after they themselves are reloaded.  This is important;
                           we don't want our own handling of unoffsettables
                           to override the handling of reg_equiv_address.  
                       Memory operand whose address is offsettable.  
                            If IND_LEVELS, find_reloads_address won't reload a
                            pseudo that didn't get a hard reg, so we have to
                            reject that case.  
                                A reloaded address is offsettable because it is now
                                just a simple register indirect.  
                               If reg_equiv_address is nonzero, we will be
                               loading it into a register; hence it will be
                               offsettable, but we cannot say that reg_equiv_mem
                               is offsettable without checking.  
                       Output operand that is stored before the need for the
                       input operands (and their index registers) is over.  
                           A PLUS is never a valid operand, but reload can make
                           it from a register when eliminating registers.  
                           A SCRATCH is not a valid operand.  
                       Drop through into 'r' case.  
                               If the address was already reloaded,
                               we win as well.  
                               Likewise if the address will be reloaded because
                               reg_equiv_address is nonzero.  For reg_equiv_mem
                               we have to check.  
                               If we didn't already win, we can reload
                               constants via force_const_mem, and other
                               MEMs by reloading the address like for 'o'.  
                               If we didn't already win, we can reload
                               the address into a base register.  
                 If this operand could be handled with a reg,
                 and some reg is allowed, then this operand can be handled.  
                 Record which operands fit this alternative.  
                     Alternative loses if it has no regs for a reg operand.  
                     If this is a constant that is reloaded into the desired
                     class by copying it to memory first, count that as another
                     reload.  This is consistent with other code and is
                     required to avoid choosing another alternative when
                     the constant is moved into memory by this function on
                     an early reload pass.  Note that the test here is
                     precisely the same as in the code below that calls
                     Alternative loses if it requires a type of reload not
                     permitted for this insn.  We can always reload SCRATCH
                     and objects with a REG_UNUSED note.  
                     If we can't reload this value at all, reject this
                     alternative.  Note that we could also lose due to
                     LIMIT_RELOAD_CLASS, but we don't check that
                     We prefer to reload pseudos over reloading other things,
                     since such reloads may be able to be eliminated later.
                     If we are reloading a SCRATCH, we won't be generating any
                     insns, just using a register, so it is also preferred.
                     So bump REJECT in other cases.  Don't do this in the
                     case where we are forcing a constant into memory and
                     it will then win since we don't want to have a different
                     alternative match then.  
                     Input reloads can be inherited more often than output
                     reloads can be removed, so penalize output reloads.  
                 If this operand is a pseudo register that didn't get
                 a hard reg and this alternative accepts some
                 register, see if the class that we want is a subset
                 of the preferred class for this register.  If not,
                 but it intersects that class, use the preferred class
                 instead.  If it does not intersect the preferred
                 class, show that usage of this alternative should be
                 discouraged; it will be discouraged more still if the
                 register is `preferred or nothing'.  We do this
                 because it increases the chance of reusing our spill
                 register in a later insn and avoiding a pair of
                 memory stores and loads.

                 Don't bother with this if this alternative will
                 accept this operand.

                 Don't do this for a multiword operand, since it is
                 only a small win and has the risk of requiring more
                 spill registers, which could cause a large loss.

                 Don't do this if the preferred class has only one
                 register because we might otherwise exhaust the
                         Since we don't have a way of forming the intersection,
                         we just do something special if the preferred class
                         is a subset of the class we have; that's the most
                         common case anyway.  
             Now see if any output operands that are marked "earlyclobber"
             in this alternative conflict with any input operands
             or any memory addresses.  
                     Is this an input operand or a memory ref?  
                         Ignore things like match_operator operands.  
                         Don't count an input operand that is constrained to match
                         the early clobber operand.  
                         Is it altered by storing the earlyclobber operand?  
                         If the output is in a non-empty few-regs class,
                         it's costly to reload it, so reload the input instead.  
                   If an earlyclobber operand conflicts with something,
                   it must be reloaded, so request this and count the cost.  
             If one alternative accepts all the operands, no reload required,
             choose that alternative; don't consider the remaining ones.  
                 Unswap these so that they are never swapped at `finish'.  
             REJECT, set by the ! and ? constraint characters and when a register
             would be reloaded into a non-preferred class, discourages the use of
             this alternative for a reload goal.  REJECT is incremented by six
             for each ? and two for each non-preferred class.  
             If this alternative can be made to work by reloading,
             and it needs less reloading than the others checked so far,
             record it as the chosen goal for reloading.  
                 If the commutative operands have been swapped, swap
                 them back in order to check the next alternative.  
                 Unswap the duplicates too.  
                 Unswap the operand related information as well.  
     The operands don't meet the constraints.
     goal_alternative describes the alternative
     that we could reach by reloading the fewest operands.
     Reload so as to fit it.  
         No alternative works with reloads??  
         Avoid further trouble with this insn.  
     Jump to `finish' from above if all operands are valid already.
     In that case, goal_alternative_win is all 1.  
     Right now, for any pair of operands I and J that are required to match,
     with I < J,
     goal_alternative_matches[J] is I.
     Set up goal_alternative_matched as the inverse function:
     goal_alternative_matched[I] = J.  
     If the best alternative is with operands 1 and 2 swapped,
     consider them swapped before reporting the reloads.  Update the
     operand numbers of any reloads already pushed.  
         If this is an earlyclobber operand, we need to widen the scope.
         The reload must remain valid from the start of the insn being
         reloaded until after the operand is stored into its destination.
         We approximate this with RELOAD_OTHER even though we know that we
         do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.

         One special case that is worth checking is when we have an
         output that is earlyclobber but isn't used past the insn (typically
         a SCRATCH).  In this case, we only need have the reload live
         through the insn itself, but not for any of our input or output
         But we must not accidentally narrow the scope of an existing
         RELOAD_OTHER reload - leave these alone.

         In any case, anything needed to address this operand can remain
         however they were previously categorized.  
     Any constants that aren't allowed and can't be reloaded
     into registers are here changed into memory references.  
           Reloads of SUBREGs of CONSTANT RTXs are handled later in
           push_reload so we have to let them pass here.  
               If we stripped a SUBREG or a PLUS above add it back.  
               If the alternative accepts constant pool refs directly
               there will be no reload needed at all.  
     Record the values of the earlyclobber operands for the caller.  
     Now record reloads for all the operands that need them.  
           Operands that match previous ones have already been handled.  
           Handle an operand with a nonoffsettable address
           appearing where an offsettable address will do
           by reloading the address into a base register.

           ??? We can also do this when the operand is a register and
           reg_equiv_mem is not offsettable, but this is a bit tricky,
           so we don't bother with it.  It may not be worth doing.  
               If the address to be reloaded is a VOIDmode constant,
               use the default address mode as mode of the reload register,
               as would have been done by find_reloads_address.  
               If this operand is an output, we will have made any
               reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
               now we are treating part of the operand as an input, so
               we must change these to RELOAD_FOR_INPUT_ADDRESS.  
           In a matching pair of operands, one must be input only
           and the other must be output only.
           Pass the input operand as IN and the other as OUT.  
               Avoid further trouble with this insn.  
           For each non-matching operand that's a MEM or a pseudo-register
           that didn't get a hard register, make an optional reload.
           This may get done even if the insn needs no reloads otherwise.  
               If this is only for an output, the optional reload would not
               actually cause us to use a register now, just note that
               something is stored here.  
               An optional output reload might allow to delete INSN later.
               We mustn't make in-out reloads on insns that are not permitted
               output reloads.
               If this is an asm, we can't delete it; we must not even call
               push_reload for an optional output reload in this case,
               because we can't be sure that the constraint allows a register,
               and push_reload verifies the constraints for asms.  
           If a memory reference remains (either as a MEM or a pseudo that
           did not get a hard register), yet we can't make an optional
           reload, check if this is actually a pseudo register reference;
           we then need to emit a USE and/or a CLOBBER so that reload
           inheritance will do the right thing.  
                     We mark the USE with QImode so that we recognize
                     it as one that can be safely deleted at the end
                     of reload.  
           Similarly, make an optional reload for a pair of matching
           objects that are in MEM or a pseudo that didn't get a hard reg.  
     Perform whatever substitutions on the operands we are supposed
     to make due to commutativity or replacement of registers
     with equivalent constants or memory slots.  
         We only do this on the last pass through reload, because it is
         possible for some data (like reg_equiv_address) to be changed during
         later passes.  Moreover, we lose the opportunity to get a useful
         reload_{in,out}_reg when we do these replacements.  
             If we're replacing an operand with a LABEL_REF, we need to
             make sure that there's a REG_LABEL_OPERAND note attached to
             this instruction.  
                 For a JUMP_P, if it was a branch target it must have
                 already been recorded as such.  
     If this insn pattern contains any MATCH_DUP's, make sure that
     they will be substituted if the operands they match are substituted.
     Also do now any substitutions we already did on the operands.

     Don't do this if we aren't making replacements because we might be
     propagating things allocated by frame pointer elimination into places
     it doesn't expect.  
     This loses because reloading of prior insns can invalidate the equivalence
     (or at least find_equiv_reg isn't smart enough to find it any more),
     causing this insn to need more reload regs than it needed before.
     It may be too late to make the reload regs available.
     Now this optimization is done safely in choose_reload_regs.  
     For each reload of a reg into some other class of reg,
     search for an existing equivalent reg (same value now) in the right class.
     We can use it as long as we don't need to change its contents.  
           Prevent generation of insn to load the value
           because the one we found already has the value.  
     If we detected error and replaced asm instruction by USE, forget about the
     Perhaps an output reload can be combined with another
     to reduce needs by one.  
     If we have a pair of reloads for parts of an address, they are reloading
     the same object, the operands themselves were not reloaded, and they
     are for two operands that are supposed to match, merge the reloads and
     change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS.  
     Scan all the reloads and update their type.
     If a reload is for the address of an operand and we didn't reload
     that operand, change the type.  Similarly, change the operand number
     of a reload when two operands match.  If a reload is optional, treat it
     as though the operand isn't reloaded.

     ??? This latter case is somewhat odd because if we do the optional
     reload, it means the object is hanging around.  Thus we need only
     do the address reload if the optional reload was NOT done.

     Change secondary reloads to be the address type of their operand, not
     the normal type.

     If an operand's reload is now RELOAD_OTHER, change any
     RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
             If we have a secondary reload to go along with this reload,
             change its type to RELOAD_FOR_OPADDR_ADDR.  
                 If there's a tertiary reload we have to change it also.  
                 If there's a tertiary reload we have to change it also.  
     Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
     If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
     reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.

     choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
     conflict with RELOAD_FOR_OPERAND_ADDRESS reloads.  This is true for a
     However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
     then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
     RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
     This is complicated by the fact that a single operand can have more
     than one RELOAD_FOR_OPERAND_ADDRESS reload.  It is very difficult to fix
     choose_reload_regs without affecting code quality, and cases that
     actually fail are extremely rare, so it turns out to be better to fix
     the problem here by not generating cases that choose_reload_regs will
     fail for.  
     There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
     RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
     a single operand.
     We can reduce the register pressure by exploiting that a
     RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
     does not conflict with any of them, if it is only used for the first of
     the RELOAD_FOR_X_ADDRESS reloads.  
       We use last_op_addr_reload and the contents of the above arrays
       first as flags - -2 means no instance encountered, -1 means exactly
       one instance encountered.
       If more than one instance has been encountered, we store the reload
       number of the first reload of the kind in question; reload numbers
       are known to be non-negative.  
                   Check if the only TYPE reload that uses reload I is
                   reload FIRST_NUM.  
     See if we have any reloads that are now allowed to be merged
     because we've changed when the reload is needed to
     check for the most common cases.  
     If we made any reloads for addresses, see if they violate a
     "no input reloads" requirement for this insn.  But loads that we
     do after the insn (such as for output addresses) are fine.  
     Compute reload_mode and reload_nregs.  
     Special case a simple move with an input reload and a
     destination of a hard reg, if the hard reg is ok, use it.  

References recog_data_d::operand, operands_match_p(), and recog_data.

Referenced by maybe_fix_stack_asms().

rtx find_replacement ( rtx )
   If LOC was scheduled to be replaced by something, return the replacement.
   Otherwise, return *LOC.  
rtx form_sum ( enum  machine_mode,
rtx  ,
   Compute the sum of X and Y, making canonicalizations assumed in an
   address, namely: sum constant integers, surround the sum of two
   constants with a CONST, put the constant as the second operand, and
   group the constant on the outermost sum.  
rtx get_secondary_mem ( rtx  x,
enum machine_mode  mode,
int  opnum,
enum reload_type  type 
   Return a memory location that will be used to copy X in mode MODE.
   If we haven't already made a location for this mode in this insn,
   call find_reloads_address on the location being returned.  
     By default, if MODE is narrower than a word, widen it to a word.
     This is required because most machines that require these memory
     locations do not support short load and stores from all registers
     (e.g., FP registers).  
     If we already have made a MEM for this operand in MODE, return it.  
     If this is the first time we've tried to get a MEM for this mode,
     allocate a new one.  `something_changed' in reload will get set
     by noticing that the frame size has changed.  
     Get a version of the address doing any eliminations needed.  If that
     didn't give us a new MEM, make a new one if it isn't valid.  
     The only time the call below will do anything is if the stack
     offset is too large.  In that case IND_LEVELS doesn't matter, so we
     can just pass a zero.  Adjust the type to be the address of the
     corresponding object.  If the address was valid, save the eliminated
     address.  If it wasn't valid, we need to make a reload each time, so
     don't save it.  

Referenced by inherit_piecemeal_p().

void grow_reg_equivs ( void  )
   Allocate or grow the reg_equiv tables, initializing new entries to 0.  
   Grow (or allocate) the REG_EQUIVS array from its current size (which may be
   zero elements) to MAX_REG_NUM elements.

   Initialize all new fields to NULL and update REG_EQUIVS_SIZE.  

Referenced by memref_referenced_p().

void init_caller_save ( void  )
   Functions in caller-save.c:  
   Initialize for caller-save.  
   Initialize for caller-save.

   Look at all the hard registers that are used by a call and for which
   reginfo.c has not already excluded from being used across a call.

   Ensure that we can find a mode to save the register and that there is a
   simple insn to save and restore the register.  This latter check avoids
   problems that would occur if we tried to save the MQ register of some
   machines directly into memory.  
     First find all the registers that we need to deal with and all
     the modes that they can have.  If we can't find a mode to use,
     we can't have the register live over calls.  
     The following code tries to approximate the conditions under which
     we can easily save and restore a register without scratch registers or
     other complexities.  It will usually work, except under conditions where
     the validity of an insn operand is dependent on the address offset.
     No such cases are currently known.

     We first find a typical offset from some BASE_REG_CLASS register.
     This address is chosen by finding the first register in the class
     and by finding the smallest power of two that is a valid offset from
     that register in every mode we will use to save registers.  
     If we didn't find a valid address, we must use register indirect.  
     Next we try to form an insn to save and restore the register.  We
     see if such an insn is recognized and meets its constraints.

     To avoid lots of unnecessary RTL allocation, we construct all the RTL
     once, then modify the memory and register operands in-place.  

Referenced by split_live_ranges_for_shrink_wrap().

void init_reload ( void  )
   Functions in reload1.c:  
   Initialize the reload pass once per compilation.  
   Initialize the reload pass.  This is called at the beginning of compilation
   and may be called again if the target is reinitialized.  
     Often (MEM (REG n)) is still valid even if (REG n) is put on the stack.
     Set spill_indirect_levels to the number of levels such addressing is
     permitted, zero if it is not permitted at all.  
     See if indirect addressing is valid for (MEM (SYMBOL_REF ...)).  
     See if reg+reg is a valid (and offsettable) address.  
         This way, we make sure that reg+reg is an offsettable address.  
     Initialize obstack for our rtl allocation.  
void init_save_areas ( void  )
   Initialize save areas by showing that we haven't allocated any yet.  
void mark_home_live ( int  )
   Mark the slots in regs_ever_live for the hard regs
   used by pseudo-reg number REGNO.  
int memory_move_cost ( enum  machine_mode,
reg_class_t  ,
int memory_move_secondary_cost ( enum machine_mode  mode,
reg_class_t  rclass,
bool  in 
   Compute extra cost of moving registers to/from memory due to reloads.
   Only needed if secondary reloads are required for memory moves.  
     We need a memory reference to feed to SECONDARY... macros.  
     mem may be unused even if the SECONDARY_ macros are defined.  
       This isn't simply a copy-to-temporary situation.  Can't guess
       what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
       calling here in that case.

       I'm tempted to put in an assert here, but returning this will
       probably only give poor estimates, which is what we would've
       had before this code anyways.  
     Check if the secondary reload register will also need a
     secondary reload.  

Referenced by default_target_option_pragma_parse().

void move_replacements ( rtx x,
rtx y 
   Change any replacements being done to *X to be done to *Y 
struct insn_chain* new_insn_chain ( void  )
   Allocate a new insn_chain structure.  
   Allocate an empty insn_chain structure.  
int operands_match_p ( rtx  ,
   Like rtx_equal_p except that it allows a REG and a SUBREG to match
   if they are the same hard reg, and has special hacks for
   autoincrement and autodecrement.  
int push_reload ( rtx  in,
rtx  out,
rtx inloc,
rtx outloc,
enum reg_class  rclass,
enum machine_mode  inmode,
enum machine_mode  outmode,
int  strict_low,
int  optional,
int  opnum,
enum reload_type  type 
   Record one reload that needs to be performed.  
   Record one reload that needs to be performed.
   IN is an rtx saying where the data are to be found before this instruction.
   OUT says where they must be stored after the instruction.
   (IN is zero for data not read, and OUT is zero for data not written.)
   INLOC and OUTLOC point to the places in the instructions where
   IN and OUT were found.
   If IN and OUT are both nonzero, it means the same register must be used
   to reload both IN and OUT.

   RCLASS is a register class required for the reloaded data.
   INMODE is the machine mode that the instruction requires
   for the reg that replaces IN and OUTMODE is likewise for OUT.

   If IN is zero, then OUT's location and mode should be passed as

   STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.

   OPTIONAL nonzero means this reload does not need to be performed:
   it can be discarded if that is more convenient.

   OPNUM and TYPE say what the purpose of this reload is.

   The return value is the reload-number for this reload.

   If both IN and OUT are nonzero, in some rare cases we might
   want to make two separate reloads.  (Actually we never do this now.)
   Therefore, the reload-number for OUT is stored in
   output_reloadnum when we return; the return value applies to IN.
   Usually (presently always), when IN and OUT are nonzero,
   the two reload-numbers are equal, but the caller should be careful to
   distinguish them.  
     INMODE and/or OUTMODE could be VOIDmode if no mode
     has been specified for the operand.  In that case,
     use the operand's mode as the mode to reload.  
     If find_reloads and friends until now missed to replace a pseudo
     with a constant of reg_equiv_constant something went wrong
     Note that it can't simply be done here if we missed it earlier
     since the constant might need to be pushed into the literal pool
     and the resulting memref would probably need further
     reg_equiv_constant only contains constants which are obviously
     not appropriate as destination.  So if we would need to replace
     the destination pseudo with a constant we are in real
     If we have a read-write operand with an address side-effect,
     change either IN or OUT so the side-effect happens only once.  
     If we are reloading a (SUBREG constant ...), really reload just the
     inside expression in its own mode.  Similarly for (SUBREG (PLUS ...)).
     If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
     a pseudo and hence will become a MEM) with M1 wider than M2 and the
     register is a pseudo, also reload the inside expression.
     For machines that extend byte loads, do this for any SUBREG of a pseudo
     where both M1 and M2 are a word or smaller, M1 is wider than M2, and
     M2 is an integral mode that gets extended when loaded.
     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
     where either M1 is not valid for R or M2 is wider than a word but we
     only need one register to store an M2-sized quantity in R.
     (However, if OUT is nonzero, we need to reload the reg *and*
     the subreg, so do nothing here, and let following statement handle it.)

     Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
     we can't handle it here because CONST_INT does not indicate a mode.

     Similarly, we must reload the inside expression if we have a
     STRICT_LOW_PART (presumably, in == out in this case).

     Also reload the inner expression if it does not require a secondary
     reload but the SUBREG does.

     Finally, reload the inner expression if it is a register that is in
     the class whose registers cannot be referenced in a different size
     and M1 is not the same size as M2.  If subreg_lowpart_p is false, we
     cannot reload just the inside since we might end up with the wrong
     register class.  But if it is inside a STRICT_LOW_PART, we have
     no choice, so we hope we do get the right register class there.  
                 The case where out is nonzero
                 is handled differently in the following statement.  
           This is supposed to happen only for paradoxical subregs made by
           combine.c.  (SUBREG (MEM)) isn't supposed to occur other ways.  
     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
     where M1 is not valid for R if it was not handled by the code above.

     Similar issue for (SUBREG constant ...) if it was not handled by the
     code above.  This can happen if SUBREG_BYTE != 0.

     However, we must reload the inner reg *as well as* the subreg in
     that case.  
         This relies on the fact that emit_reload_insns outputs the
         instructions for input reloads of type RELOAD_OTHER in the same
         order as the reloads.  Thus if the outer reload is also of type
         RELOAD_OTHER, we are guaranteed that this inner reload will be
         output before the outer reload.  
     Similarly for paradoxical and problematical SUBREGs on the output.
     Note that there is no reason we need worry about the previous value
     of SUBREG_REG (out); even if wider than out, storing in a subreg is
     entitled to clobber it all (except in the case of a word mode subreg
     or of a STRICT_LOW_PART, in that latter case the constraint should
     label it input-output.)  
                 The case of a word mode subreg
                 is handled differently in the following statement.  
     Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
     where either M1 is not valid for R or M2 is wider than a word but we
     only need one register to store an M2-sized quantity in R.

     However, we must reload the inner reg *as well as* the subreg in
     that case and the inner reg is an in-out reload.  
         This relies on the fact that emit_reload_insns outputs the
         instructions for output reloads of type RELOAD_OTHER in reverse
         order of the reloads.  Thus if the outer reload is also of type
         RELOAD_OTHER, we are guaranteed that this inner reload will be
         output after the outer reload.  
     If IN appears in OUT, we can't share any input-only reload for IN.  
     If IN is a SUBREG of a hard register, make a new REG.  This
     simplifies some of the cases below.  
     Similarly for OUT.  
     Narrow down the class of register wanted if that is
     desirable on this machine for efficiency.  
       Output reloads may need analogous treatment, different in detail.  
       Discard what the target said if we cannot do it.  
     Make sure we use a class that can handle the actual pseudo
     inside any subreg.  For example, on the 386, QImode regs
     can appear within SImode subregs.  Although GENERAL_REGS
     can handle SImode, QImode needs a smaller class.  
     Verify that this class is at least possible for the mode that
     is specified.  
             Avoid further trouble with this insn.  
             We used to continue here setting class to ALL_REGS, but it triggers
             sanity check on i386 for:
             void foo(long double d)
               asm("" :: "a" (d));
             Returning zero here ought to be safe as we take care in
             find_reloads to not process the reloads when instruction was
             replaced by USE.  
     Optional output reloads are always OK even if we have no register class,
     since the function of these reloads is only to have spill_reg_store etc.
     set, so that the storing insn can be deleted later.  
         See if we need a secondary reload register to move between CLASS
         and IN or CLASS and OUT.  Get the icode and push any required reloads
         needed for each of them if so.  
         We found no existing reload suitable for re-use.
         So add an additional reload.  
         If a memory location is needed for the copy, make one.  
         We are reusing an existing reload,
         but we may have additional information for it.
         For example, we may now have both IN and OUT
         while the old one may have just one of them.  
         The modes can be different.  If they are, we want to reload in
         the larger mode, so that the value is valid for both modes.  
             If we merge reloads for two distinct rtl expressions that
             are identical in content, there might be duplicate address
             reloads.  Remove the extra set now, so that if we later find
             that we can inherit this reload, we can get rid of the
             address reloads altogether.

             Do not do this if both reloads are optional since the result
             would be an optional reload which could potentially leave
             unresolved address replacements.

             It is not sufficient to call transfer_replacements since
             choose_reload_regs will remove the replacements for address
             reloads of inherited reloads which results in the same
                 We must keep the address reload with the lower operand
                 number alive.  
             When emitting reloads we don't necessarily look at the in-
             and outmode, but also directly at the operands (in and out).
             So we can't simply overwrite them with whatever we have found
             for this (to-be-merged) reload, we have to "merge" that too.
             Reusing another reload already verified that we deal with the
             same operands, just possibly in different modes.  So we
             overwrite the operands only when the new mode is larger.
             See also PR33613.  
     If the ostensible rtx being reloaded differs from the rtx found
     in the location to substitute, this reload is not safe to combine
     because we cannot reliably tell whether it appears in the insn.  
     This was replaced by changes in find_reloads_address_1 and the new
     function inc_for_reload, which go with a new meaning of reload_inc.  
     If this is an IN/OUT reload in an insn that sets the CC,
     it must be for an autoincrement.  It doesn't work to store
     the incremented value after the insn because that would clobber the CC.
     So we must do the increment of the value reloaded from,
     increment it, store it back, then decrement again.  
         If we did not find a nonzero amount-to-increment-by,
         that contradicts the belief that IN is being incremented
         in an address in this insn.  
     If we will replace IN and OUT with the reload-reg,
     record where they are located so that substitution need
     not do a tree walk.  
     If this reload is just being introduced and it has both
     an incoming quantity and an outgoing quantity that are
     supposed to be made to match, see if either one of the two
     can serve as the place to reload into.

     If one of them is acceptable, set rld[i].reg_rtx
     to that one.  
         If the outgoing register already contains the same value
         as the incoming one, we can dispense with loading it.
         The easiest way to tell the caller that is to give a phony
         value for the incoming operand (same as outgoing one).  
     If this is an input reload and the operand contains a register that
     dies in this insn and is used nowhere else, see if it is the right class
     to be used for this reload.  Use it if so.  (This occurs most commonly
     in the case of paradoxical SUBREGs and in-out reloads).  We cannot do
     this if it is also an output reload that mentions the register unless
     the output is a SUBREG that clobbers an entire register.

     Note that the operand might be one of the spill regs, if it is a
     pseudo reg and we are in a block where spilling has not taken place.
     But if there is no spilling in this block, that is OK.
     An explicitly used hard reg cannot be a spill reg.  
               Check that a former pseudo is valid; see find_dummy_reload.  
               If this is also an output reload, IN cannot be used as
               the reload register if it is set in this insn unless IN
               is also OUT.  
               ??? Why is this code so different from the previous?
               Is there any simple coherent way to describe the two together?
               What's going on here.  
               Make sure the operand fits in the reg that dies.  

Referenced by update_auto_inc_notes().

int reg_overlap_mentioned_for_reload_p ( rtx  ,
   Nonzero if modifying X will affect IN.  
int register_move_cost ( enum  machine_mode,
reg_class_t  ,
int regno_clobbered_p ( unsigned int  regno,
rtx  insn,
enum machine_mode  mode,
int  sets 
   Return 1 if register REGNO is the subject of a clobber in insn INSN.  
   Return 1 if register REGNO is the subject of a clobber in insn INSN.
   If SETS is 1, also consider SETs.  If SETS is 2, enable checking
   REG_INC.  REGNO must refer to a hard register.  
     regno must be a hard register.  
bool reload ( rtx  ,
   The reload pass itself.  
rtx reload_adjust_reg_for_mode ( rtx  ,
enum  machine_mode 
   Compute the actual register we should reload to, in case we're
   reloading to/from a register that is wider than a word.  
int remove_address_replacements ( rtx  in_rtx)
   IN_RTX is the value loaded by a reload that we now decided to inherit,
   or a subpart of it.  If we have any replacements registered for IN_RTX,
   cancel the reloads that were supposed to load them.
   Return nonzero if we canceled any reloads.  
int safe_from_earlyclobber ( rtx  ,
   Return 1 if altering OP will not modify the value of CLOBBER.  
void save_call_clobbered_regs ( void  )
   Find the places where hard regs are live across calls and save them.  
     Computed in mark_set_regs, holds all registers set by the current
             If some registers have been saved, see if INSN references
             any of them.  We must restore them before the insn if so.  
                   Restore all registers if this is a JUMP_INSN.  
                 If a saved register is set after the call, this means we no
                 longer should restore it.  This can happen when parts of a
                 multi-word pseudo do not conflict with other pseudos, so
                 IRA may allocate the same hard register for both.  One may
                 be live across the call, while the other is set
                 Use the register life information in CHAIN to compute which
                 regs are live during the call.  
                 Save hard registers always in the widest mode available.  
                 Look through all live pseudos, mark their hard registers
                 and choose proper mode for saving.  
                 Record all registers set in this call insn.  These don't need
                 to be saved.  N.B. the call insn might set a subreg of a
                 multi-hard-reg pseudo; then the pseudo is considered live
                 during the call, but the subreg that is set isn't.  
                 Compute which hard regs must be saved before this call.  
                 Must recompute n_regs_saved.  
             At the end of the basic block, we must restore any registers that
             remain saved.  If the last insn in the block is a JUMP_INSN, put
             the restore before the insn, otherwise, put it after the insn.  
                 When adding hard reg restores after a DEBUG_INSN, move
                 all notes between last real insn and this DEBUG_INSN after
                 the DEBUG_INSN, otherwise we could get code
                 -g/-g0 differences.  

References copy_rtx(), find_reg_note(), hard_regs_saved, insert_one_insn(), insert_save(), insn_chain::live_throughout, mark_set_regs(), n_regs_saved, note_stores(), reg_renumber, and regno_reg_rtx.

enum reg_class scratch_reload_class ( enum  insn_code)
reg_class_t secondary_reload_class ( bool  in_p,
reg_class_t  rclass,
enum machine_mode  mode,
rtx  x 
   Functions from reload.c:  
   If a secondary reload is needed, return its class.  If both an intermediate
   register and a scratch register is needed, we return the class of the
   intermediate register.  
     If there are no secondary reloads at all, we return NO_REGS.
     If an intermediate register is needed, we return its class.  
     No intermediate register is needed, but we have a special reload
     pattern, which we assume for now needs a scratch register.  

Referenced by deallocate_reload_reg().

void setup_save_areas ( void  )
   Allocate save areas for any hard registers that might need saving.  
   Allocate save areas for any hard registers that might need saving.
   We take a conservative approach here and look for call-clobbered hard
   registers that are assigned to pseudos that cross calls.  This may
   overestimate slightly (especially if some of these registers are later
   used as spill registers), but it should not be significant.

   For IRA we use priority coloring to decrease stack slots needed for
   saving hard registers through calls.  We build conflicts for them
   to do coloring.

   Future work:

     In the fallback case we should iterate backwards across all possible
     modes for the save, choosing the largest available one instead of
     falling back to the smallest mode immediately.  (eg TF -> DF -> SF).

     We do not try to use "move multiple" instructions that exist
     on some machines (such as the 68k moveml).  It could be a win to try
     and use them when possible.  The hard part is doing it in a way that is
     machine independent since they might be saving non-consecutive
     registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) 
     Find every CALL_INSN and record which hard regs are live across the
     call into HARD_REG_MAP and HARD_REGS_USED.  
     Create hard reg saved regs.  
         Record all registers set in this call insn.  These don't
         need to be saved.  N.B. the call insn might set a subreg
         of a multi-hard-reg pseudo; then the pseudo is considered
         live during the call, but the subreg that is set
         Sibcalls are considered to set the return value.  
         Look through all live pseudos, mark their hard registers.  
     If requested, figure out which hard regs can share save slots.  
         Find saved hard register conflicts.  
             Record all registers set in this call insn.  These don't
             need to be saved.  N.B. the call insn might set a subreg
             of a multi-hard-reg pseudo; then the pseudo is considered
             live during the call, but the subreg that is set
             Sibcalls are considered to set the return value,
             compare df-scan.c:df_get_call_refs.  
             Look through all live pseudos, mark their hard registers.  
         Sort saved hard regs.  
         Initiate slots available from the previous reload
         Allocate stack slots for the saved hard registers.  
         We are not sharing slots. 

         Run through all the call-used hard-registers and allocate
         space for each in the caller-save area.  Try to allocate space
         in a manner which allows multi-register saves/restores to be done.  
               If no mode exists for this size, try another.  Also break out
               if we have already saved this hard register.  
               See if any register in this group has been saved.  
               We have found an acceptable mode to store in.  Since
               hard register is always saved in the widest mode
               available, the mode may be wider than necessary, it is
               OK to reduce the alignment of spill space.  We will
               verify that it is equal to or greater than required
               when we restore and save the hard register in
               insert_restore and insert_save.  
               Setup single word save area just in case...  
                 This should not depend on WORDS_BIG_ENDIAN.
                 The order of words in regs is the same as in memory.  
     Now loop again and set the alias set of any save areas we made to
     the alias set used to represent frame objects.  
void subst_reloads ( rtx  )
   Substitute into the current INSN the registers into which we have reloaded
   the things that need reloading.  
void transfer_replacements ( int  ,
   Transfer all replacements that used to be in reload FROM to be in
   reload TO.  

Variable Documentation

struct target_reload default_target_reload

Reload pseudo regs into hard regs for insns that require hard regs. Copyright (C) 1987-2013 Free Software Foundation, Inc.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

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You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

   This file contains the reload pass of the compiler, which is
   run after register allocation has been done.  It checks that
   each insn is valid (operands required to be in registers really
   are in registers of the proper class) and fixes up invalid ones
   by copying values temporarily into registers for the insns
   that need them.

   The results of register allocation are described by the vector
   reg_renumber; the insns still contain pseudo regs, but reg_renumber
   can be used to find which hard reg, if any, a pseudo reg is in.

   The technique we always use is to free up a few hard regs that are
   called ``reload regs'', and for each place where a pseudo reg
   must be in a hard reg, copy it temporarily into one of the reload regs.

   Reload regs are allocated locally for every instruction that needs
   reloads.  When there are pseudos which are allocated to a register that
   has been chosen as a reload reg, such pseudos must be ``spilled''.
   This means that they go to other hard regs, or to stack slots if no other
   available hard regs can be found.  Spilling can invalidate more
   insns, requiring additional need for reloads, so we must keep checking
   until the process stabilizes.

   For machines with different classes of registers, we must keep track
   of the register class needed for each reload, and make sure that
   we allocate enough reload registers of each class.

   The file reload.c contains the code that checks one insn for
   validity and reports the reloads that it needs.  This file
   is in charge of scanning the entire rtl code, accumulating the
   reload needs, spilling, assigning reload registers to use for
   fixing up each insn, and generating the new insns to copy values
   into the reload registers.  
int n_earlyclobbers
   All the "earlyclobber" operands of the current insn
   are recorded here.  
int n_reloads
   All reloads of the current insn are recorded here.  See reload.h for

Referenced by find_valid_class_1(), gen_reload_chain_without_interm_reg_p(), and maybe_fix_stack_asms().

int num_not_at_initial_offset
   Record the number of pending eliminations that have an offset not equal
   to their initial offset.  If nonzero, we use a new copy of each
   replacement result in any insns encountered.  
vec<reg_equivs_t, va_gc>* reg_equivs
rtx reload_earlyclobbers[MAX_RECOG_OPERANDS]
int reload_first_uid
   First uid used by insns created by reload in this function.
   Used in find_equiv_reg.  
struct insn_chain* reload_insn_chain
   A chain of insn_chain structures to describe all non-note insns in
   a function.  
   List of insn_chain instructions, one for every insn that reload needs to

Referenced by saved_hard_reg_compare_func().

int reload_n_operands
   Save the number of operands.  
struct target_reload* this_target_reload