GCC Middle and Back End API Reference
target_reload Struct Reference

#include <reload.h>

Public Member Functions

enum machine_mode (x_regno_save_mode[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX/MIN_UNITS_PER_WORD+1])

Data Fields

bool x_indirect_symref_ok
bool x_double_reg_address_ok
bool x_spill_indirect_levels
bool x_caller_save_initialized_p
int x_cached_reg_save_code [FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]
int x_cached_reg_restore_code [FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]

Detailed Description

   Target-dependent globals.  

Member Function Documentation

enum target_reload::machine_mode ( x_regno_save_mode  [FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX/MIN_UNITS_PER_WORD+1])
     Modes for each hard register that we can save.  The smallest mode is wide
     enough to save the entire contents of the register.  When saving the
     register because it is live we first try to save in multi-register modes.
     If that is not possible the save is done one register at a time.  

Field Documentation

int target_reload::x_cached_reg_restore_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]
int target_reload::x_cached_reg_save_code[FIRST_PSEUDO_REGISTER][MAX_MACHINE_MODE]
     We will only make a register eligible for caller-save if it can be
     saved in its widest mode with a simple SET insn as long as the memory
     address is valid.  We record the INSN_CODE is those insns here since
     when we emit them, the addresses might not be valid, so they might not
     be recognized.  
bool target_reload::x_caller_save_initialized_p
     True if caller-save has been reinitialized.  
bool target_reload::x_double_reg_address_ok
     Nonzero if an address (plus (reg frame_pointer) (reg ...)) is valid.  
bool target_reload::x_indirect_symref_ok
     Nonzero if indirect addressing is supported when the innermost MEM is
     of the form (MEM (SYMBOL_REF sym)).  It is assumed that the level to
     which these are valid is the same as spill_indirect_levels, above.  
bool target_reload::x_spill_indirect_levels
     Nonzero if indirect addressing is supported on the machine; this means
     that spilling (REG n) does not require reloading it into a register in
     order to do (MEM (REG n)) or (MEM (PLUS (REG n) (CONST_INT c))).  The
     value indicates the level of indirect addressing supported, e.g., two
     means that (MEM (MEM (REG n))) is also valid if (REG n) does not get
     a hard register.  

The documentation for this struct was generated from the following file: