GCC Middle and Back End API Reference
lra.c File Reference

Data Structures

struct  sloc


typedef struct slocsloc_t


static int get_new_reg_value (void)
static void expand_reg_info (void)
static void invalidate_insn_recog_data (int)
static int get_insn_freq (rtx)
static void invalidate_insn_data_regno_info (lra_insn_recog_data_t, rtx, int)
static void expand_reg_data ()
rtx lra_create_new_reg_with_unique_value (enum machine_mode md_mode, rtx original, enum reg_class rclass, const char *title)
rtx lra_create_new_reg (enum machine_mode md_mode, rtx original, enum reg_class rclass, const char *title)
void lra_set_regno_unique_value ()
void lra_invalidate_insn_data ()
void lra_set_insn_deleted ()
void lra_delete_dead_insn ()
static rtx emit_add3_insn ()
static rtx emit_add2_insn ()
void lra_emit_add ()
void lra_emit_move ()
void lra_update_dups ()
static void init_insn_regs ()
static struct lra_insn_regnew_insn_reg (rtx insn, int regno, enum op_type type, enum machine_mode mode, bool subreg_p, bool early_clobber, struct lra_insn_reg *next)
static void free_insn_reg ()
static void free_insn_regs ()
static void finish_insn_regs ()
static void init_insn_code_data_once ()
static void finish_insn_code_data_once ()
static void init_op_alt_data ()
static struct
get_static_insn_data ()
static void init_insn_recog_data ()
static void check_and_expand_insn_recog_data ()
static void free_insn_recog_data ()
static void finish_insn_recog_data ()
static void setup_operand_alternative ()
static struct lra_insn_regcollect_non_operand_hard_regs (rtx *x, lra_insn_recog_data_t data, struct lra_insn_reg *list, enum op_type type, bool early_clobber)
lra_insn_recog_data_t lra_set_insn_recog_data ()
static lra_insn_recog_data_t get_insn_recog_data_by_uid ()
static void invalidate_insn_recog_data ()
lra_insn_recog_data_t lra_update_insn_recog_data ()
void lra_set_used_insn_alternative ()
void lra_set_used_insn_alternative_by_uid ()
static void initialize_lra_reg_info_element ()
static void init_reg_info ()
static void finish_reg_info ()
void lra_free_copies ()
void lra_create_copy ()
lra_copy_t lra_get_copy ()
static void add_regs_to_insn_regno_info (lra_insn_recog_data_t data, rtx x, int uid, enum op_type type, bool early_clobber)
static int get_insn_freq ()
void lra_invalidate_insn_regno_info ()
static void setup_insn_reg_info ()
void lra_update_insn_regno_info ()
struct lra_insn_reglra_get_insn_regs ()
static void lra_push_insn_1 ()
void lra_push_insn ()
void lra_push_insn_and_update_insn_regno_info ()
void lra_push_insn_by_uid ()
rtx lra_pop_insn ()
unsigned int lra_insn_stack_length ()
static void push_insns ()
void lra_process_new_insns ()
bool lra_former_scratch_p ()
bool lra_former_scratch_operand_p ()
static void remove_scratches ()
static void restore_scratches ()
static void check_rtl ()
static bool has_nonexceptional_receiver ()
static void add_auto_inc_notes ()
static void update_inc_notes ()
static void setup_reg_spill_flag ()
void lra ()
void lra_init_once ()
void lra_init ()
void lra_finish_once ()


HARD_REG_SET lra_no_alloc_regs
int lra_curr_reload_num
static alloc_pool insn_reg_pool
struct target_lra_int default_target_lra_int
struct target_lra_intthis_target_lra_int = &default_target_lra_int
struct lra_static_insn_datainsn_code_data [LAST_INSN_CODE]
static struct lra_operand_data debug_operand_data
static struct lra_static_insn_data debug_insn_static_data
int lra_insn_recog_data_len
static int reg_info_size
struct lra_reglra_reg_info
static int last_reg_value
static alloc_pool copy_pool
static vec< lra_copy_tcopy_vec
static sbitmap lra_constraint_insn_stack_bitmap
vec< rtxlra_constraint_insn_stack
static vec< sloc_tscratches
static bitmap_head scratch_bitmap
static bitmap_head scratch_operand_bitmap
int lra_in_progress
int lra_new_regno_start
int lra_constraint_new_regno_start
bitmap_head lra_inheritance_pseudos
bitmap_head lra_split_regs
bitmap_head lra_optional_reload_pseudos
bitmap_head lra_subreg_reload_pseudos
int lra_constraint_new_insn_uid_start
FILE * lra_dump_file
bool lra_reg_spill_p
bool lra_simple_p

Typedef Documentation

typedef struct sloc* sloc_t

Function Documentation

static void add_auto_inc_notes ( )
   Process recursively X of INSN and add REG_INC notes if necessary.  
     Scan all X sub-expressions.  

Referenced by check_rtl().

static void add_regs_to_insn_regno_info ( lra_insn_recog_data_t  data,
rtx  x,
int  uid,
enum op_type  type,
bool  early_clobber 
   This page contains code dealing with info about registers in
   Process X of insn UID recursively and add info (operand type is
   given by TYPE, flag of that it is early clobber is EARLY_CLOBBER)
   about registers in X to the insn DATA.  
                     The info can not be integrated into the found
         We treat clobber of non-operand hard registers as early
         clobber (the behavior is expected from asm).  
           Some targets place small structures in registers for return
           values of functions, and those registers are wrapped in
           PARALLEL that we may see as the destination of a SET.  Here
           is an example:

           (call_insn 13 12 14 2 (set (parallel:BLK [
                (expr_list:REG_DEP_TRUE (reg:DI 0 ax)
                    (const_int 0 [0]))
                (expr_list:REG_DEP_TRUE (reg:DI 1 dx)
                    (const_int 8 [0x8]))
             (call (mem:QI (symbol_ref:DI (...  
static void check_and_expand_insn_recog_data ( )
   Expand, if necessary, LRA data about insns.  
static void check_rtl ( )
   Function checks RTL for correctness.  If FINAL_P is true, it is
   done at the end of LRA and the check is more rigorous.  
           LRA code is based on assumption that all addresses can be
           correctly decomposed.  LRA can generate reloads for
           decomposable addresses.  The decomposition code checks the
           correctness of the addresses.  So we don't need to check
           the addresses here.  

References add_auto_inc_notes().

static struct lra_insn_reg* collect_non_operand_hard_regs ( rtx x,
lra_insn_recog_data_t  data,
struct lra_insn_reg list,
enum op_type  type,
bool  early_clobber 
   Recursively process X and collect info about registers, which are
   not the insn operands, in X with TYPE (in/out/inout) and flag that
   it is early clobbered in the insn (EARLY_CLOBBER) and add the info
   to LIST.  X is a part of insn given by DATA.  Return the result
         It is an operand loc. Stop here.  
         It is a dup loc. Stop here.  
                   This is a new hard regno or the info can not be
                   integrated into the found structure.  
                        This clobber is to inform popping floating
                        point stack only.  
         We treat clobber of non-operand hard registers as early
         clobber (the behavior is expected from asm).  

References new_insn_reg().

static rtx emit_add2_insn ( )
   Emit insn x = x + y.  Return the insn.  We use gen_add2_insn as the
   last resort.  

References emit_add3_insn(), last, and max_reg_num().

static rtx emit_add3_insn ( )
   Emit insn x = y + z.  Return NULL if we failed to do it.
   Otherwise, return the insn.  We don't use gen_add3_insn as it might
   clobber CC.  

Referenced by emit_add2_insn().

static void expand_reg_data ( )
   Expand all regno related info needed for LRA.  
static void expand_reg_info ( void  )
   Expand common reg info if it is necessary.  
static void finish_insn_code_data_once ( )
   Called once per compiler work to finalize some LRA data related to
static void finish_insn_recog_data ( )
   Finish LRA data about all insns.  

References operand_alternative::anything_ok.

static void finish_insn_regs ( )
   Finish pool for insn reg info.  

References debug_operand_data.

static void finish_reg_info ( )
   Finish common reg info and copies.  
static void free_insn_recog_data ( )
   Finish LRA DATA about insn.  

References lra_static_insn_data::operand_alternative.

static void free_insn_reg ( )
   Free insn reg info IR.  

Referenced by new_insn_reg().

static void free_insn_regs ( )
   Free insn reg info list IR.  

References OP_IN.

static int get_insn_freq ( rtx  )
static int get_insn_freq ( )
   Return execution frequency of INSN.  
static lra_insn_recog_data_t get_insn_recog_data_by_uid ( )
   Return info about insn give by UID.  The info should be already set
static int get_new_reg_value ( )
   Return new register value.  
static struct lra_static_insn_data* get_static_insn_data ( )
   Return static insn data, allocate and setup if necessary.  Although
   dup_num is static data (it depends only on icode), to set it up we
   need to extract insn first.  So recog_data should be valid for
   normal insn (ICODE >= 0) before the call.  
static bool has_nonexceptional_receiver ( )
   Determine if the current function has an exception receiver block
   that reaches the exit block via non-exceptional edges  
     If we're not optimizing, then just err on the safe side.  
     First determine which blocks can reach exit via normal paths.  
     Place the exit block on our worklist.  
     Iterate: find everything reachable from what we've already seen.  
     No exceptional block reached exit unexceptionally.  

References targetm.

static void init_insn_code_data_once ( )
   Called once per compiler work to initialize some LRA data related
   to insns.  
static void init_insn_recog_data ( )
   Initialize LRA data about insns.  
static void init_insn_regs ( )
   Initiate pool for insn reg info.  

References pool_free().

static void init_reg_info ( )
   Initialize common reg info and copies.  
static void initialize_lra_reg_info_element ( )
static void invalidate_insn_data_regno_info ( lra_insn_recog_data_t  data,
rtx  insn,
int  freq 
   Invalidate all reg info of INSN with DATA and execution frequency
   FREQ.  Update common info about the invalidated registers.  

References bitmap_bit_p(), bitmap_set_bit(), lra_update_insn_regno_info(), and sbitmap_resize().

static void invalidate_insn_recog_data ( int  )
static void invalidate_insn_recog_data ( )
   Invalidate all info about insn given by its UID.  
void lra ( )
   Major LRA entry function.  F is a file should be used to dump LRA
   debug info.  
     Make sure that the last insn is a note.  Some subsequent passes
     need it.  
     We can not set up reload_in_progress because it prevents new
     pseudo creation.  
     Function remove_scratches can creates new pseudos for clobbers --
     so set up lra_constraint_new_regno_start before its call to
     permit changing reg classes for pseudos created by this
     A function that has a non-local label that can reach the exit
     block via non-exceptional paths must save all call-saved
     We don't DF from now and avoid its using because it is to
     expensive when a lot of RTL changes are made.  
     It is needed for the 1st coalescing.  
       If we have a stack frame, we must align it now.  The stack size
       may be a part of the offset computation for register
             We should try to assign hard registers to scratches even
             if there were no RTL transformations in
             Constraint transformations may result in that eliminable
             hard regs become uneliminable and pseudos which use them
             should be spilled.  It is better to do it before pseudo

             For example, rs6000 can make
             RS6000_PIC_OFFSET_TABLE_REGNUM uneliminable if we started
             to use a constant pool.  
             Do inheritance only for regular algorithms.  
             We need live ranges for lra_assign -- so build them.  
             If we don't spill non-reload and non-inheritance pseudos,
             there is no sense to run memory-memory move coalescing.
             If inheritance pseudos were spilled, the memory-memory
             moves involving them will be removed by pass undoing
         Don't clear optional reloads bitmap until all constraints are
         satisfied as we need to differ them from regular reloads.  
             We need full live info for spilling pseudos into
             registers instead of memory.  
         Assignment of stack slots changes elimination offsets for
         some eliminations.  So update the offsets here.  
     We've possibly turned single trapping insn into multiple ones.  
     Replacing pseudos with their memory equivalents might have
     created shared rtx.  Subsequent passes would get confused
     by this, so unshare everything here.  
void lra_create_copy ( )
   Create copy of two pseudos REGNO1 and REGNO2.  The copy execution
   frequency is FREQ.  

References lra_insn_reg::early_clobber, lra_insn_recog_data::insn, new_insn_reg(), lra_insn_reg::next, OP_INOUT, lra_insn_reg::regno, lra_insn_recog_data::regs, and lra_insn_reg::subreg_p.

rtx lra_create_new_reg ( enum machine_mode  md_mode,
rtx  original,
enum reg_class  rclass,
const char *  title 
   Analogous to the previous function but also inherits value of

Referenced by push_insns().

rtx lra_create_new_reg_with_unique_value ( enum machine_mode  md_mode,
rtx  original,
enum reg_class  rclass,
const char *  title 
   Create and return a new reg of ORIGINAL mode.  If ORIGINAL is NULL
   or of VOIDmode, use MD_MODE for the new reg.  Initialize its
   register class to RCLASS.  Print message about assigning class
   RCLASS containing new register name TITLE unless it is NULL.  Use
   attributes of ORIGINAL if it is a register.  The created register
   will have unique held value.  

Referenced by change_class().

void lra_delete_dead_insn ( )
   Delete an unneeded INSN and any previous insns who sole purpose is
   loading data that is dead in INSN.  
     If the previous insn sets a register that dies in our insn,
     delete it too.  
void lra_emit_add ( )
   Target checks operands through operand predicates to recognize an
   insn.  We should have a special precaution to generate add insns
   which are frequent results of elimination.

   Emit insns for x = y + z.  X can be used to store intermediate
   values and should be not in Y and Z when we use X to store an
   intermediate value.  Y + Z should form [base] [+ index[ * scale]] [
   + disp] where base and index are registers, disp and scale are
   constants.  Y should contain base if it is present, Z should
   contain disp if any.  index[*scale] can be part of Y or Z.  
             Probably we have no 3 op add.  Last chance is to use 2-op
             add insn.  To succeed, don't move Z to X as an address
             segment always comes in Y.  Otherwise, we might fail when
             adding the address segment to register.  
                 Generate x = index_scale; x = x + base.  
                 Try x = base + disp.  
                     Generate x = disp; x = x + base.  
                 Generate x = x + index.  
                 Try x = index_scale; x = x + disp; x = x + base.  
                     Generate x = disp; x = x + base; x = x + index_scale.  
     Functions emit_... can create pseudos -- so expand the pseudo
void lra_emit_move ( )
   Emit x := y, processing special case when y = u + v or y = u + v *
   scale + w through emit_add (Y can be an address which is base +
   index reg * scale + displacement in general case).  X may be used
   as intermediate result therefore it should be not in Y.  
         Function emit_move can create pseudos -- so expand the pseudo

References lra_static_insn_data::dup_num, and lra_static_insn_data::n_dups.

void lra_finish_once ( void  )
   Called once per compiler to finish LRA data which are initialize
bool lra_former_scratch_operand_p ( )
   Return true if the operand NOP of INSN is a former scratch.  

References constrain_operands(), and extract_insn().

bool lra_former_scratch_p ( )
   Return true if pseudo REGNO is made of SCRATCH.  
void lra_free_copies ( void  )
   Free all copies.  
lra_copy_t lra_get_copy ( )
   Return N-th (0, 1, ...) copy.  If there is no copy, return
struct lra_insn_reg* lra_get_insn_regs ( )
   Return reg info of insn given by it UID.  

References dump_rtl_slim(), and lra_dump_file.

void lra_init ( void  )
   Initialize LRA whenever register-related information is changed.  
void lra_init_once ( void  )
   Called once per compiler to initialize LRA data once.  
unsigned int lra_insn_stack_length ( void  )
   Return the current size of the insn stack.  
void lra_invalidate_insn_data ( )
   Invalidate INSN related info used by LRA.  

References lra_invalidate_insn_data().

void lra_invalidate_insn_regno_info ( )
   Invalidate all reg info of INSN.  Update common info about the
   invalidated registers.  

References lra_push_insn_1().

rtx lra_pop_insn ( void  )
   Take the last-inserted insns off the stack and return it.  

References sloc::insn.

void lra_process_new_insns ( )
   Emit insns BEFORE before INSN and insns AFTER after INSN.  Put the
   insns onto the stack.  Print about emitting the insns with
void lra_push_insn ( )
   Put INSN on the stack.  
static void lra_push_insn_1 ( )
   Put INSN on the stack.  If ALWAYS_UPDATE is true, always update the reg
   info for INSN, otherwise only update it if INSN is not already on the

References sloc::insn, and sloc::nop.

Referenced by lra_invalidate_insn_regno_info().

void lra_push_insn_and_update_insn_regno_info ( )
   Put INSN on the stack and update its reg info.  

References bitmap_bit_p().

void lra_push_insn_by_uid ( )
   Put insn with UID on the stack.  

References bitmap_bit_p().

void lra_set_insn_deleted ( )
   Mark INSN deleted and invalidate the insn related info used by

References prev_real_insn(), reg_mentioned_p(), and SET.

lra_insn_recog_data_t lra_set_insn_recog_data ( )
   Set up and return info about INSN.  Set up the info if it is not set up
           It might be a new simple insn which is not recognized yet.  
           Its is a special insn like USE or CLOBBER.  
             expand_asm_operands makes sure there aren't too many
             Now get the operand values and constraints out of the
             Cache the insn because we don't want to call extract_insn
             from get_attr_enabled as extract_insn modifies
             which_alternative.  The attribute enabled should not depend
             on insn operands, operand modes, operand types, and operand
             constraints.  It should depend on the architecture.  If it
             is not true, we should rewrite this file code to use
             extract_insn instead of less expensive insn_extract.  
         Finding implicit hard register usage.  We believe it will be
         not changed whatever transformations are used.  Call insns
         are such example.  
               It is an argument register.  
     Some output operand can be recognized only from the context not
     from the constraints which are empty in this case.  Call insn may
     contain a hard register in set destination with empty constraint
     and extract_insn treats them as an input.  
         ??? Should we treat 'X' the same way.  It looks to me that
         'X' means anything and empty constraint means we do not

References recog_data_d::constraints, and recog_data.

void lra_set_regno_unique_value ( )
   Set up for REGNO unique hold value.  

References invalidate_insn_recog_data(), and lra_invalidate_insn_regno_info().

void lra_set_used_insn_alternative ( )
   Set up that INSN is using alternative ALT now.  
void lra_set_used_insn_alternative_by_uid ( )
   Set up that insn with UID is using alternative ALT now.  The insn
   info should be already set up.  

References bitmap_clear(), free(), free_alloc_pool(), lra_reg::insn_bitmap, and reg_info_size.

void lra_update_dups ( )
   Update insn operands which are duplication of operands whose
   numbers are in array of NOPS (with end marker -1).  The insn is
   represented by its LRA internal representation ID.  

References lra_reg_info, pool_alloc(), lra_insn_reg::subreg_p, and type().

lra_insn_recog_data_t lra_update_insn_recog_data ( )
   Update all the insn info about INSN.  It is usually called when
   something in the insn was changed.  Return the updated info.  
             Now get the operand values and constraints out of the
           Cache the insn to prevent extract_insn call from

References lra_insn_recog_data::alternative_enabled_p, recog_data_d::insn, lra_static_insn_data::n_alternatives, recog_data, and which_alternative.

void lra_update_insn_regno_info ( )
   Set up insn reg info of INSN.  Update common reg info from reg info
   of INSN.  
static struct lra_insn_reg* new_insn_reg ( rtx  insn,
int  regno,
enum op_type  type,
enum machine_mode  mode,
bool  subreg_p,
bool  early_clobber,
struct lra_insn_reg next 
   Create LRA insn related info about a reference to REGNO in INSN with
   TYPE (in/out/inout), biggest reference mode MODE, flag that it is
   reference through subreg (SUBREG_P), flag that is early clobbered
   in the insn (EARLY_CLOBBER), and reference to the next insn reg
   info (NEXT).  

References free_insn_reg(), and lra_insn_reg::next.

Referenced by collect_non_operand_hard_regs(), and lra_create_copy().

static void push_insns ( )
static void remove_scratches ( )
   Change scratches onto pseudos and save their location.  
             Because we might use DF right after caller-saves sub-pass
             we need to keep DF info up to date.  
static void restore_scratches ( )
   Changes pseudos created by function remove_scratches onto scratches.  
             It should be only case when scratch register with chosen
             constraint 'X' did not get memory or hard register.  
static void setup_insn_reg_info ( )
   Update common reg info from reg info of insn given by its DATA and
   execution frequency FREQ.  

References lra_push_insn().

static void setup_operand_alternative ( )
   Setup info about operands in alternatives of LRA DATA of insn.  
                     These don't say anything we care about.  
                     We currently only support one commutative pair of
                     The last operand should not be marked
static void setup_reg_spill_flag ( )
   Set up value LRA_REG_SPILL_P.  

References lra_create_live_ranges().

static void update_inc_notes ( )
   Remove all REG_DEAD and REG_UNUSED notes and regenerate REG_INC.
   We change pseudos by hard registers without notification of DF and
   that can make the notes obsolete.  DF-infrastructure does not deal
   with REG_INC notes -- so we should regenerate them here.  

Variable Documentation

alloc_pool copy_pool
   Pools for copies.  
vec<lra_copy_t> copy_vec
   Vec referring to pseudo copies.  
struct lra_static_insn_data debug_insn_static_data
Initial value:
   The following data are used as static insn data for all debug
   insns.  If structure lra_static_insn_data is changed, the
   initializer should be changed too.  
struct lra_operand_data debug_operand_data
Initial value:
0, 0, 0, 0
   Debug insns are represented as a special insn with one input
   operand which is RTL expression in var_location.  
   The following data are used as static insn operand data for all
   debug insns.  If structure lra_operand_data is changed, the
   initializer should be changed too.  

Referenced by finish_insn_regs().

struct target_lra_int default_target_lra_int
   This page contains code dealing LRA insn info (or in other words
   LRA internal insn representation).  
struct lra_static_insn_data* insn_code_data[LAST_INSN_CODE]
   Map INSN_CODE -> the static insn data.  This info is valid during
   all translation unit.  
alloc_pool insn_reg_pool
   This page contains code dealing with info about registers in the
   Pools for insn reg info.  
int last_reg_value
   Last register value.  
vec<rtx> lra_constraint_insn_stack
   The stack itself.  
sbitmap lra_constraint_insn_stack_bitmap
   This page contains code dealing with stack of the insns which
   should be processed by the next constraint pass.  
   Bitmap used to put an insn on the stack only in one exemplar.  
int lra_constraint_new_insn_uid_start
   First UID of insns generated before a new spill pass.  
int lra_constraint_new_regno_start
   Start of reload pseudo regnos before the new spill pass.  

Referenced by bb_has_abnormal_call_pred(), spill_for(), and update_lives().

int lra_curr_reload_num
   The number of emitted reload insns so far.  
int lra_in_progress
   Set to 1 while in lra.  

Referenced by address_operand(), and gen_tmp_stack_mem().

bitmap_head lra_inheritance_pseudos
   Inheritance pseudo regnos before the new spill pass.  
   Map INSN_UID -> the insn recog data (NULL if unknown).  
int lra_insn_recog_data_len
   The current length of the following array.  
int lra_new_regno_start
   Start of pseudo regnos before the LRA.  

Referenced by match_reload().

HARD_REG_SET lra_no_alloc_regs

LRA (local register allocator) driver and LRA utilities. Copyright (C) 2010-2013 Free Software Foundation, Inc. Contributed by Vladimir Makarov vmaka.nosp@m.rov@.nosp@m.redha.nosp@m.t.co.nosp@m.m.

This file is part of GCC.

GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.

GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.

You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.

   The Local Register Allocator (LRA) is a replacement of former
   reload pass.  It is focused to simplify code solving the reload
   pass tasks, to make the code maintenance easier, and to implement new
   perspective optimizations.

   The major LRA design solutions are:
     o division small manageable, separated sub-tasks
     o reflection of all transformations and decisions in RTL as more
       as possible
     o insn constraints as a primary source of the info (minimizing
       number of target-depended macros/hooks)

   In brief LRA works by iterative insn process with the final goal is
   to satisfy all insn and address constraints:
     o New reload insns (in brief reloads) and reload pseudos might be
     o Some pseudos might be spilled to assign hard registers to
       new reload pseudos;
     o Changing spilled pseudos to stack memory or their equivalences;
     o Allocation stack memory changes the address displacement and
       new iteration is needed.

   Here is block diagram of LRA passes:

           ---------------     | Undo inheritance for   |     ---------------
          | Memory-memory |    | spilled pseudos,       |    | New (and old) |
          | move coalesce |<---| splits for pseudos got |<-- |   pseudos     |
           ---------------     | the same hard regs,    |    |  assignment   |
  Start           |            | and optional reloads   |     ---------------
    |             |             ------------------------            ^
    V             |              ----------------                   |
 -----------      V             | Update virtual |                  |
|  Remove   |----> ------------>|    register    |                  |
| scratches |     ^             |  displacements |                  |
 -----------      |              ----------------                   |
                  |                      |                          |
                  |                      V         New              |
         ----------------    No    ------------  pseudos   -------------------
        | Spilled pseudo | change |Constraints:| or insns | Inheritance/split |
        |    to memory   |<-------|    RTL     |--------->|  transformations  |
        |  substitution  |        | transfor-  |          |    in EBB scope   |
         ----------------         |  mations   |           -------------------
                |                   ------------
   | Hard regs substitution, |
   |  devirtalization, and   |------> Finish
   | restoring scratches got |
   |         memory          |

   To speed up the process:
     o We process only insns affected by changes on previous
     o We don't use DFA-infrastructure because it results in much slower
       compiler speed than a special IR described below does;
     o We use a special insn representation for quick access to insn
       info which is always *synchronized* with the current RTL;
       o Insn IR is minimized by memory.  It is divided on three parts:
         o one specific for each insn in RTL (only operand locations);
         o one common for all insns in RTL with the same insn code
           (different operand attributes from machine descriptions);
         o one oriented for maintenance of live info (list of pseudos).
       o Pseudo data:
         o all insns where the pseudo is referenced;
         o live info (conflicting hard regs, live ranges, # of
           references etc);
         o data used for assigning (preferred hard regs, costs etc).

   This file contains LRA driver, LRA utility functions and data, and
   code for dealing with scratches.  
   Hard registers currently not available for allocation.  It can
   changed after some hard  registers become not eliminable.  

Referenced by lra_intersected_live_ranges_p(), process_alt_operands(), and substitute_pseudo().

bitmap_head lra_optional_reload_pseudos
   Reload pseudo regnos before the new assignmnet pass which still can
   be spilled after the assinment pass as memory is also accepted in
   insns for the reload pseudos.  
bool lra_reg_spill_p
   True if we should try spill into registers of different classes
   instead of memory.  

Referenced by remove_pseudos().

bool lra_simple_p
   True if the current function is too big to use regular algorithms
   in LRA. In other words, we should use simpler and faster algorithms
   in LRA.  It also means we should not worry about generation code
   for caller saves.  The value is set up in IRA.  

Referenced by split_live_ranges_for_shrink_wrap().

bitmap_head lra_split_regs
   Split regnos before the new spill pass.  
bitmap_head lra_subreg_reload_pseudos
   Pseudo regnos used for subreg reloads before the new assignment
   pass.  Such pseudos still can be spilled after the assinment

Referenced by insert_move_for_subreg().

int reg_info_size
   This page contains code dealing with common register info and
   pseudo copies.  
   The size of the following array.  

Referenced by lra_set_used_insn_alternative_by_uid().

bitmap_head scratch_bitmap
   Bitmap of scratch regnos.  
bitmap_head scratch_operand_bitmap
   Bitmap of scratch operands.  
vec<sloc_t> scratches
   Locations of the former scratches.  
struct target_lra_int* this_target_lra_int = &default_target_lra_int