#include "config.h"#include "system.h"#include "coretypes.h"#include "tm.h"#include "rtl.h"#include "regs.h"#include "function.h"#include "flags.h"#include "insn-config.h"#include "recog.h"#include "except.h"#include "hard-reg-set.h"#include "basic-block.h"#include "expr.h"#include "output.h"#include "optabs.h"#include "diagnostic-core.h"#include "tm_p.h"#include "cfgloop.h"#include "target.h"#include "tree-pass.h"#include "df.h"#include "vec.h"#include "pointer-set.h"#include "dbgcnt.h"
Data Structures | |
| struct | noce_if_info |
Macros | |
| #define | HAVE_conditional_move 0 |
| #define | HAVE_incscc 0 |
| #define | HAVE_decscc 0 |
| #define | HAVE_trap 0 |
| #define | MAX_CONDITIONAL_EXECUTE |
| #define | IFCVT_MULTIPLE_DUMPS 1 |
| #define | NULL_BLOCK ((basic_block) NULL) |
Variables | |
| static bool | ifcvt_after_combine |
| static int | num_possible_if_blocks |
| static int | num_updated_if_blocks |
| static int | num_true_changes |
| static int | cond_exec_changed_p |
Macro Definition Documentation
| #define HAVE_conditional_move 0 |
If-conversion support. Copyright (C) 2000-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
| #define HAVE_decscc 0 |
| #define HAVE_incscc 0 |
| #define HAVE_trap 0 |
| #define IFCVT_MULTIPLE_DUMPS 1 |
| #define MAX_CONDITIONAL_EXECUTE |
| #define NULL_BLOCK ((basic_block) NULL) |
Referenced by cond_move_convert_if_block(), and find_active_insn_after().
Function Documentation
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Referenced by cond_exec_find_if_block().
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Subroutine of find_cond_trap: if BB contains only a trap insn, return it.
We're not the exit block.
The block must have no successors.
The only instruction in the THEN block must be the trap.
References edge_def::probability, and REG_BR_PROB_BASE.
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Return true if a block has two edges, one of which falls through to the next block, and the other jumps to a specific block, so that we can tell if the block is part of an && test or an || test. Returns either -1 or the number of non-note, non-jump, non-USE/CLOBBER insns in the block.
If no edges, obviously it doesn't jump or fallthru.
Anything complex isn't what we want.
Don't allow calls in the block, since this is used to group && and || together for conditional execution support. ??? we should support conditional execution support across calls for IA-64 some day, but for now it makes the code simpler.
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Determine whether the total insn_rtx_cost on non-jump insns in basic block BB is less than MAX_COST. This function returns false if the cost of any instruction could not be estimated.
The cost of the non-jump insns in BB is scaled by REG_BR_PROB_BASE as those insns are being speculated. MAX_COST is scaled with SCALE plus a small fudge factor.
Set scale to REG_BR_PROB_BASE to void the identical scaling applied to insn_rtx_cost when optimizing for size. Only do this after combine because if-conversion might interfere with passes before combine. Use optimize_function_for_speed_p instead of the pre-defined variable speed to make sure it is set to same value for all basic blocks in one if-conversion transformation.
Our branch probability/scaling factors are just estimates and don't account for cases where we can get speculation for free and other secondary benefits. So we fudge the scale factor to make speculating appear a little more profitable when optimizing for performance.
If this instruction is the load or set of a "stack" register,
such as a floating point register on x87, then the cost of
speculatively executing this insn may need to include
the additional cost of popping its result off of the
register stack. Unfortunately, correctly recognizing and
accounting for this additional overhead is tricky, so for
now we simply prohibit such speculative execution.
References BB_END, CALL_P, insn_rtx_cost(), NEXT_INSN, NONJUMP_INSN_P, PATTERN, REG_BR_PROB_BASE, SET_DEST, and single_set.
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Check whether a block is suitable for conditional move conversion. Every insn must be a simple set of a register to a constant or a register. For each assignment, store the value in the pointer map VALS, keyed indexed by register pointer, then store the register pointer in REGS. COND is the condition we will test.
We can only handle simple jumps at the end of the basic block. It is almost impossible to update the CFG otherwise.
Don't try to handle this if the source register was
modified earlier in the block. Don't try to handle this if the destination register was
modified earlier in the block. Don't try to handle this if the condition uses the
destination register. Don't try to handle this if the source register is modified
later in the block.
References CONSTANT_P, gcc_checking_assert, pointer_map_contains(), and rtx_equal_p().
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Determine if a given basic block heads a simple IF-THEN or IF-THEN-ELSE block. If so, we'll try to convert the insns to not require the branch. Return TRUE if we were successful at converting the block.
We only ever should get here after reload, and if we have conditional execution.
Discover if any fall through predecessors of the current test basic block were && tests (which jump to the else block) or || tests (which jump to the then block).
Determine if the preceding block is an && or || block.
Found at least one && or || block, look for more.
The THEN block of an IF-THEN combo must have exactly one predecessor, other than any || blocks which jump to the THEN block.
The edges of the THEN and ELSE blocks cannot have complex edges.
The THEN block of an IF-THEN combo must have zero or one successors.
If the THEN block has no successors, conditional execution can still make a conditional call. Don't do this unless the ELSE block has only one incoming edge – the CFG manipulation is too ugly otherwise. Check for the last insn of the THEN block being an indirect jump, which is listed as not having any successors, but confuses the rest of the CE code processing. ??? we should fix this in the future.
If the THEN block's successor is the other edge out of the TEST block, then we have an IF-THEN combo without an ELSE.
If the THEN and ELSE block meet in a subsequent block, and the ELSE has exactly one predecessor and one successor, and the outgoing edge is not complex, then we have an IF-THEN-ELSE combo.
Otherwise it is not an IF-THEN or IF-THEN-ELSE combination.
Make sure IF, THEN, and ELSE, blocks are adjacent. Actually, we get the first condition for free, since we've already asserted that there's a fallthru edge from IF to THEN. Likewise for the && and || blocks, since we checked the FALLTHRU flag, those are already adjacent to the last IF block.
??? As an enhancement, move the ELSE block. Have to deal with BLOCK notes, if by no other means than backing out the merge if they exist. Sticky enough I don't want to think about it now.
Do the real work.
If we have && and || tests, try to first handle combining the && and || tests into the conditional code, and if that fails, go back and handle it without the && and ||, which at present handles the && case if there was no ELSE block.
References BB_END, block_has_only_trap(), can_merge_blocks_p(), noce_if_info::cond, noce_if_info::cond_earliest, copy_rtx(), current_ir_type(), delete_basic_block(), delete_insn(), edge_def::dest, df_set_bb_dirty(), dump_file, EDGE_COUNT, noce_if_info::else_bb, emit_barrier_after(), emit_insn_before_setloc(), emit_jump_insn_after(), FALSE, edge_def::flags, gen_cond_trap(), GET_CODE, GET_MODE, basic_block_def::index, INSN_LOCATION, IR_RTL_CFGLAYOUT, noce_if_info::jump, JUMP_LABEL, LABEL_NUSES, merge_blocks(), noce_get_condition(), NULL, num_true_changes, num_updated_if_blocks, onlyjump_p(), PATTERN, basic_block_def::preds, remove_edge(), reversed_comparison_code(), single_succ_edge(), noce_if_info::then_bb, TRAP_CODE, TRUE, and XEXP.
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Return the condition for a jump. Do not do any special processing.
If this branches to JUMP_LABEL when the condition is false, reverse the condition.
References ce_if_block::and_and_p, ce_if_block::else_bb, FALSE, ce_if_block::last_test_bb, NULL_RTX, ce_if_block::num_multiple_test_blocks, ce_if_block::test_bb, and ce_if_block::then_bb.
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Given a simple IF-THEN or IF-THEN-ELSE block, attempt to convert it to conditional execution. Return TRUE if we were successful at converting the block.
If test is comprised of && or || elements, and we've failed at handling all of them together, just use the last test if it is the special case of && elements without an ELSE block.
Find the conditional jump to the ELSE or JOIN part, and isolate the test.
If the conditional jump is more than just a conditional jump, then we can not do conditional execution conversion on this block.
Collect the bounds of where we're to search, skipping any labels, jumps and notes at the beginning and end of the block. Then count the total number of insns and see if it is small enough to convert.
Look for matching sequences at the head and tail of the two blocks,
and limit the range of insns to be converted if possible. We won't pass the insns in the head sequence to
cond_exec_process_insns, so we need to test them here
to make sure that they don't clobber the condition. Map test_expr/test_jump into the appropriate MD tests to use on the conditionally executed code.
If we have && or || tests, do them here. These tests are in the adjacent blocks after the first block containing the test.
If the conditional jump is more than just a conditional jump, then
we can not do conditional execution conversion on this block. Find the conditional jump and isolate the test.
If the machine description needs to modify the tests, such as
setting a conditional execution register from a comparison, it can
do so here. For IF-THEN-ELSE blocks, we don't allow modifications of the test on then THEN block.
Go through the THEN and ELSE blocks converting the insns if possible to conditional execution.
If we cannot apply the changes, fail. Do not go through the normal fail processing, since apply_change_group will call cancel_changes.
Conversion succeeded.
Merge the blocks! If we had matching sequences, make sure to delete one copy at the appropriate location first: delete the copy in the THEN branch for a tail sequence so that the remaining one is executed last for both branches, and delete the copy in the ELSE branch for a head sequence so that the remaining one is executed first for both branches.
- Parameters:
-
do_multiple_p if block information
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Go through a bunch of insns, converting them to conditional execution format if possible. Return TRUE if all of the non-note insns were processed.
dwarf2out can't cope with conditional prologues.
Remove USE insns that get in the way.
??? Ug. Actually unlinking the thing is problematic,
given what we'd have to coordinate with our callers. Last insn wasn't last?
Now build the conditional form of the instruction.
If this is already a COND_EXEC, rewrite the test to be an AND of the
two conditions. If the machine needs to modify the insn being conditionally executed,
say for example to force a constant integer operand into a temp
register, do so here. - Parameters:
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start if block information end first insn to look at test last insn to look at prob_val conditional execution test mod_ok probability of branch taken.
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Given a basic block BB suitable for conditional move conversion, a condition COND, and pointer maps THEN_VALS and ELSE_VALS containing the register values depending on COND, emit the insns in the block as conditional moves. If ELSE_BLOCK is true, THEN_BB was already processed. The caller has started a sequence for the conversion. Return true if successful, false if something goes wrong.
??? Maybe emit conditional debug insn?
If this register was set in the then block, we already
handled this case there.
References edge_def::dest, EDGE_COMPLEX, FALSE, gcc_assert, NULL_BLOCK, reload_completed, single_pred_p(), single_succ(), single_succ_edge(), and single_succ_p().
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Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert it using only conditional moves. Return TRUE if we were successful at converting the block.
Build a mapping for each block to the value used for each register.
Make sure the blocks are suitable.
Make sure the blocks can be used together. If the same register is set in both blocks, and is not set to a constant in both cases, then both blocks must set it to the same register. We have already verified that if it is set to a register, that the source register does not change after the assignment. Also count the number of registers set in only one of the blocks.
Finish off c for MAX_CONDITIONAL_EXECUTE.
Make sure it is reasonable to convert this block. What matters is the number of assignments currently made in only one of the branches, since if we convert we are going to always execute them.
Try to emit the conditional moves. First do the then block, then do anything left in the else blocks.
References dump_file, and basic_block_def::index.
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Forward references.
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Count the number of non-jump active insns in BB.
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Used by the code above to perform the actual rtl transformations. Return TRUE if successful.
TEST_BB is the block containing the conditional branch. MERGE_BB is the block containing the code to manipulate. DEST_EDGE is an edge representing a jump to the join block; after the conversion, TEST_BB should be branching to its destination. REVERSEP is true if the sense of the branch should be reversed.
Number of pending changes.
Find the extent of the real code in the merge block.
If merge_bb ends with a tablejump, predicating/moving insn's into test_bb and then deleting merge_bb will result in the jumptable that follows merge_bb being removed along with merge_bb and then we get an unresolved reference to the jumptable.
Disable handling dead code by conditional execution if the machine needs to do anything funny with the tests, etc.
In the conditional execution case, we have things easy. We know
the condition is reversible. We don't have to check life info
because we're going to conditionally execute the code anyway.
All that's left is making sure the insns involved can actually
be predicated. If we allocated new pseudos (e.g. in the conditional move expander called from noce_emit_cmove), we must resize the array first.
Try the NCE path if the CE path did not result in any changes.
In the non-conditional execution case, we have to verify that there
are no trapping operations, no calls, no references to memory, and
that any registers modified are dead at the branch site. Find the extent of the conditional.
Collect the set of registers set in MERGE_BB.
We don't want to use normal invert_jump or redirect_jump because we don't want to delete_insn called. Also, we want to do our own change group management.
Move the insns out of MERGE_BB to before the branch.
PR 21767: when moving insns above a conditional branch, the REG_EQUAL
notes being moved might become invalid. PR46315: when moving insns above a conditional branch, the REG_EQUAL
notes referring to the registers being set might become invalid. Remove the jump and edge if we can.
??? Can't merge blocks here, as then_bb is still in use.
At minimum, the merge will get done just before bb-reorder.
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Return sequence of instructions generated by if conversion. This function calls end_sequence() to end the current stream, ensures that are instructions are unshared, recognizable non-jump insns. On failure, this function returns a NULL_RTX.
Make sure that all of the instructions emitted are recognizable, and that we haven't introduced a new jump instruction. As an exercise for the reader, build a general mechanism that allows proper placement of required clobbers.
References noce_if_info::a, noce_if_info::b, noce_if_info::cond, const0_rtx, CONST_INT_P, FALSE, INTVAL, noce_if_info::jump, noce_emit_move_insn(), noce_emit_store_flag(), reversed_comparison_code(), start_sequence(), STORE_FLAG_VALUE, and noce_if_info::x.
Referenced by noce_try_addcc().
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Return the active insn after INSN inside basic block CURR_BB.
No other active insn all the way to the end of the basic block.
References edge_def::dest, find_fallthru_edge(), NULL_BLOCK, and basic_block_def::succs.
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Return the active insn before INSN inside basic block CURR_BB.
No other active insn all the way to the start of the basic block.
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Convert a branch over a trap, or a branch to a trap, into a conditional trap.
Locate the block with the trap instruction.
??? While we look for no successors, we really ought to allow EH successors. Need to fix merge_if_block for that to work.
If this is not a standard conditional jump, we can't parse it.
If the conditional jump is more than just a conditional jump, then we can not do if-conversion on this block.
We must be comparing objects whose modes imply the size.
Reverse the comparison code, if necessary.
Attempt to generate the conditional trap.
Emit the new insns before cond_earliest.
Delete the trap block if possible.
Wire together the blocks again.
References BB_END, gcc_assert, JUMP_LABEL, JUMP_P, and edge_def::src.
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Look for IF-THEN-ELSE cases in which one of THEN or ELSE is transformable, but not necessarily the other. There need be no JOIN block.
Return TRUE if we were successful at converting the block.
Cases we'd like to look at:
(1) if (test) goto over; // x not live x = a; goto label; over:
becomes
x = a; if (! test) goto label;
(2) if (test) goto E; // x not live x = big(); goto L; E: x = b; goto M;
becomes
x = b; if (test) goto M; x = big(); goto L;
(3) // This one's really only interesting for targets that can do multiway branching, e.g. IA-64 BBB bundles. For other targets it results in multiple branches on a cache line, which often does not sit well with predictors.
if (test1) goto E; // predicted not taken
x = a;
if (test2) goto F;
...
E:
x = b;
J:
becomes
x = a; if (test1) goto E; if (test2) goto F;
Notes:
(A) Don't do (2) if the branch is predicted against the block we're eliminating. Do it anyway if we can eliminate a branch; this requires that the sole successor of the eliminated block postdominate the other side of the if.
(B) With CE, on (3) we can steal from both sides of the if, creating
if (test1) x = a; if (!test1) x = b; if (test1) goto J; if (test2) goto F; ... J:
Again, this is most useful if J postdominates.
(C) CE substitutes for helpful life information.
(D) These heuristics need a lot of work. Tests for case 1 above.
If we are partitioning hot/cold basic blocks, we don't want to mess up unconditional or indirect jumps that cross between hot and cold sections. Basic block partitioning may result in some jumps that appear to be optimizable (or blocks that appear to be mergeable), but which really must be left untouched (they are required to make it safely across partition boundaries). See the comments at the top of bb-reorder.c:partition_hot_cold_basic_blocks for complete details.
THEN has one successor.
THEN does not fall through, but is not strange either.
THEN has one predecessor.
THEN must do something.
We're speculating from the THEN path, we want to make sure the cost of speculation is within reason.
Registers set are dead, or are predicable.
Conversion went ok, including moving the insns and fixing up the jump. Adjust the CFG to match.
We can avoid creating a new basic block if then_bb is immediately followed by else_bb, i.e. deleting then_bb allows test_bb to fall through to else_bb.
Make rest of code believe that the newly created block is the THEN_BB block we removed.
This should have been done above via force_nonfallthru_and_redirect
(possibly called from redirect_edge_and_branch_force).
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Test for case 2 above.
We do not want to speculate (empty) loop latches.
If we are partitioning hot/cold basic blocks, we don't want to mess up unconditional or indirect jumps that cross between hot and cold sections. Basic block partitioning may result in some jumps that appear to be optimizable (or blocks that appear to be mergeable), but which really must be left untouched (they are required to make it safely across partition boundaries). See the comments at the top of bb-reorder.c:partition_hot_cold_basic_blocks for complete details.
ELSE has one successor.
ELSE outgoing edge is not complex.
ELSE has one predecessor.
THEN is not EXIT.
ELSE is predicted or SUCC(ELSE) postdominates THEN.
We're speculating from the ELSE path, we want to make sure the cost of speculation is within reason.
Registers set are dead, or are predicable.
Conversion went ok, including moving the insns and fixing up the jump. Adjust the CFG to match.
??? We may now fallthru from one of THEN's successors into a join block. Rerun cleanup_cfg? Examine things manually? Wait?
References bitmap_bit_p, DF_INSN_UID_DEFS, DF_REF_REGNO, df_simulate_uses(), and INSN_UID.
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Find a block ending in a simple IF condition and try to transform it in some way. When converting a multi-block condition, put the new code in the first such block and delete the rest. Return a pointer to this first block if some transformation was done. Return NULL otherwise.
The kind of block we're looking for has exactly two successors.
Neither edge should be abnormal.
Nor exit the loop.
The THEN edge is canonically the one that falls through.
Otherwise this must be a multiway branch of some sort.
Set this so we continue looking.
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Return the first non-jump active insn in the basic block.
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Main entry point for all if-conversion. AFTER_COMBINE is true if we are after combine pass.
Record whether we are after combine pass.
Compute postdominators.
Go through each of the basic blocks looking for things to convert. If we
have conditional execution, we make multiple passes to allow us to handle
IF-THEN{-ELSE} blocks within other IF-THEN{-ELSE} blocks. Only need to do dce on the first pass.
If we allocated new pseudos, we must resize the array for sched1.
Write the final stats.
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Return the last non-jump active (non-jump) insn in the basic block.
| rtl_opt_pass* make_pass_if_after_combine | ( | ) |
| rtl_opt_pass* make_pass_if_after_reload | ( | ) |
| rtl_opt_pass* make_pass_rtl_ifcvt | ( | ) |
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Merge the blocks and mark for local life update.
All block merging is done into the lower block numbers.
Merge any basic blocks to handle && and || subtests. Each of the blocks are on the fallthru path from the predecessor block.
Merge TEST block into THEN block. Normally the THEN block won't have a label, but it might if there were || tests. That label's count should be zero, and it normally should be removed.
The ELSE block, if it existed, had a label. That label count will almost always be zero, but odd things can happen when labels get their addresses taken.
If there was no join block reported, that means it was not adjacent to the others, and so we cannot merge them.
The outgoing edge for the current COMBO block should already
be correct. Verify this. There should still be something at the end of the THEN or ELSE
blocks taking us to our final destination. The JOIN block may have had quite a number of other predecessors too. Since we've already merged the TEST, THEN and ELSE blocks, we should have only one remaining edge from our if-then-else diamond. If there is more than one remaining edge, it must come from elsewhere. There may be zero incoming edges if the THEN block didn't actually join back up (as with a call to a non-return function).
We can merge the JOIN cleanly and update the dataflow try
again on this pass. We cannot merge the JOIN.
The outgoing edge for the current COMBO block should already
be correct. Verify this. Remove the jump and cruft from the end of the COMBO block.
References edge_def::dest, edge_def::flags, and TRUE.
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Return whether we can use store speculation for MEM. TOP_BB is the basic block above the conditional block where we are considering doing the speculative store. We look for whether MEM is set unconditionally later in the function.
If we see something that might be a memory barrier, we have to stop looking. Even if the MEM is set later in the function, we still don't want to set it unconditionally before the barrier.
References BB_END, FALSE, find_reg_note(), NULL_RTX, PREV_INSN, remove_note(), reorder_insns(), and side_effects_p().
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Helper function for noce_try_cmove and noce_try_cmove_arith.
If earliest == jump, try to build the cmove insn directly. This is helpful when combine has created some complex condition (like for alpha's cmovlbs) that we can't hope to regenerate through the normal interface.
Don't even try if the comparison operands are weird.
We'll never get here, as noce_process_if_block doesn't call the functions involved. Ifdef code, however, should be discouraged because it leads to typos in the code not selected. However, emit_conditional_move won't exist either.
Referenced by end_ifcvt_sequence(), and noce_try_addcc().
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Emit instruction to move an rtx, possibly into STRICT_LOW_PART. X is the destination/target and Y is the value to copy.
Check that the SET_SRC is reasonable before calling emit_move_insn, otherwise construct a suitable SET pattern ourselves.
store_bit_field expects START to be relative to
BYTES_BIG_ENDIAN and adjusts this value for machines with
BITS_BIG_ENDIAN != BYTES_BIG_ENDIAN. In order to be able to
invoke store_bit_field again it is necessary to have the START
value from the first call.
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Helper function for noce_try_store_flag*.
If earliest == jump, or when the condition is complex, try to build the store_flag insn directly.
Don't even try if the comparison operands or the mode of X are weird.
References BITS_PER_UNIT, BITS_PER_WORD, code_to_optab(), CONSTANT_P, emit_insn(), emit_move_insn(), end_sequence(), expand_unop(), gcc_assert, GET_CODE, get_insns(), GET_MODE, GET_RTX_CLASS, HOST_WIDE_INT, INTVAL, MEM_P, NULL_RTX, OBJECT_P, recog_memoized(), REG_P, RTX_BIN_ARITH, RTX_COMM_ARITH, RTX_UNARY, start_sequence(), store_bit_field(), and XEXP.
Referenced by end_ifcvt_sequence(), and noce_try_addcc().
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Determine if a given basic block heads a simple IF-THEN-JOIN or an IF-THEN-ELSE-JOIN block.
If so, we'll try to convert the insns to not require the branch, using only transformations that do not require conditional execution.
Return TRUE if we were successful at converting the block.
We only ever should get here before reload.
Recognize an IF-THEN-ELSE-JOIN block.
Recognize an IF-THEN-JOIN block.
Recognize an IF-ELSE-JOIN block. We can have those because the order of basic blocks in cfglayout mode does not matter, so the fallthrough edge can go to any basic block (and not just to bb->next_bb, like in cfgrtl mode).
The noce transformations do not apply to IF-ELSE-JOIN blocks.
To make this work, we have to invert the THEN and ELSE blocks
and reverse the jump condition. Not a form we can handle.
The edges of the THEN and ELSE blocks cannot have complex edges.
If the conditional jump is more than just a conditional jump, then we can not do if-conversion on this block.
If this is not a standard conditional jump, we can't parse it.
We must be comparing objects whose modes imply the size.
Initialize an IF_INFO struct to pass around.
Do the real work.
References merge_blocks(), and num_true_changes.
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For most cases, the simplified condition we found is the best choice, but this is not the case for the min/max/abs transforms. For these we wish to know that it is A or B in the condition.
If target is already mentioned in the known condition, return it.
If we're looking for a constant, try to make the conditional
have that constant in it. There are two reasons why it may
not have the constant we want:
1. GCC may have needed to put the constant in a register, because
the target can't compare directly against that constant. For
this case, we look for a SET immediately before the comparison
that puts a constant in that register.
2. GCC may have canonicalized the conditional, for example
replacing "if x < 4" with "if x <= 3". We can undo that (or
make equivalent types of changes) to get the constants we need
if they're off by one in the right direction. First, look to see if we put a constant in a register.
Now, look to see if we can get the right constant by
adjusting the conditional. If we made any changes, generate a new conditional that is
equivalent to what we started with, but has the right
constants in it. We almost certainly searched back to a different place. Need to re-verify correct lifetimes.
X may not be mentioned in the range (cond_earliest, jump].
A and B may not be modified in the range [cond_earliest, jump).
Referenced by cond_exec_find_if_block().
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Similar to get_condition, only the resulting condition must be valid at JUMP, instead of at EARLIEST.
If THEN_ELSE_REVERSED is true, the fallthrough does not go to the THEN block of the caller, and we have to reverse the condition.
If this branches to JUMP_LABEL when the condition is false, reverse the condition.
We may have to reverse because the caller's if block is not canonical, i.e. the THEN block isn't the fallthrough block for the TEST block (see find_if_header).
If the condition variable is a register and is MODE_INT, accept it.
Otherwise, fall back on canonicalize_condition to do the dirty work of manipulating MODE_CC values and COMPARE rtx codes.
We don't handle side-effects in the condition, like handling REG_INC notes and making sure no duplicate conditions are emitted.
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Return true if a write into MEM may trap or fault.
Call target hook to avoid the effects of -fpic etc....
References targetm.
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Return true if OP is ok for if-then-else processing.
We special-case memories, so handle any of them with no address side effects.
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Given a simple IF-THEN-JOIN or IF-THEN-ELSE-JOIN block, attempt to convert it without using conditional execution. Return TRUE if we were successful at converting the block.
We're looking for patterns of the form (1) if (...) x = a; else x = b; (2) x = b; if (...) x = a; (3) if (...) x = a; // as if with an initial x = x. The later patterns require jumps to be more expensive. ??? For future expansion, look for multiple X in such patterns.
Look for one of the potential sets.
Look for the other potential set. Make sure we've got equivalent destinations.
??? This is overconservative. Storing to two different mems is as easy as conditionally computing the address. Storing to a single mem merely requires a scratch memory to use as one of the destination addresses; often the memory immediately below the stack pointer is available for this.
We're going to be moving the evaluation of B down from above
COND_EARLIEST to JUMP. Make sure the relevant data is still
intact. Avoid extending the lifetime of hard registers on small
register class machines. Likewise with X. In particular this can happen when
noce_get_condition looks farther back in the instruction
stream than one might expect. If x has side effects then only the if-then-else form is safe to convert. But even in that case we would need to restore any notes (such as REG_INC) at then end. That can be tricky if noce_emit_move_insn expands to more than one insn, so disable the optimization entirely for now if there are side effects.
Only operate on register destinations, and even then avoid extending the lifetime of hard registers on small register class machines.
Don't operate on sources that may trap or are volatile.
Set up the info block for our subroutines.
Try optimizations in some approximation of a useful order.
??? Should first look to see if X is live incoming at all. If it isn't, we don't need anything but an unconditional set.
Look and see if A and B are really the same. Avoid creating silly cmove constructs that no one will fix up later.
If we have an INSN_B, we don't have to create any new rtl. Just
move the instruction that we already have. If we don't have an
INSN_B, that means that A == X, and we've got a noop move. In
that case don't do anything and let the code below delete INSN_A. If there was a REG_EQUAL note, delete it since it may have been
true due to this insn being after a jump. If we have "x = b; if (...) x = a;", and x has side-effects, then
x must be executed twice. Disallow the "if (...) x = a;" form (implicit "else x = x;")
for optimizations if writing to x may trap or fault,
i.e. it's a memory other than a static var or a stack slot,
is misaligned on strict aligned machines or is read-only. If
x is a read-only memory, then the program is valid only if we
avoid the store into it. If there are stores on both the
THEN and ELSE arms, then we can go ahead with the conversion;
either the program is broken, or the condition is always
false such that the other memory is selected. Avoid store speculation: given "if (...) x = a" where x is a
MEM, we only want to do the store if x is always set
somewhere in the function. This avoids cases like
if (pthread_mutex_trylock(mutex))
++global_variable;
where we only want global_variable to be changed if the mutex
is held. FIXME: This should ideally be expressed directly in
RTL somehow. If we used a temporary, fix it up now.
The original THEN and ELSE blocks may now be removed. The test block must now jump to the join block. If the test block and the join block can be merged, do so.
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Convert "if (a < 0) x = -a; else x = a;" to "x = abs(a);", "if (a < 0) x = ~a; else x = a;" to "x = one_cmpl_abs(a);", etc.
Reject modes with signed zeros.
Recognize A and B as constituting an ABS or NABS. The canonical form is a branch around the negation, taken when the object is the first operand of a comparison against 0 that evaluates to true.
Verify the condition is of the form we expect.
Verify that C is zero. Search one step backward for a REG_EQUAL note or a simple source if necessary.
Work around funny ideas get_condition has wrt canonicalization. Note that these rtx constants are known to be CONST_INT, and therefore imply integer comparisons.
Determine what sort of operation this is.
??? It's a quandary whether cmove would be better here, especially for integers. Perhaps combine will clean things up.
References end_sequence(), and FALSE.
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Convert "if (test) foo++" into "foo += (test != 0)", and similarly for "foo--".
First try to use addcc pattern.
If that fails, construct conditional increment or decrement using
setcc.
References noce_if_info::a, noce_if_info::b, noce_if_info::branch_cost, noce_if_info::cond, const0_rtx, emit_insn_before_setloc(), end_ifcvt_sequence(), end_sequence(), expand_simple_binop(), FALSE, gen_reg_rtx(), GET_MODE, noce_if_info::insn_a, INSN_LOCATION, noce_if_info::jump, noce_emit_move_insn(), noce_emit_store_flag(), OPTAB_WIDEN, reversed_comparison_code(), rtx_equal_p(), start_sequence(), TRUE, and noce_if_info::x.
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Optimize away "if (x & C) x |= C" and similar bit manipulation transformations.
Check for no else condition.
Check for a suitable condition.
??? We could also handle AND here.
Check for "if (X & C) x = x op C".
if ((x & C) == 0) x |= C; is transformed to x |= C.
if ((x & C) != 0) x |= C; is transformed to nothing.
if ((x & C) == 0) x ^= C; is transformed to x |= C.
if ((x & C) != 0) x ^= C; is transformed to x &= ~C.
Check for "if (X & C) x &= ~C".
if ((x & C) == 0) x &= ~C; is transformed to nothing.
if ((x & C) != 0) x &= ~C; is transformed to x &= ~C.
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Try only simple constants and registers here. More complex cases are handled in noce_try_cmove_arith after noce_try_store_flag_arith has had a go at it.
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Try more complex cases involving conditional_move.
A conditional move from two memory sources is equivalent to a conditional on their addresses followed by a load. Don't do this early because it'll screw alias analysis. Note that we've already checked for no side effects.
??? FIXME: Magic number 5.
??? We could handle this if we knew that a load from A or B could not trap or fault. This is also true if we've already loaded from the address along the path from ENTRY.
if (test) x = a + b; else x = c - d;
=> y = a + b;
x = c - d;
if (test)
x = y;
Total insn_rtx_cost should be smaller than branch cost. Exit if insn_rtx_cost can't be estimated.
Possibly rearrange operands to make things come out more natural.
If either operand is complex, load it into a register first. The best way to do this is to copy the original insn. In this way we preserve any clobbers etc that the insn may have had. This is of course not possible in the IS_MEM case.
If insn to set up A clobbers any registers B depends on, try to
swap insn that sets up A with the one that sets up B. If even
that doesn't help, punt. If we're handling a memory for above, emit the load now.
Copy over flags as appropriate.
References emit_insn(), gen_reg_rtx(), and GET_MODE.
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Convert "if (a < b) x = a; else x = b;" to "x = min(a, b);", etc.
??? Reject modes with NaNs or signed zeros since we don't know how they will be resolved with an SMIN/SMAX. It wouldn't be too hard to get the target to tell us...
Verify the condition is of the form we expect, and canonicalize the comparison code.
Determine what sort of operation this is. Note that the code is for a taken branch, so the code->operation mapping appears backwards.
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Convert "if (a != b) x = a; else x = b" into "x = a" and "if (a == b) x = a; else x = b" into "x = b".
This optimization isn't valid if either A or B could be a NaN or a signed zero.
Check whether the operands of the comparison are A and in either order.
Avoid generating the move if the source is the destination.
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Convert "if (m < 0) x = b; else x = 0;" to "x = (m >> C) & b;".
We currently don't handle different modes.
This is only profitable if T is unconditionally executed/evaluated in the original insn sequence or T is cheap. The former happens if B is the non-zero (T) value and if INSN_B was taken from TEST_BB, or there was no INSN_B which can happen for e.g. conditional stores to memory. For the cost computation use the block TEST_BB where the evaluation will end up after the transformation.
Use emit_store_flag to generate "m < 0 ? -1 : 0" instead of expanding "(signed) m >> 31" directly. This benefits targets with specialized insns to obtain the signmask, but still uses ashr_optab otherwise.
References gen_int_mode(), and simplify_gen_binary().
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Convert "if (test) x = 1; else x = 0".
Only try 0 and STORE_FLAG_VALUE here. Other combinations will be tried in noce_try_store_flag_constants after noce_try_cmove has had a go at the conversion.
References trunc_int_for_mode().
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Convert "if (test) x = a; else x = b", for A and B constant.
Make sure we can represent the difference between the two values.
if (test) x = 3; else x = 4;
=> x = 3 + (test == 0); if (test) x = 8; else x = 0;
=> x = (test != 0) << 3; if (test) x = -1; else x = b;
=> x = -(test != 0) | b; if (test) x = a; else x = b;
=> x = (-(test != 0) & (b - a)) + a;
References expand_simple_binop(), gen_int_mode(), OPTAB_WIDEN, and noce_if_info::x.
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Convert "if (test) x = 0;" to "x &= -(test == 0);"
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Rerun if-conversion, as combine may have simplified things enough to now meet sequence length restrictions.
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If-conversion and CFG cleanup.
Variable Documentation
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Whether conditional execution changes were made.
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True if after combine pass.
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of IF-THEN or IF-THEN-ELSE blocks we looked at
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of changes made.
Referenced by cond_exec_find_if_block(), and noce_find_if_block().
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of IF-THEN or IF-THEN-ELSE blocks were converted to conditional
execution.
Referenced by cond_exec_find_if_block().
