#include "config.h"#include "system.h"#include "coretypes.h"#include "tm.h"#include "tree.h"#include "rtl-error.h"#include "tm_p.h"#include "insn-config.h"#include "insn-attr.h"#include "hard-reg-set.h"#include "recog.h"#include "regs.h"#include "addresses.h"#include "expr.h"#include "function.h"#include "flags.h"#include "basic-block.h"#include "reload.h"#include "target.h"#include "tree-pass.h"#include "df.h"#include "insn-codes.h"
Data Structures | |
| struct | change_t |
| struct | validate_replace_src_data |
| struct | funny_match |
Macros | |
| #define | STACK_PUSH_CODE PRE_INC |
| #define | STACK_POP_CODE POST_DEC |
| #define | HAVE_extv 0 |
| #define | CODE_FOR_extv CODE_FOR_nothing |
| #define | HAVE_extzv 0 |
| #define | CODE_FOR_extzv CODE_FOR_nothing |
Typedefs | |
| typedef struct change_t | change_t |
Variables | |
| int | volatile_ok |
| struct recog_data_d | recog_data |
| struct operand_alternative | recog_op_alt [MAX_RECOG_OPERANDS][MAX_RECOG_ALTERNATIVES] |
| int | which_alternative |
| int | reload_completed |
| int | epilogue_completed |
| static change_t * | changes |
| static int | changes_allocated |
| static int | num_changes = 0 |
Macro Definition Documentation
| #define CODE_FOR_extv CODE_FOR_nothing |
| #define CODE_FOR_extzv CODE_FOR_nothing |
| #define HAVE_extv 0 |
Reduce conditional compilation elsewhere.
| #define HAVE_extzv 0 |
| #define STACK_POP_CODE POST_DEC |
| #define STACK_PUSH_CODE PRE_INC |
Subroutines used by or related to instruction recognition. Copyright (C) 1987-2013 Free Software Foundation, Inc.
This file is part of GCC.
GCC is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by the Free Software Foundation; either version 3, or (at your option) any later version.
GCC is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
You should have received a copy of the GNU General Public License along with GCC; see the file COPYING3. If not see http://www.gnu.org/licenses/.
Typedef Documentation
Function Documentation
| int address_operand | ( | ) |
Return 1 if OP is a valid memory address for a memory reference of mode MODE.
The main use of this function is as a predicate in match_operand expressions in the machine description.
References GET_CODE, GET_MODE, lra_in_progress, REG_P, and REGNO.
Referenced by decode_asm_operands().
| int apply_change_group | ( | void | ) |
Apply a group of changes previously issued with `validate_change'. If all changes are valid, call confirm_change_group and return 1, otherwise, call cancel_changes and return 0.
Referenced by find_comparison_args(), find_invariants_to_move(), and redirect_exp_1().
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Return true if labels in asm operands BODY are LABEL_REFs.
| int asm_noperands | ( | ) |
If BODY is an insn body that uses ASM_OPERANDS, return the number of operands (both input and output) in the insn. Otherwise return -1.
Multiple output operands, or 1 output plus some clobbers:
body is
[(set OUTPUT (asm_operands ...))... (clobber (reg ...))...].
Count backwards through CLOBBERs to determine number of SETs.
N_SETS is now number of output operands.
Verify that all the SETs we have
came from a single original asm_operands insn
(so that invalid combinations are blocked). If these ASM_OPERANDS rtx's came from different original insns
then they aren't allowed together. 0 outputs, but some clobbers:
body is [(asm_operands ...) (clobber (reg ...))...]. Make sure all the other parallel things really are clobbers.
References GET_CODE, GET_MODE, SET, SET_DEST, SET_SRC, XSTR, XVECEXP, and XVECLEN.
Referenced by decls_for_scope().
| int asm_operand_ok | ( | ) |
Check if an asm_operand matches its constraints. Return > 0 if ok, = 0 if bad, < 0 if inconclusive.
Use constrain_operands after reload.
Empty constraint string is the same as "X,...,X", i.e. X for as many alternatives as required to match the other operands.
If caller provided constraints pointer, look up
the matching constraint. Otherwise, our caller should have
given us the proper matching constraint, but we can't
actually fail the check if they didn't. Indicate that
results are inconclusive. ??? Before auto-inc-dec, auto inc/dec insns are not supposed to exist,
excepting those that expand_call created. Further, on some
machines which do not have generalized auto inc/dec, an inc/dec
is not a memory_operand.
Match any memory and hope things are resolved after reload. Fall through.
For all other letters, we first check for a register class,
otherwise it is an EXTRA_CONSTRAINT.
References GET_MODE, and register_operand().
Referenced by decode_asm_operands().
| void cancel_changes | ( | ) |
Retract the changes numbered NUM and up.
Back out all the changes. Do this in the opposite order in which they were made.
| bool canonicalize_change_group | ( | ) |
Keep X canonicalized if some changes have made it non-canonical; only modifies the operands of X, not (for example) its code. Simplifications are not the job of this routine.
Return true if anything was changed.
Oops, the caller has made X no longer canonical. Let's redo the changes in the correct order.
References check_asm_operands(), GET_CODE, PATTERN, recog(), reload_completed, reload_in_progress, and SET.
Referenced by find_comparison_args().
| int check_asm_operands | ( | ) |
Check that X is an insn-body for an `asm' with operands and that the operands mentioned in it are legitimate.
Post-reload, be more strict with things.
??? Doh! We've not got the wrapping insn. Cook one up.
References constrain_operands(), extract_insn(), make_insn_raw(), and which_alternative.
Referenced by canonicalize_change_group().
| int comparison_operator | ( | ) |
Return 1 if this is a comparison operator. This allows the use of MATCH_OPERATOR to recognize all the branch insns.
Referenced by gen_insn().
| void confirm_change_group | ( | void | ) |
A group of changes has previously been issued with validate_change and verified with verify_changes. Call df_insn_rescan for each of the insn changed and clear num_changes.
Avoid unnecessary rescanning when multiple changes to same instruction are made.
References confirm_change_group().
Referenced by confirm_change_group(), and redirect_jump_1().
| int const_double_operand | ( | ) |
Returns 1 if OP is an operand that is a constant integer or constant floating-point number.
Don't accept CONST_INT or anything similar if the caller wants something floating.
| int const_int_operand | ( | ) |
Returns 1 if OP is an operand that is a CONST_INT.
| int constrain_operands | ( | ) |
A unary operator may be accepted by the predicate, but it
is irrelevant for matching constraints.
An empty constraint or empty alternative
allows anything which matched the pattern. Ignore rest of this alternative as far as
constraint checking is concerned. This operand must be the same as a previous one.
This kind of constraint is used for instructions such
as add when they take only two operands.
Note that the lower-numbered operand is passed first.
If we are not testing strictly, assume that this
constraint will be satisfied. A unary operator may be accepted by the predicate,
but it is irrelevant for matching constraints. If output is *x and input is *–x, arrange later
to change the output to *–x as well, since the
output op is the one that will be printed. p is used for address_operands. When we are called by
gen_reload, no one will have checked that the address is
strictly valid, i.e., that all pseudos requiring hard regs
have gotten them. No need to check general_operand again;
it was done in insn-recog.c. Well, except that reload
doesn't check the validity of its replacements, but
that should only matter when there's a bug. Anything goes unless it is a REG and really has a hard reg
but the hard reg is not in the class GENERAL_REGS. This is used for a MATCH_SCRATCH in the cases when
we don't actually need anything. So anything goes
any time. Memory operands must be valid, to the extent
required by STRICT. Before reload, accept what reload can turn into mem.
During reload, accept a pseudo
Before reload, accept what reload can handle.
During reload, accept a pseudo
If this operand did not win somehow,
this alternative loses. This alternative won; the operands are ok.
Change whichever operands this alternative says to change. See if any earlyclobber operand conflicts with some other
operand. Ignore earlyclobber operands now in memory,
because we would often report failure when we have
two memory operands, one of which was formerly a REG. Ignore things like match_operator operands.
If we are about to reject this, but we are not to test strictly, try a very loose test. Only return failure if it fails also.
References reg_fits_class_p(), REGNO, and reload_in_progress.
Referenced by check_asm_operands(), lra_former_scratch_operand_p(), and offsettable_address_addr_space_p().
| int constrain_operands_cached | ( | ) |
Do cached constrain_operands and complain about failures.
References skip_alternative().
| const char* decode_asm_operands | ( | rtx | body, |
| rtx * | operands, | ||
| rtx ** | operand_locs, | ||
| const char ** | constraints, | ||
| enum machine_mode * | modes, | ||
| location_t * | loc | ||
| ) |
Assuming BODY is an insn body that uses ASM_OPERANDS, copy its operands (both input and output) into the vector OPERANDS, the locations of the operands within the insn into the vector OPERAND_LOCS, and the constraints for the operands into CONSTRAINTS. Write the modes of the operands into MODES. Return the assembler-template.
If MODES, OPERAND_LOCS, CONSTRAINTS or OPERANDS is 0, we don't store that info.
Zero output asm: BODY is (asm_operands ...).
Single output asm: BODY is (set OUTPUT (asm_operands ...)).
The output is in the SET.
Its constraint is in the ASM_OPERANDS itself. At least one output, plus some CLOBBERs. The outputs are in
the SETs. Their constraints are in the ASM_OPERANDS itself.
References address_operand(), asm_operand_ok(), CONST_DOUBLE_AS_FLOAT_P, GET_CODE, GET_MODE, GET_MODE_CLASS, MEM_P, memory_operand(), NULL, offsettable_nonstrict_memref_p(), TARGET_MEM_CONSTRAINT, and XEXP.
| rtx extract_asm_operands | ( | ) |
If BODY is an insn body that uses ASM_OPERANDS, return it.
Single output operand: BODY is (set OUTPUT (asm_operands ...)).
References ASM_OPERANDS_OUTPUT_CONSTRAINT, GET_CODE, GET_MODE, SET, SET_DEST, and SET_SRC.
Referenced by init_recog().
| void extract_constrain_insn_cached | ( | ) |
Do cached extract_insn, constrain_operands and complain about failures. Used by insn_attrtab.
References recog_data_d::constraints, recog_data_d::n_alternatives, recog_data, and recog_op_alt.
| void extract_insn | ( | ) |
Analyze INSN and fill in recog_data.
This insn is an `asm' with operands.
expand_asm_operands makes sure there aren't too many operands.
Now get the operand values and constraints out of the insn.
Ordinary insn: recognize it, get the operands via insn_extract
and get the constraints. VOIDmode match_operands gets mode from their real operand.
References operand_alternative::anything_ok.
Referenced by check_asm_operands(), lra_former_scratch_operand_p(), and process_bb_node_lives().
| void extract_insn_cached | ( | ) |
Like extract_insn, but save insn extracted and don't extract again, when called again for the same insn expecting that recog_data still contain the valid information. This is used primary by gen_attr infrastructure that often does extract insn again and again.
References recog_data_d::n_alternatives, recog_data_d::n_operands, recog_data, and recog_op_alt.
| rtx* find_constant_term_loc | ( | ) |
Given an rtx *P, if it is a sum containing an integer constant term, return the location (type rtx *) of the pointer to that constant term. Otherwise, return a null pointer.
If *P IS such a constant term, P is its location.
Otherwise, if not a sum, it has no constant term.
If one of the summands is constant, return its location.
Otherwise, check each summand for containing a constant term.
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The placement of the splitting that we do for shorten_branches depends on whether regstack is used by the target or not.
Referenced by rest_of_handle_split_all_insns().
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| int general_operand | ( | ) |
Return 1 if OP is a valid general operand for machine mode MODE. This is either a register reference, a memory reference, or a constant. In the case of a memory reference, the address is checked for general validity for the target machine.
Register and memory references must have mode MODE in order to be valid, but some constants have no machine mode and are valid for any mode.
If MODE is VOIDmode, OP is checked for validity for whatever mode it has.
The main use of this function is as a predicate in match_operand expressions in the machine description.
Don't accept CONST_INT or anything similar if the caller wants something floating.
Except for certain constants with VOIDmode, already checked for, OP's mode must match MODE if MODE specifies a mode.
Avoid memories with nonzero SUBREG_BYTE, as offsetting the memory
may result in incorrect reference. We should simplify all valid
subregs of MEM anyway. But allow this after reload because we
might be called from cleanup_subreg_operands.
??? This is a kludge. FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
create such rtl, and we must reject it. LRA can use subreg to store a floating point value in an
integer mode. Although the floating point and the
integer modes need the same number of hard registers, the
size of floating point mode can be less than the integer
mode. Use the mem's mode, since it will be reloaded thus.
Referenced by pmode_register_operand(), and reset_opr_set_tables().
| int if_test_bypass_p | ( | ) |
True if the dependency between OUT_INSN and IN_INSN is in the IF_THEN_ELSE condition, and not the THEN or ELSE branch. OUT_INSN may be either a single or multiple set; IN_INSN should be single_set for truth, but for convenience of insn categorization may be any JUMP or CALL insn.
References rest_of_handle_split_before_regstack().
| int immediate_operand | ( | ) |
Return 1 if OP is a valid immediate operand for mode MODE.
The main use of this function is as a predicate in match_operand expressions in the machine description.
Don't accept CONST_INT or anything similar if the caller wants something floating.
Referenced by scratch_operand().
| int indirect_operand | ( | ) |
Return 1 if OP is a valid indirect memory reference with mode MODE; that is, a memory reference whose address is a general_operand.
Before reload, a SUBREG isn't in memory (see memory_operand, above).
The only way that we can have a general_operand as the resulting
address is if OFFSET is zero and the address already is an operand
or if the address is (plus Y (const_int -OFFSET)) and Y is an
operand.
| void init_recog | ( | void | ) |
References extract_asm_operands(), and NULL_RTX.
Referenced by profile_function().
| void init_recog_no_volatile | ( | void | ) |
Initialize data used by the function `recog'. This must be called once in the compilation of a function before any insn recognition may be done in the function.
References volatile_ok.
| int insn_invalid_p | ( | ) |
This subroutine of apply_change_group verifies whether the changes to INSN were valid; i.e. whether INSN can still be recognized.
If IN_GROUP is true clobbers which have to be added in order to match the instructions will be added to the current change group. Otherwise the changes will take effect immediately.
If we are before reload and the pattern is a SET, see if we can add clobbers.
If this is an asm and the operand aren't legal, then fail. Likewise if this is not an asm and the insn wasn't recognized.
If we have to add CLOBBERs, fail if we have to add ones that reference hard registers since our callers can't know if they are live or not. Otherwise, add them.
After reload, verify that all constraints are satisfied.
References add_clobbers(), added_clobbers_hard_reg_p(), PATTERN, rtvec_alloc(), validate_change(), and XVECEXP.
| rtl_opt_pass* make_pass_peephole2 | ( | ) |
| rtl_opt_pass* make_pass_split_after_reload | ( | ) |
| rtl_opt_pass* make_pass_split_all_insns | ( | ) |
| rtl_opt_pass* make_pass_split_before_regstack | ( | ) |
| rtl_opt_pass* make_pass_split_before_sched2 | ( | ) |
| rtl_opt_pass* make_pass_split_for_shorten_branches | ( | ) |
| int memory_address_addr_space_p | ( | enum machine_mode | mode, |
| rtx | addr, | ||
| addr_space_t | as | ||
| ) |
Return 1 if ADDR is a valid memory address for mode MODE in address space AS.
Referenced by determine_common_wider_type(), gen_lowpart_if_possible(), get_computation(), num_changes_pending(), and reload_combine_closest_single_use().
| int memory_operand | ( | ) |
Return 1 if OP is a valid memory reference with mode MODE, including a valid address.
The main use of this function is as a predicate in match_operand expressions in the machine description.
Note that no SUBREG is a memory operand before end of reload pass, because (SUBREG (MEM...)) forces reloading into a register.
References GET_CODE, SET, SET_SRC, and XVECEXP.
Referenced by decode_asm_operands().
| bool mode_dependent_address_p | ( | ) |
Return 1 if ADDR is an address-expression whose effect depends on the mode of the memory reference it is used in.
ADDRSPACE is the address space associated with the address.
Autoincrement addressing is a typical example of mode-dependence because the amount of the increment depends on the mode.
Auto-increment addressing with anything other than post_modify or pre_modify always introduces a mode dependency. Catch such cases now instead of deferring to the target.
Referenced by distribute_and_simplify_rtx().
| int nonimmediate_operand | ( | ) |
| int nonmemory_operand | ( | ) |
Return 1 if OP is a register reference or immediate value of mode MODE.
Before reload, we can allow (SUBREG (MEM...)) as a register operand because it is guaranteed to be reloaded into one. Just make sure the MEM is valid in itself. (Ideally, (SUBREG (MEM)...) should not exist after reload, but currently it does result from (SUBREG (REG)...) where the reg went on the stack.)
| int num_changes_pending | ( | void | ) |
Return number of changes made and not validated yet.
References GET_MODE, MEM_ADDR_SPACE, memory_address_addr_space_p(), and XEXP.
| int num_validated_changes | ( | void | ) |
Return the number of changes so far in the current group.
References GET_CODE, swap_commutative_operands_p(), SWAPPABLE_OPERANDS_P, and XEXP.
| int offsettable_address_addr_space_p | ( | int | strictp, |
| enum machine_mode | mode, | ||
| rtx | y, | ||
| addr_space_t | as | ||
| ) |
Return 1 if Y is a memory address which contains no side effects and would remain valid for address space AS after the addition of a positive integer less than the size of that mode.
We assume that the original address is valid and do not check it. We do check that it is valid for narrower modes.
If STRICTP is nonzero, we require a strictly valid address, for the sake of use in reload.c.
Adjusting an offsettable address involves changing to a narrower mode. Make sure that's OK.
??? How much offset does an offsettable BLKmode reference need? Clearly that depends on the situation in which it's being used. However, the current situation in which we test 0xffffffff is less than ideal. Caveat user.
If the expression contains a constant term, see if it remains valid when max possible offset is added.
Use QImode because an odd displacement may be automatically invalid
for any wider mode. But it should be valid for a single byte. In any case, restore old contents of memory.
The offset added here is chosen as the maximum offset that any instruction could need to add when operating on something of the specified mode. We assume that if Y and Y+c are valid addresses then so is Y+d for all 0<d<c. adjust_address will go inside a LO_SUM here, so we do so as well.
Use QImode because an odd displacement may be automatically invalid for any wider mode. But it should be valid for a single byte.
References constrain_operands(), and which_alternative.
| int offsettable_memref_p | ( | ) |
Return 1 if OP is a memory reference whose address contains no side effects and remains valid after the addition of a positive integer less than the size of the object being referenced.
We assume that the original address is valid and do not check it.
This uses strict_memory_address_p as a subroutine, so don't use it before reload.
References targetm.
| int offsettable_nonstrict_memref_p | ( | ) |
Similar, but don't require a strictly valid mem ref: consider pseudo-regs valid as index or base regs.
Referenced by decode_asm_operands(), and process_alt_operands().
| int ordered_comparison_operator | ( | ) |
Return 1 if this is an ordered comparison operator (not including ORDERED and UNORDERED).
References ASM_OPERANDS_INPUT_VEC, GET_CODE, SET, SET_SRC, and XVECEXP.
| int pmode_register_operand | ( | ) |
Return 1 for a register in Pmode; ignore the tested mode.
References CONSTANT_P, and general_operand().
| int pop_operand | ( | ) |
Return 1 if OP is a valid operand that stands for popping a value of mode MODE off the stack.
The main use of this function is as a predicate in match_operand expressions in the machine description.
| void preprocess_constraints | ( | void | ) |
After calling extract_insn, you can use this function to extract some information from the constraint strings into a more usable form. The collected data is stored in recog_op_alt.
These don't say anything we care about.
Referenced by process_bb_node_lives().
| int push_operand | ( | ) |
Return 1 if OP is a valid operand that stands for pushing a value of mode MODE onto the stack.
The main use of this function is as a predicate in match_operand expressions in the machine description.
Referenced by emit_move_change_mode(), and set_storage_via_setmem().
| bool reg_fits_class_p | ( | const_rtx | operand, |
| reg_class_t | cl, | ||
| int | offset, | ||
| enum machine_mode | mode | ||
| ) |
Return true iff OPERAND (assumed to be a REG rtx) is a hard reg in class CLASS when its regno is offset by OFFSET and changed to mode MODE. If REG occupies multiple hard regs, all of them must be in CLASS.
Regno must not be a pseudo register. Offset may be negative.
References peep2_current_count.
Referenced by constrain_operands().
| int register_operand | ( | ) |
Return 1 if OP is a register reference of mode MODE. If MODE is VOIDmode, accept a register in any mode.
The main use of this function is as a predicate in match_operand expressions in the machine description.
Before reload, we can allow (SUBREG (MEM...)) as a register operand
because it is guaranteed to be reloaded into one.
Just make sure the MEM is valid in itself.
(Ideally, (SUBREG (MEM)...) should not exist after reload,
but currently it does result from (SUBREG (REG)...) where the
reg went on the stack.)
FLOAT_MODE subregs can't be paradoxical. Combine will occasionally
create such rtl, and we must reject it. LRA can use subreg to store a floating point value in an
integer mode. Although the floating point and the
integer modes need the same number of hard registers, the
size of floating point mode can be less than the integer
mode.
References CONST_INT_P, CONSTANT_P, GET_MODE, GET_MODE_CLASS, INTVAL, LEGITIMATE_PIC_OPERAND_P, targetm, and trunc_int_for_mode().
Referenced by asm_operand_ok(), and emit_move_change_mode().
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If optimizing, then go ahead and split insns now.
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References gate_do_final_split().
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Referenced by if_test_bypass_p().
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| int scratch_operand | ( | ) |
Return 1 if OP should match a MATCH_SCRATCH, i.e., if it is a SCRATCH or a hard register.
References CONSTANT_P, GET_CODE, GET_MODE, and immediate_operand().
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A subroutine of validate_replace_rtx_1 that tries to simplify the resulting rtx.
If we have a PLUS whose second operand is now a CONST_INT, use
simplify_gen_binary to try to simplify it.
??? We may want later to remove this, once simplification is
separated from this function.
If any of the above failed, substitute in something that
we know won't be recognized. All subregs possible to simplify should be simplified.
Subregs of VOIDmode operands are incorrect.
If we are replacing a register with memory, try to change the memory
to be the mode required for memory in extract operations (this isn't
likely to be an insertion operation; if it was, nothing bad will
happen, we might just fail in some cases). If we have a narrower mode, we can do something.
If the bytes and bits are counted differently, we
must adjust the offset.
References const0_rtx, GET_MODE, simplify_gen_unary(), validate_change(), and XEXP.
| void split_all_insns | ( | void | ) |
Split all insns in the function. If UPD_LIFE, update life info after.
Can't use `next_real_insn' because that might go across
CODE_LABELS and short-out basic blocks.
Don't split no-op move insns. These should silently
disappear later in final. Splitting such insns would
break the code that handles LIBCALL blocks. Nops get in the way while scheduling, so delete them
now if register allocation has already been done. It
is too risky to try to do this before register
allocation, and there are unlikely to be very many
nops then anyways.
References DF_INSN_DEFS, DF_REF_REGNO, fixed_regs, gcc_assert, global_regs, HARD_REG_SET, hard_regno_nregs, live, NULL_RTX, reg_alloc_order, REG_SET_TO_HARD_REG_SET, and SET_HARD_REG_BIT.
| unsigned int split_all_insns_noflow | ( | void | ) |
Same as split_all_insns, but do not expect CFG to be available. Used by machine dependent reorg passes.
Don't split no-op move insns. These should silently disappear later in final. Splitting such insns would break the code that handles LIBCALL blocks.
Nops get in the way while scheduling, so delete them
now if register allocation has already been done. It
is too risky to try to do this before register
allocation, and there are unlikely to be very many
nops then anyways.
??? Should we use delete_insn when the CFG isn't valid?
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Split single instruction. Helper function for split_all_insns and split_all_insns_noflow. Return last insn in the sequence if successful, or NULL if unsuccessful.
Split insns here to get max fine-grain parallelism.
If the original instruction was a single set that was known to be equivalent to a constant, see if we can say the same about the last instruction in the split sequence. The two instructions must set the same destination.
try_split returns the NOTE that INSN became.
??? Coddle to md files that generate subregs in post-reload splitters instead of computing the proper hard register.
References gcc_assert.
| int store_data_bypass_p | ( | ) |
Common predicates for use with define_bypass. True if the dependency between OUT_INSN and IN_INSN is on the store data not the address operand(s) of the store. IN_INSN and OUT_INSN must be either a single_set or a PARALLEL with SETs inside.
| bool validate_change | ( | ) |
Wrapper for validate_change_1 without the UNSHARE argument defaulting UNSHARE to false.
References COMMUTATIVE_P, swap_commutative_operands_p(), and XEXP.
Referenced by check_eliminable_occurrences(), find_comparison_args(), find_invariants_to_move(), insert_insn_end_basic_block(), insn_invalid_p(), maybe_select_cc_mode(), move2add_use_add3_insn(), redirect_jump(), reload_combine_closest_single_use(), reload_combine_purge_reg_uses_after_ruid(), reload_cse_move2add(), and simplify_while_replacing().
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Validate a proposed change to OBJECT. LOC is the location in the rtl at which NEW_RTX will be placed. If OBJECT is zero, no validation is done, the change is simply made.
Two types of objects are supported: If OBJECT is a MEM, memory_address_p will be called with the address and mode as parameters. If OBJECT is an INSN, CALL_INSN, or JUMP_INSN, the insn will be re-recognized with the change in place.
IN_GROUP is nonzero if this is part of a group of changes that must be performed as a group. In that case, the changes will be stored. The function `apply_change_group' will validate and apply the changes.
If IN_GROUP is zero, this is a single change. Try to recognize the insn or validate the memory reference with the change applied. If the result is not valid for the machine, suppress the change and return zero. Otherwise, perform the change and return 1.
Save the information describing this change.
This value allows for repeated substitutions inside complex
indexed addresses, or changes in up to 5 insns. Set INSN_CODE to force rerecognition of insn. Save old code in
case invalid. If we are making a group of changes, return 1. Otherwise, validate the change group we made.
| int validate_replace_rtx | ( | ) |
Try replacing every occurrence of FROM in INSN with TO. After all changes have been made, validate by seeing if INSN is still valid.
Referenced by decrease_live_ranges_number().
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Replace every occurrence of FROM in X with TO. Mark each change with validate_change passing OBJECT.
X matches FROM if it is the same rtx or they are both referring to the same register in the same mode. Avoid calling rtx_equal_p unless the operands look similar.
Call ourself recursively to perform the replacements. We must not replace inside already replaced expression, otherwise we get infinite recursion for replacements like (reg X)->(subreg (reg X)) done by regmove, so we must special case shared ASM_OPERANDS.
Verify that operands are really shared.
If we didn't substitute, there is nothing more to do.
Allow substituted expression to have different mode. This is used by regmove to change mode of pseudo register.
Do changes needed to keep rtx consistent. Don't do any other simplifications, as it is not our job.
| void validate_replace_rtx_group | ( | ) |
Try replacing every occurrence of FROM in INSN with TO. This also will replace in REG_EQUAL and REG_EQUIV notes.
| int validate_replace_rtx_part | ( | ) |
Try replacing every occurrence of FROM in WHERE with TO. Assume that WHERE is a part of INSN. After all changes have been made, validate by seeing if INSN is still valid. validate_replace_rtx (from, to, insn) is equivalent to validate_replace_rtx_part (from, to, &PATTERN (insn), insn).
Same as above, but do not simplify rtx afterwards.
| int validate_replace_rtx_subexp | ( | ) |
Try replacing every occurrence of FROM in subexpression LOC of INSN with TO. After all changes have been made, validate by seeing if INSN is still valid.
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References next_cc0_user().
| void validate_replace_src_group | ( | ) |
Try replacing every occurrence of FROM in INSN with TO, avoiding SET_DESTs.
| bool validate_simplify_insn | ( | ) |
Try simplify INSN. Invoke simplify_rtx () on every SET_SRC and SET_DEST inside the INSN's pattern and return true if something was simplified.
References CONST_INT_P, CONSTANT_P, GET_CODE, GET_MODE, GET_MODE_CLASS, GET_MODE_SIZE, INTVAL, LEGITIMATE_PIC_OPERAND_P, lra_in_progress, MEM_P, reload_completed, SCALAR_FLOAT_MODE_P, SUBREG_BYTE, SUBREG_REG, targetm, and trunc_int_for_mode().
| bool validate_unshare_change | ( | ) |
Wrapper for validate_change_1 without the UNSHARE argument defaulting UNSHARE to true.
Referenced by find_comparison_args().
| int verify_changes | ( | ) |
Tentatively apply the changes numbered NUM and up. Return 1 if all changes are valid, zero otherwise.
The changes have been applied and all INSN_CODEs have been reset to force rerecognition. The changes are valid if we aren't given an object, or if we are given a MEM and it still is a valid address, or if this is in insn and it is recognized. In the latter case, if reload has completed, we also require that the operands meet the constraints for the insn.
If there is no object to test or if it is the same as the one we
already tested, ignore it. Don't allow changes of hard register operands to inline
assemblies if they have been defined as register asm ("x"). Perhaps we couldn't recognize the insn because there were
extra CLOBBERs at the end. If so, try to re-recognize
without the last CLOBBER (later iterations will cause each of
them to be eliminated, in turn). But don't do this if we
have an ASM_OPERAND. Add a new change to this group to replace the pattern
with this new pattern. Then consider this change
as having succeeded. The change we added will
cause the entire call to fail if things remain invalid.
Note that this can lose if a later change than the one
we are processing specified &XVECEXP (PATTERN (object), 0, X)
but this shouldn't occur. If this insn is a CLOBBER or USE, it is always valid, but is
never recognized.
Variable Documentation
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Referenced by compute_frequency_overlap().
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| int epilogue_completed |
Nonzero after thread_prologue_and_epilogue_insns has run.
Referenced by redirect_exp_1().
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| struct recog_data_d recog_data |
| struct operand_alternative recog_op_alt[MAX_RECOG_OPERANDS][MAX_RECOG_ALTERNATIVES] |
Contains a vector of operand_alternative structures for every operand. Set up by preprocess_constraints.
Referenced by build_def_use(), copyprop_hardreg_forward_1(), extract_constrain_insn_cached(), and extract_insn_cached().
| int reload_completed |
Nonzero after end of reload pass. Set to 1 or 0 by toplev.c. Controls the significance of (SUBREG (MEM)).
Referenced by canonicalize_change_group(), cond_move_convert_if_block(), df_mark_reg(), subreg_lowpart_offset(), and validate_simplify_insn().
| int volatile_ok |
Nonzero means allow operands to be volatile. This should be 0 if you are generating rtl, such as if you are calling the functions in optabs.c and expmed.c (most of the time). This should be 1 if all valid insns need to be recognized, such as in reginfo.c and final.c and reload.c.
init_recog and init_recog_no_volatile are responsible for setting this.
Referenced by block_move_libcall_safe_for_call_parm(), and init_recog_no_volatile().
| int which_alternative |
On return from `constrain_operands', indicate which alternative was satisfied.
Referenced by check_asm_operands(), lra_update_insn_recog_data(), and offsettable_address_addr_space_p().
