Here is a list of all struct and union fields with links to the structures/unions they belong to:

- x -

x : basic_block_def::basic_block_il_dependent , noce_if_info , rtx_search_arg , _list_node
x_accessible_reg_set : target_hard_regs
x_add_cost : target_expmed
x_alg_hash : target_expmed
x_alg_hash_used_p : target_expmed
x_align_functions_log : target_flag_state
x_align_jumps_log : target_flag_state
x_align_jumps_max_skip : target_flag_state
x_align_labels_log : target_flag_state
x_align_labels_max_skip : target_flag_state
x_align_loops_log : target_flag_state
x_align_loops_max_skip : target_flag_state
x_alloc_reg_class_subclasses : target_ira_int
x_apply_args_mode : target_builtins
x_apply_args_value : expr_status
x_apply_result_mode : target_builtins
x_arg_pointer_save_area : rtl_data
x_avail_temp_slots : rtl_data
x_basic_block_info : control_flow_graph
x_cached_reg_restore_code : target_reload
x_cached_reg_save_code : target_reload
x_call_fixed_reg_set : target_hard_regs
x_call_really_used_regs : target_hard_regs
x_call_used_reg_set : target_hard_regs
x_call_used_regs : target_hard_regs
x_caller_save_initialized_p : target_reload
x_can_copy : target_gcse
x_can_copy_init_p : target_gcse
x_choices : target_lower_subreg
x_class_only_fixed_regs : target_hard_regs
x_contains_reg_of_mode : target_regs
x_convert_cost : target_expmed
x_cur_debug_insn_uid : emit_status
x_cur_insn_uid : emit_status
x_current_loops : function
x_data : diagnostic_info , diagnostic_context , text_info
x_direct_load : target_regs
x_direct_store : target_regs
x_dom_computed : control_flow_graph
x_double_reg_address_ok : target_reload
x_entry_block_ptr : control_flow_graph
x_exit_block_ptr : control_flow_graph
x_first_insn : emit_status
x_first_label_num : emit_status
x_fixed_reg_set : target_hard_regs
x_fixed_regs : target_hard_regs
x_flag_excess_precision : target_flag_state
x_float_extend_from_mem : target_regs
x_forced_labels : expr_status
x_frame_offset : rtl_data
x_global_rtl : target_rtl
x_hard_regno_nregs : target_regs
x_have_regs_of_mode : target_regs
x_indirect_symref_ok : target_reload
x_inhibit_defer_pop : expr_status
x_init_cost : target_ira_int
x_initial_regno_reg_rtx : target_rtl
x_inv_reg_alloc_order : target_hard_regs
x_ira_allocno_class_translate : target_ira
x_ira_allocno_classes : target_ira
x_ira_allocno_classes_num : target_ira
x_ira_class_hard_reg_index : target_ira_int
x_ira_class_hard_regs : target_ira
x_ira_class_hard_regs_num : target_ira
x_ira_class_singleton : target_ira
x_ira_class_subset_p : target_ira
x_ira_hard_regno_allocno_class : target_ira
x_ira_important_class_nums : target_ira_int
x_ira_important_classes : target_ira_int
x_ira_important_classes_num : target_ira_int
x_ira_max_memory_move_cost : target_ira_int
x_ira_may_move_in_cost : target_ira_int
x_ira_may_move_out_cost : target_ira_int
x_ira_memory_move_cost : target_ira
x_ira_no_alloc_regs : target_ira
x_ira_non_ordered_class_hard_regs : target_ira_int
x_ira_pressure_class_translate : target_ira
x_ira_pressure_classes : target_ira
x_ira_pressure_classes_num : target_ira
x_ira_prohibited_class_mode_regs : target_ira_int
x_ira_prohibited_mode_move_regs : target_ira_int
x_ira_prohibited_mode_move_regs_initialized_p : target_ira_int
x_ira_reg_allocno_class_p : target_ira_int
x_ira_reg_class_intersect : target_ira_int
x_ira_reg_class_max_nregs : target_ira
x_ira_reg_class_min_nregs : target_ira
x_ira_reg_class_subset : target_ira
x_ira_reg_class_subunion : target_ira_int
x_ira_reg_class_super_classes : target_ira_int
x_ira_reg_class_superunion : target_ira_int
x_ira_reg_classes_intersect_p : target_ira
x_ira_reg_pressure_class_p : target_ira_int
x_ira_register_move_cost : target_ira_int
x_ira_stack_reg_pressure_class : target_ira
x_ira_uniform_class_p : target_ira_int
x_ira_useful_class_mode_regs : target_ira_int
x_label_to_block_map : control_flow_graph
x_last_basic_block : control_flow_graph
x_last_insn : emit_status
x_last_mode_for_init_move_cost : target_ira_int
x_libfunc_hash : target_libfuncs
x_libfunc_table : target_libfuncs
x_max_struct_costs_size : target_ira_int
x_mode_mem_attrs : target_rtl
x_mul_cost : target_expmed
x_mul_highpart_cost : target_expmed
x_mul_widen_cost : target_expmed
x_n_basic_blocks : control_flow_graph
x_n_bbs_in_dom_tree : control_flow_graph
x_n_edges : control_flow_graph
x_naked_return_label : rtl_data
x_neg_cost : target_expmed
x_no_caller_save_reg_set : target_hard_regs
x_no_unit_alloc_regs : target_ira_int
x_nonlocal_goto_handler_labels : rtl_data
x_op_alt_data : target_lra_int
x_op_costs : target_ira_int
x_operand_reg_set : target_hard_regs
x_parm_birth_insn : rtl_data
x_pending_stack_adjust : expr_status
x_pic_offset_table_rtx : target_rtl
x_profile_status : control_flow_graph
x_reg_alloc_order : target_hard_regs
x_reg_class_contents : target_hard_regs
x_reg_class_size : target_hard_regs
x_reg_class_subclasses : target_hard_regs
x_reg_class_subunion : target_hard_regs
x_reg_class_superunion : target_hard_regs
x_reg_names : target_hard_regs
x_reg_raw_mode : target_regs
x_reg_rtx_no : emit_status
x_regs_invalidated_by_call : target_hard_regs
x_return_address_pointer_rtx : target_rtl
x_return_label : rtl_data
x_saveregs_value : expr_status
x_sdiv_cost : target_expmed
x_sdiv_pow2_cheap : target_expmed
x_shift_cost : target_expmed
x_shiftadd_cost : target_expmed
x_shiftsub0_cost : target_expmed
x_shiftsub1_cost : target_expmed
x_smod_pow2_cheap : target_expmed
x_spill_indirect_levels : target_reload
x_stack_check_probe_note : rtl_data
x_stack_pointer_delta : expr_status
x_stack_slot_list : rtl_data
x_static_reg_base_value : target_rtl
x_target_avail_regs : target_cfgloop
x_target_clobbered_regs : target_cfgloop
x_target_reg_cost : target_cfgloop
x_target_res_regs : target_cfgloop
x_target_spill_cost : target_cfgloop
x_temp_costs : target_ira_int
x_temp_slot_level : rtl_data
x_this_op_costs : target_ira_int
x_top_of_stack : target_rtl
x_twice_word_mode : target_lower_subreg
x_udiv_cost : target_expmed
x_uncond_jump_length : target_bb_reorder
x_used_temp_slots : rtl_data
x_zero_cost : target_expmed
xcoff32 : external_syment
xcoff64 : external_syment
xexps : position
xvecexp0s : position